From 147c507542ee7feb5bd85212669eeaec2c0420b1 Mon Sep 17 00:00:00 2001
From: Romuald JEANNE <romuald.jeanne@st.com>
Date: Tue, 16 Mar 2021 08:56:21 +0100
Subject: [PATCH 03/22] ARM 5.10.10-stm32mp1-r1 CPUFREQ

---
 drivers/cpufreq/Kconfig.arm          |   7 ++
 drivers/cpufreq/Makefile             |   1 +
 drivers/cpufreq/cpufreq-dt-platdev.c |   3 +
 drivers/cpufreq/stm32-cpufreq.c      | 101 +++++++++++++++++++++++++++
 4 files changed, 112 insertions(+)
 create mode 100644 drivers/cpufreq/stm32-cpufreq.c

diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 1f73fa75b1a0..56b210670b50 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -289,6 +289,13 @@ config ARM_STI_CPUFREQ
 	  this config option if you wish to add CPUFreq support for STi based
 	  SoCs.
 
+config ARM_STM32_CPUFREQ
+	tristate "STM32 CPUFreq support"
+	depends on MACH_STM32MP157
+	default y
+	help
+	  This adds the CPUFreq driver support for STM32 MPU SOCs.
+
 config ARM_TANGO_CPUFREQ
 	bool
 	depends on CPUFREQ_DT && ARCH_TANGO
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index f1b7e3dd6e5d..b373f97f26a2 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -78,6 +78,7 @@ obj-$(CONFIG_ARM_SCMI_CPUFREQ)		+= scmi-cpufreq.o
 obj-$(CONFIG_ARM_SCPI_CPUFREQ)		+= scpi-cpufreq.o
 obj-$(CONFIG_ARM_SPEAR_CPUFREQ)		+= spear-cpufreq.o
 obj-$(CONFIG_ARM_STI_CPUFREQ)		+= sti-cpufreq.o
+obj-$(CONFIG_ARM_STM32_CPUFREQ)		+= stm32-cpufreq.o
 obj-$(CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM) += sun50i-cpufreq-nvmem.o
 obj-$(CONFIG_ARM_TANGO_CPUFREQ)		+= tango-cpufreq.o
 obj-$(CONFIG_ARM_TEGRA20_CPUFREQ)	+= tegra20-cpufreq.o
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 3776d960f405..86fcbb6fa5b8 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -138,6 +138,9 @@ static const struct of_device_id blacklist[] __initconst = {
 	{ .compatible = "st,stih407", },
 	{ .compatible = "st,stih410", },
 	{ .compatible = "st,stih418", },
+	{ .compatible = "st,stm32mp151", },
+	{ .compatible = "st,stm32mp153", },
+	{ .compatible = "st,stm32mp157", },
 
 	{ .compatible = "sigma,tango4", },
 
diff --git a/drivers/cpufreq/stm32-cpufreq.c b/drivers/cpufreq/stm32-cpufreq.c
new file mode 100644
index 000000000000..35fb3520d48d
--- /dev/null
+++ b/drivers/cpufreq/stm32-cpufreq.c
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
+ * Authors: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
+ */
+
+#include <linux/cpu.h>
+#include <linux/cpufreq.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/nvmem-consumer.h>
+#include <linux/of_platform.h>
+#include <linux/pm_opp.h>
+
+struct stm32_cpufreq_priv {
+	struct opp_table *opps;
+	struct platform_device *cpufreq_dt_pdev;
+};
+
+static int stm32_cpufreq_probe(struct platform_device *pdev)
+{
+	struct stm32_cpufreq_priv *priv;
+	struct device_node *opp_node;
+	struct device *cpu_dev;
+	u8 part_number;
+	u32 supported_hw;
+	int ret;
+
+	cpu_dev = get_cpu_device(0);
+	if (!cpu_dev) {
+		dev_err(&pdev->dev, "failed to get cpu0 device\n");
+		return -ENODEV;
+	}
+	opp_node = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
+	if (!opp_node) {
+		dev_err(&pdev->dev, "OPP-v2 not supported\n");
+		return -ENODEV;
+	}
+
+	/* Get chip info */
+	ret = nvmem_cell_read_u8(cpu_dev, "part_number", &part_number);
+	if (ret) {
+		dev_err(&pdev->dev, "Failed to get chip info: %d\n", ret);
+		return ret;
+	}
+
+	supported_hw = BIT((part_number & 0x80) >> 7);
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->opps = dev_pm_opp_set_supported_hw(cpu_dev, &supported_hw, 1);
+	if (IS_ERR(priv->opps)) {
+		ret = PTR_ERR(priv->opps);
+		if (ret != -EPROBE_DEFER)
+			dev_err(&pdev->dev, "Failed to set supported opp: %d\n",
+				ret);
+		return ret;
+	}
+
+	of_node_put(opp_node);
+	priv->cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt",
+								-1, NULL, 0);
+
+	platform_set_drvdata(pdev, priv);
+
+	return 0;
+}
+
+static int stm32_cpufreq_remove(struct platform_device *pdev)
+{
+	struct stm32_cpufreq_priv *priv	= platform_get_drvdata(pdev);
+
+	platform_device_unregister(priv->cpufreq_dt_pdev);
+	dev_pm_opp_put_supported_hw(priv->opps);
+
+	return 0;
+}
+
+static int stm32_cpufreq_init(void)
+{
+	platform_device_register_simple("stm32-cpufreq", -1, NULL, 0);
+
+	return 0;
+}
+module_init(stm32_cpufreq_init);
+
+static struct platform_driver stm32_cpufreq_platdrv = {
+	.driver = {
+		.name	= "stm32-cpufreq",
+	},
+	.probe		= stm32_cpufreq_probe,
+	.remove		= stm32_cpufreq_remove,
+};
+module_platform_driver(stm32_cpufreq_platdrv);
+
+MODULE_DESCRIPTION("STM32 CPU freq driver");
+MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
+MODULE_LICENSE("GPL v2");
-- 
2.17.1

