public
/
meta-st-stm32mp
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

LINUX-STM32MP: update to v5.4-stm32mp-r2 

Kernel 5.4.56

Change-Id: I1b6874b20f23a72b572794013ac879d50da0ecd4
This commit is contained in:
Christophe Priouzeau 2020-10-27 12:21:11 +01:00 committed by Bernard PUEL
parent a622712abe
commit 0d2f843602
27 changed files with 11099 additions and 4545 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
recipes-kernel/linux/linux-stm32mp.inc
View File

@ -1,6 +1,7 @@
COMPATIBLE_MACHINE = "(stm32mpcommon)"
inherit kernel
inherit kernel-fitimage
DEPENDS += "openssl-native util-linux-native libyaml-native"

1187
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0014-ARM-stm32mp1-r1-MMC-NAND.patch
View File

File diff suppressed because it is too large Load Diff

213
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0019-ARM-stm32mp1-r1-MISC.patch
View File

@ -1,213 +0,0 @@
From 21d34047c11667042371bf23d89f168be4eb607d Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:48:07 +0200
Subject: [PATCH 19/23] ARM-stm32mp1-r1-MISC
---
CONTRIBUTING.md | 30 ++++++++++++++++++++++++
drivers/block/loop.c | 49 ++++++++++++++++++++++++++++-----------
include/linux/pm_wakeup.h | 10 ++++++++
tools/perf/util/srcline.c | 16 ++++++++++++-
4 files changed, 91 insertions(+), 14 deletions(-)
create mode 100644 CONTRIBUTING.md
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
new file mode 100644
index 000000000..3d1bacd78
--- /dev/null
+++ b/CONTRIBUTING.md
@@ -0,0 +1,30 @@
+# Contributing guide
+
+This document serves as a checklist before contributing to this repository. It includes links to read up on if topics are unclear to you.
+
+This guide mainly focuses on the proper use of Git.
+
+## 1. Issues
+
+STM32MPU projects do not activate "Github issues" feature for the time being. If you need to report an issue or question about this project deliverables, you can report them using [ ST Support Center ](https://my.st.com/ols#/ols/newrequest) or [ ST Community MPU Forum ](https://community.st.com/s/topic/0TO0X0000003u2AWAQ/stm32-mpus).
+
+## 2. Pull Requests
+
+STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure.
+
+* If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual CLA (https://cla.st.com).
+* If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate CLA (https://cla.st.com) mentioning your GitHub account name.
+* If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check here (https://cla.st.com).
+
+Please note that:
+* The Corporate CLA will always take precedence over the Individual CLA.
+* One CLA submission is sufficient, for any project proposed by STMicroelectronics.
+
+__How to proceed__
+
+* We recommend to fork the project in your GitHub account to further develop your contribution. Please use the latest commit version.
+* Please, submit one Pull Request for one new feature or proposal. This will ease the analysis and final merge if accepted.
+
+__Note__
+
+Merge will not be done directly in GitHub but it will need first to follow internal integration process before public deliver in a standard release. The Pull request will stay open until it is merged and delivered.
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index ef6e25185..6831ab725 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -427,11 +427,12 @@ static int lo_fallocate(struct loop_device *lo, struct request *rq, loff_t pos,
* information.
*/
struct file *file = lo->lo_backing_file;
+ struct request_queue *q = lo->lo_queue;
int ret;
mode |= FALLOC_FL_KEEP_SIZE;
- if ((!file->f_op->fallocate) || lo->lo_encrypt_key_size) {
+ if (!blk_queue_discard(q)) {
ret = -EOPNOTSUPP;
goto out;
}
@@ -461,7 +462,7 @@ static void lo_complete_rq(struct request *rq)
if (!cmd->use_aio || cmd->ret < 0 || cmd->ret == blk_rq_bytes(rq) ||
req_op(rq) != REQ_OP_READ) {
if (cmd->ret < 0)
- ret = BLK_STS_IOERR;
+ ret = errno_to_blk_status(cmd->ret);
goto end_io;
}
@@ -863,28 +864,47 @@ static void loop_config_discard(struct loop_device *lo)
struct inode *inode = file->f_mapping->host;
struct request_queue *q = lo->lo_queue;
+ /*
+ * If the backing device is a block device, mirror its zeroing
+ * capability. Set the discard sectors to the block device's zeroing
+ * capabilities because loop discards result in blkdev_issue_zeroout(),
+ * not blkdev_issue_discard(). This maintains consistent behavior with
+ * file-backed loop devices: discarded regions read back as zero.
+ */
+ if (S_ISBLK(inode->i_mode) && !lo->lo_encrypt_key_size) {
+ struct request_queue *backingq;
+
+ backingq = bdev_get_queue(inode->i_bdev);
+ blk_queue_max_discard_sectors(q,
+ backingq->limits.max_write_zeroes_sectors);
+
+ blk_queue_max_write_zeroes_sectors(q,
+ backingq->limits.max_write_zeroes_sectors);
+
/*
* We use punch hole to reclaim the free space used by the
* image a.k.a. discard. However we do not support discard if
* encryption is enabled, because it may give an attacker
* useful information.
*/
- if ((!file->f_op->fallocate) ||
- lo->lo_encrypt_key_size) {
+ } else if (!file->f_op->fallocate || lo->lo_encrypt_key_size) {
q->limits.discard_granularity = 0;
q->limits.discard_alignment = 0;
blk_queue_max_discard_sectors(q, 0);
blk_queue_max_write_zeroes_sectors(q, 0);
- blk_queue_flag_clear(QUEUE_FLAG_DISCARD, q);
- return;
- }
- q->limits.discard_granularity = inode->i_sb->s_blocksize;
- q->limits.discard_alignment = 0;
+ } else {
+ q->limits.discard_granularity = inode->i_sb->s_blocksize;
+ q->limits.discard_alignment = 0;
+
+ blk_queue_max_discard_sectors(q, UINT_MAX >> 9);
+ blk_queue_max_write_zeroes_sectors(q, UINT_MAX >> 9);
+ }
- blk_queue_max_discard_sectors(q, UINT_MAX >> 9);
- blk_queue_max_write_zeroes_sectors(q, UINT_MAX >> 9);
- blk_queue_flag_set(QUEUE_FLAG_DISCARD, q);
+ if (q->limits.max_write_zeroes_sectors)
+ blk_queue_flag_set(QUEUE_FLAG_DISCARD, q);
+ else
+ blk_queue_flag_clear(QUEUE_FLAG_DISCARD, q);
}
static void loop_unprepare_queue(struct loop_device *lo)
@@ -1950,7 +1970,10 @@ static void loop_handle_cmd(struct loop_cmd *cmd)
failed:
/* complete non-aio request */
if (!cmd->use_aio || ret) {
- cmd->ret = ret ? -EIO : 0;
+ if (ret == -EOPNOTSUPP)
+ cmd->ret = ret;
+ else
+ cmd->ret = ret ? -EIO : 0;
blk_mq_complete_request(rq);
}
}
diff --git a/include/linux/pm_wakeup.h b/include/linux/pm_wakeup.h
index 661efa029..faee74f36 100644
--- a/include/linux/pm_wakeup.h
+++ b/include/linux/pm_wakeup.h
@@ -79,6 +79,11 @@ static inline bool device_may_wakeup(struct device *dev)
return dev->power.can_wakeup && !!dev->power.wakeup;
}
+static inline bool device_wakeup_path(struct device *dev)
+{
+ return !!dev->power.wakeup_path;
+}
+
static inline void device_set_wakeup_path(struct device *dev)
{
dev->power.wakeup_path = true;
@@ -165,6 +170,11 @@ static inline bool device_may_wakeup(struct device *dev)
return dev->power.can_wakeup && dev->power.should_wakeup;
}
+static inline bool device_wakeup_path(struct device *dev)
+{
+ return false;
+}
+
static inline void device_set_wakeup_path(struct device *dev) {}
static inline void __pm_stay_awake(struct wakeup_source *ws) {}
diff --git a/tools/perf/util/srcline.c b/tools/perf/util/srcline.c
index 6ccf6f6d0..5b7d6c16d 100644
--- a/tools/perf/util/srcline.c
+++ b/tools/perf/util/srcline.c
@@ -193,16 +193,30 @@ static void find_address_in_section(bfd *abfd, asection *section, void *data)
bfd_vma pc, vma;
bfd_size_type size;
struct a2l_data *a2l = data;
+ flagword flags;
if (a2l->found)
return;
- if ((bfd_get_section_flags(abfd, section) & SEC_ALLOC) == 0)
+#ifdef bfd_get_section_flags
+ flags = bfd_get_section_flags(abfd, section);
+#else
+ flags = bfd_section_flags(section);
+#endif
+ if ((flags & SEC_ALLOC) == 0)
return;
pc = a2l->addr;
+#ifdef bfd_get_section_vma
vma = bfd_get_section_vma(abfd, section);
+#else
+ vma = bfd_section_vma(section);
+#endif
+#ifdef bfd_get_section_size
size = bfd_get_section_size(section);
+#else
+ size = bfd_section_size(section);
+#endif
if (pc < vma || pc >= vma + size)
return;
--
2.17.1

24
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0022-ARM-stm32mp1-r1-POWER.patch
View File

@ -1,24 +0,0 @@
From 65ad7ed110b25b333679e5084fb82db0d5a15a6c Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:50:46 +0200
Subject: [PATCH 22/23] ARM-stm32mp1-r1-POWER
---
kernel/power/suspend.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/kernel/power/suspend.c b/kernel/power/suspend.c
index 27f149f5d..4581702e8 100644
--- a/kernel/power/suspend.c
+++ b/kernel/power/suspend.c
@@ -34,7 +34,6 @@
#include "power.h"
const char * const pm_labels[] = {
- [PM_SUSPEND_TO_IDLE] = "freeze",
[PM_SUSPEND_STANDBY] = "standby",
[PM_SUSPEND_MEM] = "mem",
};
--
2.17.1

14
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0001-ARM-stm32mp1-r1-MACHINE.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0001-ARM-stm32mp1-r2-MACHINE.patch
View File

@ -1,7 +1,7 @@
From fda596ab13299af0f9cebfa8f9bde2827b02a2b3 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:36:29 +0200
Subject: [PATCH 01/23] ARM-stm32mp1-r1-MACHINE
From 4556074b66971918536ed27d52f5f4f6337f0646 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:40 +0200
Subject: [PATCH 01/22] ARM-stm32mp1-r2-rc8-MACHINE
---
arch/arm/kernel/time.c | 2 ++
@ -10,7 +10,7 @@ Subject: [PATCH 01/23] ARM-stm32mp1-r1-MACHINE
3 files changed, 5 insertions(+)
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index b996b2cf0..dddc7ebf4 100644
index b996b2cf07038..dddc7ebf4db44 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -9,6 +9,7 @@
@ -29,7 +29,7 @@ index b996b2cf0..dddc7ebf4 100644
}
}
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index 57699bd8f..8f9fd1da9 100644
index 57699bd8f1075..8f9fd1da9ea05 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -46,6 +46,7 @@ if ARCH_MULTI_V7
@ -41,7 +41,7 @@ index 57699bd8f..8f9fd1da9 100644
endif # ARMv7-A
diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c
index 011d57b48..8e06a9442 100644
index 011d57b488c2e..8e06a94421d9b 100644
--- a/arch/arm/mach-stm32/board-dt.c
+++ b/arch/arm/mach-stm32/board-dt.c
@@ -17,6 +17,8 @@ static const char *const stm32_compat[] __initconst = {

27
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0002-ARM-stm32mp1-r1-CPUFREQ.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0002-ARM-stm32mp1-r2-CPUFREQ.patch
View File

@ -1,19 +1,19 @@
From 14bcead6b5ca532f85cffadab2753cc044002f86 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:37:04 +0200
Subject: [PATCH 02/23] ARM-stm32mp1-r1-CPUFREQ
From 458e623d9cf01cde1dc2404da5377064b3136389 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:41 +0200
Subject: [PATCH 02/22] ARM-stm32mp1-r2-rc8-CPUFREQ
---
drivers/cpufreq/Kconfig.arm | 7 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
drivers/cpufreq/stm32-cpufreq.c | 101 +++++++++++++++++++++++++++
drivers/opp/core.c | 11 ++-
5 files changed, 120 insertions(+), 1 deletion(-)
drivers/opp/core.c | 12 +++-
5 files changed, 121 insertions(+), 1 deletion(-)
create mode 100644 drivers/cpufreq/stm32-cpufreq.c
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index a905796f7..b2beb1708 100644
index a905796f7f856..b2beb170840be 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -295,6 +295,13 @@ config ARM_STI_CPUFREQ
@ -31,7 +31,7 @@ index a905796f7..b2beb1708 100644
bool
depends on CPUFREQ_DT && ARCH_TANGO
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 9a9f5ccd1..6139d2aeb 100644
index 9a9f5ccd13d98..6139d2aebea40 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -80,6 +80,7 @@ obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o
@ -43,7 +43,7 @@ index 9a9f5ccd1..6139d2aeb 100644
obj-$(CONFIG_ARM_TANGO_CPUFREQ) += tango-cpufreq.o
obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index bca8d1f47..7ac5715e4 100644
index bca8d1f47fd2c..7ac5715e43597 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -131,6 +131,7 @@ static const struct of_device_id blacklist[] __initconst = {
@ -56,7 +56,7 @@ index bca8d1f47..7ac5715e4 100644
diff --git a/drivers/cpufreq/stm32-cpufreq.c b/drivers/cpufreq/stm32-cpufreq.c
new file mode 100644
index 000000000..35fb3520d
index 0000000000000..35fb3520d48df
--- /dev/null
+++ b/drivers/cpufreq/stm32-cpufreq.c
@@ -0,0 +1,101 @@
@ -162,10 +162,10 @@ index 000000000..35fb3520d
+MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
index 9ff0538ee..1974bf21f 100644
index 9ff0538ee83a0..ec692884c170f 100644
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
@@ -980,9 +980,14 @@ static struct opp_table *_allocate_opp_table(struct device *dev, int index)
@@ -980,9 +980,15 @@ static struct opp_table *_allocate_opp_table(struct device *dev, int index)
opp_table->clk = clk_get(dev, NULL);
if (IS_ERR(opp_table->clk)) {
ret = PTR_ERR(opp_table->clk);
@ -175,13 +175,14 @@ index 9ff0538ee..1974bf21f 100644
ret);
+ }
+ else {
+ _remove_opp_dev(opp_dev, opp_table);
+ kfree(opp_table);
+ return ERR_PTR(-EPROBE_DEFER);
+ }
}
BLOCKING_INIT_NOTIFIER_HEAD(&opp_table->head);
@@ -1443,6 +1448,10 @@ struct opp_table *dev_pm_opp_set_supported_hw(struct device *dev,
@@ -1443,6 +1449,10 @@ struct opp_table *dev_pm_opp_set_supported_hw(struct device *dev,
struct opp_table *opp_table;
opp_table = dev_pm_opp_get_opp_table(dev);

296
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0003-ARM-stm32mp1-r1-CRYPTO.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0003-ARM-stm32mp1-r2-CRYPTO.patch
View File

@ -1,28 +1,41 @@
From ad399098098fb0ed48ccab85bbc70e15de7777c0 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:38:03 +0200
Subject: [PATCH 03/23] ARM-stm32mp1-r1-CRYPTO
From 0f32661351778c6c282c9509defdcec61abf7fab Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:41 +0200
Subject: [PATCH 03/22] ARM-stm32mp1-r2-rc8-CRYPTO
---
drivers/crypto/stm32/stm32-crc32.c | 228 +++++++++++++++-------
drivers/crypto/stm32/Kconfig | 2 +
drivers/crypto/stm32/stm32-crc32.c | 99 +++++++++-
drivers/crypto/stm32/stm32-cryp.c | 300 +++++++++++++++++++++--------
drivers/crypto/stm32/stm32-hash.c | 57 ++++--
3 files changed, 417 insertions(+), 168 deletions(-)
4 files changed, 348 insertions(+), 110 deletions(-)
diff --git a/drivers/crypto/stm32/Kconfig b/drivers/crypto/stm32/Kconfig
index 1aba9372cd232..425c68d42a5fe 100644
--- a/drivers/crypto/stm32/Kconfig
+++ b/drivers/crypto/stm32/Kconfig
@@ -3,6 +3,8 @@ config CRYPTO_DEV_STM32_CRC
tristate "Support for STM32 crc accelerators"
depends on ARCH_STM32
select CRYPTO_HASH
+ select CRYPTO_CRC32
+ select CRYPTO_CRC32C
help
This enables support for the CRC32 hw accelerator which can be found
on STMicroelectronics STM32 SOC.
diff --git a/drivers/crypto/stm32/stm32-crc32.c b/drivers/crypto/stm32/stm32-crc32.c
index 9e11c3480..892d5b6eb 100644
index e68b856d03b6e..22b301c684f09 100644
--- a/drivers/crypto/stm32/stm32-crc32.c
+++ b/drivers/crypto/stm32/stm32-crc32.c
@@ -28,18 +28,23 @@
@@ -6,6 +6,7 @@
/* Registers values */
#define CRC_CR_RESET BIT(0)
-#define CRC_CR_REVERSE (BIT(7) | BIT(6) | BIT(5))
-#define CRC_INIT_DEFAULT 0xFFFFFFFF
+#define CRC_CR_REV_IN_WORD (BIT(6) | BIT(5))
+#define CRC_CR_REV_IN_BYTE BIT(5)
+#define CRC_CR_REV_OUT BIT(7)
+#define CRC32C_INIT_DEFAULT 0xFFFFFFFF
#include <linux/bitrev.h>
#include <linux/clk.h>
+#include <linux/crc32.h>
#include <linux/crc32poly.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
@@ -35,11 +36,16 @@
#define CRC_AUTOSUSPEND_DELAY 50
@ -35,96 +48,35 @@ index 9e11c3480..892d5b6eb 100644
struct device *dev;
void __iomem *regs;
struct clk *clk;
- u8 pending_data[sizeof(u32)];
- size_t nb_pending_bytes;
+ spinlock_t lock;
};
struct stm32_crc_list {
@@ -59,14 +64,13 @@ struct stm32_crc_ctx {
struct stm32_crc_desc_ctx {
u32 partial; /* crc32c: partial in first 4 bytes of that struct */
- struct stm32_crc *crc;
};
static int stm32_crc32_cra_init(struct crypto_tfm *tfm)
{
struct stm32_crc_ctx *mctx = crypto_tfm_ctx(tfm);
- mctx->key = CRC_INIT_DEFAULT;
+ mctx->key = 0;
mctx->poly = CRC32_POLY_LE;
return 0;
}
@@ -75,7 +79,7 @@ static int stm32_crc32c_cra_init(struct crypto_tfm *tfm)
{
struct stm32_crc_ctx *mctx = crypto_tfm_ctx(tfm);
- mctx->key = CRC_INIT_DEFAULT;
+ mctx->key = CRC32C_INIT_DEFAULT;
mctx->poly = CRC32C_POLY_LE;
return 0;
}
@@ -94,87 +98,135 @@ static int stm32_crc_setkey(struct crypto_shash *tfm, const u8 *key,
return 0;
}
+static struct stm32_crc *stm32_crc_get_next_crc(void)
+{
+ struct stm32_crc *crc;
+
+ spin_lock_bh(&crc_list.lock);
+ crc = list_first_entry(&crc_list.dev_list, struct stm32_crc, list);
+ if (crc)
+ list_move_tail(&crc->list, &crc_list.dev_list);
+ spin_unlock_bh(&crc_list.lock);
+
+ return crc;
+}
+
static int stm32_crc_init(struct shash_desc *desc)
{
@@ -111,6 +117,7 @@ static int stm32_crc_init(struct shash_desc *desc)
struct stm32_crc_desc_ctx *ctx = shash_desc_ctx(desc);
struct stm32_crc_ctx *mctx = crypto_shash_ctx(desc->tfm);
struct stm32_crc *crc;
+ unsigned long flags;
- spin_lock_bh(&crc_list.lock);
- list_for_each_entry(crc, &crc_list.dev_list, list) {
- ctx->crc = crc;
- break;
- }
- spin_unlock_bh(&crc_list.lock);
+ crc = stm32_crc_get_next_crc();
+ if (!crc)
+ return -ENODEV;
+
+ pm_runtime_get_sync(crc->dev);
crc = stm32_crc_get_next_crc();
if (!crc)
@@ -118,6 +125,8 @@ static int stm32_crc_init(struct shash_desc *desc)
pm_runtime_get_sync(crc->dev);
- pm_runtime_get_sync(ctx->crc->dev);
+ spin_lock_irqsave(&crc->lock, flags);
+
/* Reset, set key, poly and configure in bit reverse mode */
- writel_relaxed(bitrev32(mctx->key), ctx->crc->regs + CRC_INIT);
- writel_relaxed(bitrev32(mctx->poly), ctx->crc->regs + CRC_POL);
- writel_relaxed(CRC_CR_RESET | CRC_CR_REVERSE, ctx->crc->regs + CRC_CR);
+ writel_relaxed(bitrev32(mctx->key), crc->regs + CRC_INIT);
+ writel_relaxed(bitrev32(mctx->poly), crc->regs + CRC_POL);
+ writel_relaxed(CRC_CR_RESET | CRC_CR_REV_IN_WORD | CRC_CR_REV_OUT,
+ crc->regs + CRC_CR);
writel_relaxed(bitrev32(mctx->key), crc->regs + CRC_INIT);
writel_relaxed(bitrev32(mctx->poly), crc->regs + CRC_POL);
@@ -127,14 +136,16 @@ static int stm32_crc_init(struct shash_desc *desc)
/* Store partial result */
- ctx->partial = readl_relaxed(ctx->crc->regs + CRC_DR);
- ctx->crc->nb_pending_bytes = 0;
+ ctx->partial = readl_relaxed(crc->regs + CRC_DR);
ctx->partial = readl_relaxed(crc->regs + CRC_DR);
- pm_runtime_mark_last_busy(ctx->crc->dev);
- pm_runtime_put_autosuspend(ctx->crc->dev);
+ spin_unlock_irqrestore(&crc->lock, flags);
+
+ pm_runtime_mark_last_busy(crc->dev);
+ pm_runtime_put_autosuspend(crc->dev);
pm_runtime_mark_last_busy(crc->dev);
pm_runtime_put_autosuspend(crc->dev);
return 0;
}
@ -135,91 +87,37 @@ index 9e11c3480..892d5b6eb 100644
+ size_t length)
{
struct stm32_crc_desc_ctx *ctx = shash_desc_ctx(desc);
- struct stm32_crc *crc = ctx->crc;
- u32 *d32;
- unsigned int i;
+ struct stm32_crc_ctx *mctx = crypto_shash_ctx(desc->tfm);
+ struct stm32_crc *crc;
+ unsigned long flags;
+
+ crc = stm32_crc_get_next_crc();
+ if (!crc)
+ return -ENODEV;
struct stm32_crc_ctx *mctx = crypto_shash_ctx(desc->tfm);
@@ -146,6 +157,16 @@ static int stm32_crc_update(struct shash_desc *desc, const u8 *d8,
pm_runtime_get_sync(crc->dev);
- if (unlikely(crc->nb_pending_bytes)) {
- while (crc->nb_pending_bytes != sizeof(u32) && length) {
- /* Fill in pending data */
- crc->pending_data[crc->nb_pending_bytes++] = *(d8++);
+ spin_lock_irqsave(&crc->lock, flags);
+ if (!spin_trylock(&crc->lock)) {
+ /* Hardware is busy, calculate crc32 by software */
+ if (mctx->poly == CRC32_POLY_LE)
+ ctx->partial = crc32_le(ctx->partial, d8, length);
+ else
+ ctx->partial = __crc32c_le(ctx->partial, d8, length);
+
+ /*
+ * Restore previously calculated CRC for this context as init value
+ * Restore polynomial configuration
+ * Configure in register for word input data,
+ * Configure out register in reversed bit mode data.
+ */
+ writel_relaxed(bitrev32(ctx->partial), crc->regs + CRC_INIT);
+ writel_relaxed(bitrev32(mctx->poly), crc->regs + CRC_POL);
+ writel_relaxed(CRC_CR_RESET | CRC_CR_REV_IN_WORD | CRC_CR_REV_OUT,
+ crc->regs + CRC_CR);
+
+ if (d8 != PTR_ALIGN(d8, sizeof(u32))) {
+ /* Configure for byte data */
+ writel_relaxed(CRC_CR_REV_IN_BYTE | CRC_CR_REV_OUT,
+ crc->regs + CRC_CR);
+ while (d8 != PTR_ALIGN(d8, sizeof(u32)) && length) {
+ writeb_relaxed(*d8++, crc->regs + CRC_DR);
length--;
}
-
- if (crc->nb_pending_bytes == sizeof(u32)) {
- /* Process completed pending data */
- writel_relaxed(*(u32 *)crc->pending_data,
- crc->regs + CRC_DR);
- crc->nb_pending_bytes = 0;
- }
+ /* Configure for word data */
+ writel_relaxed(CRC_CR_REV_IN_WORD | CRC_CR_REV_OUT,
+ crc->regs + CRC_CR);
}
- d32 = (u32 *)d8;
- for (i = 0; i < length >> 2; i++)
- /* Process 32 bits data */
- writel_relaxed(*(d32++), crc->regs + CRC_DR);
+ for (; length >= sizeof(u32); d8 += sizeof(u32), length -= sizeof(u32))
+ writel_relaxed(*((u32 *)d8), crc->regs + CRC_DR);
+
+ if (length) {
+ /* Configure for byte data */
+ writel_relaxed(CRC_CR_REV_IN_BYTE | CRC_CR_REV_OUT,
+ crc->regs + CRC_CR);
+ while (length--)
+ writeb_relaxed(*d8++, crc->regs + CRC_DR);
+ goto pm_out;
+ }
+
/*
* Restore previously calculated CRC for this context as init value
* Restore polynomial configuration
@@ -184,12 +205,41 @@ static int stm32_crc_update(struct shash_desc *desc, const u8 *d8,
/* Store partial result */
ctx->partial = readl_relaxed(crc->regs + CRC_DR);
+ spin_unlock_irqrestore(&crc->lock, flags);
+ spin_unlock(&crc->lock);
+
+pm_out:
pm_runtime_mark_last_busy(crc->dev);
pm_runtime_put_autosuspend(crc->dev);
- /* Check for pending data (non 32 bits) */
- length &= 3;
- if (likely(!length))
- return 0;
+ return 0;
+}
return 0;
}
- if ((crc->nb_pending_bytes + length) >= sizeof(u32)) {
- /* Shall not happen */
- dev_err(crc->dev, "Pending data overflow\n");
- return -EINVAL;
- }
+static int stm32_crc_update(struct shash_desc *desc, const u8 *d8,
+ unsigned int length)
+{
@ -228,11 +126,7 @@ index 9e11c3480..892d5b6eb 100644
+ const u8 *cur;
+ size_t size;
+ int ret;
- d8 = (const u8 *)d32;
- for (i = 0; i < length; i++)
- /* Store pending data */
- crc->pending_data[crc->nb_pending_bytes++] = *(d8++);
+
+ if (!burst_sz)
+ return burst_update(desc, d8, length);
+
@ -246,19 +140,14 @@ index 9e11c3480..892d5b6eb 100644
+ if (ret)
+ return ret;
+ }
return 0;
}
@@ -204,6 +256,8 @@ static int stm32_crc_digest(struct shash_desc *desc, const u8 *data,
return stm32_crc_init(desc) ?: stm32_crc_finup(desc, data, length, out);
}
+static unsigned int refcnt;
+static DEFINE_MUTEX(refcnt_lock);
static struct shash_alg algs[] = {
/* CRC-32 */
{
@@ -271,7 +325,9 @@ static int stm32_crc_probe(struct platform_device *pdev)
+
+ return 0;
+}
+
static int stm32_crc_final(struct shash_desc *desc, u8 *out)
{
struct stm32_crc_desc_ctx *ctx = shash_desc_ctx(desc);
@@ -284,7 +334,9 @@ static int stm32_crc_probe(struct platform_device *pdev)
crc->clk = devm_clk_get(dev, NULL);
if (IS_ERR(crc->clk)) {
@ -269,7 +158,7 @@ index 9e11c3480..892d5b6eb 100644
return PTR_ERR(crc->clk);
}
@@ -286,20 +342,29 @@ static int stm32_crc_probe(struct platform_device *pdev)
@@ -299,8 +351,11 @@ static int stm32_crc_probe(struct platform_device *pdev)
pm_runtime_get_noresume(dev);
pm_runtime_set_active(dev);
@ -281,42 +170,7 @@ index 9e11c3480..892d5b6eb 100644
platform_set_drvdata(pdev, crc);
spin_lock(&crc_list.lock);
list_add(&crc->list, &crc_list.dev_list);
spin_unlock(&crc_list.lock);
- ret = crypto_register_shashes(algs, ARRAY_SIZE(algs));
- if (ret) {
- dev_err(dev, "Failed to register\n");
- clk_disable_unprepare(crc->clk);
- return ret;
+ mutex_lock(&refcnt_lock);
+ if (!refcnt) {
+ ret = crypto_register_shashes(algs, ARRAY_SIZE(algs));
+ if (ret) {
+ mutex_unlock(&refcnt_lock);
+ dev_err(dev, "Failed to register\n");
+ clk_disable_unprepare(crc->clk);
+ return ret;
+ }
}
+ refcnt++;
+ mutex_unlock(&refcnt_lock);
dev_info(dev, "Initialized\n");
@@ -320,7 +385,10 @@ static int stm32_crc_remove(struct platform_device *pdev)
list_del(&crc->list);
spin_unlock(&crc_list.lock);
- crypto_unregister_shashes(algs, ARRAY_SIZE(algs));
+ mutex_lock(&refcnt_lock);
+ if (!--refcnt)
+ crypto_unregister_shashes(algs, ARRAY_SIZE(algs));
+ mutex_unlock(&refcnt_lock);
pm_runtime_disable(crc->dev);
pm_runtime_put_noidle(crc->dev);
@@ -331,11 +399,39 @@ static int stm32_crc_remove(struct platform_device *pdev)
@@ -353,11 +408,39 @@ static int stm32_crc_remove(struct platform_device *pdev)
}
#ifdef CONFIG_PM
@ -357,7 +211,7 @@ index 9e11c3480..892d5b6eb 100644
return 0;
}
@@ -345,9 +441,9 @@ static int stm32_crc_runtime_resume(struct device *dev)
@@ -367,9 +450,9 @@ static int stm32_crc_runtime_resume(struct device *dev)
struct stm32_crc *crc = dev_get_drvdata(dev);
int ret;
@ -369,7 +223,7 @@ index 9e11c3480..892d5b6eb 100644
return ret;
}
@@ -356,8 +452,8 @@ static int stm32_crc_runtime_resume(struct device *dev)
@@ -378,8 +461,8 @@ static int stm32_crc_runtime_resume(struct device *dev)
#endif
static const struct dev_pm_ops stm32_crc_pm_ops = {
@ -381,7 +235,7 @@ index 9e11c3480..892d5b6eb 100644
stm32_crc_runtime_resume, NULL)
};
diff --git a/drivers/crypto/stm32/stm32-cryp.c b/drivers/crypto/stm32/stm32-cryp.c
index ba5ea6434..fbf522dc3 100644
index ba5ea6434f9ca..fbf522dc3d63f 100644
--- a/drivers/crypto/stm32/stm32-cryp.c
+++ b/drivers/crypto/stm32/stm32-cryp.c
@@ -143,10 +143,10 @@ struct stm32_cryp {
@ -1105,7 +959,7 @@ index ba5ea6434..fbf522dc3 100644
pm_runtime_put_noidle(dev);
pm_runtime_disable(dev);
diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c
index cfc8e0e37..f8b0e1b28 100644
index cfc8e0e37beec..f8b0e1b28971e 100644
--- a/drivers/crypto/stm32/stm32-hash.c
+++ b/drivers/crypto/stm32/stm32-hash.c
@@ -507,6 +507,7 @@ static int stm32_hash_hmac_dma_send(struct stm32_hash_dev *hdev)

18
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0004-ARM-stm32mp1-r1-RNG-DEBUG-NVMEM.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0004-ARM-stm32mp1-r2-RNG-DEBUG-NVMEM.patch
View File

@ -1,7 +1,7 @@
From 31ac3e358c9c6303d58c3f24fe33b6924a56bddd Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:39:52 +0200
Subject: [PATCH 04/23] ARM-stm32mp1-r1-RNG-DEBUG-NVMEM
From bfe89db1821d391733d9410f1102f456de687474 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:41 +0200
Subject: [PATCH 04/22] ARM-stm32mp1-r2-rc8-RNG-DEBUG-NVMEM
---
arch/arm/Kconfig.debug | 42 +++++++++++++++++++++++++-----
@ -12,7 +12,7 @@ Subject: [PATCH 04/23] ARM-stm32mp1-r1-RNG-DEBUG-NVMEM
5 files changed, 88 insertions(+), 12 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 8bcbd0cd7..3357e294a 100644
index 8bcbd0cd739b5..3357e294a7cc0 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1201,23 +1201,49 @@ choice
@ -106,7 +106,7 @@ index 8bcbd0cd7..3357e294a 100644
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
diff --git a/arch/arm/include/debug/stm32.S b/arch/arm/include/debug/stm32.S
index 1abb32f68..6446e4692 100644
index 1abb32f685fdb..6446e4692025d 100644
--- a/arch/arm/include/debug/stm32.S
+++ b/arch/arm/include/debug/stm32.S
@@ -4,14 +4,13 @@
@ -138,7 +138,7 @@ index 1abb32f68..6446e4692 100644
.macro senduart,rd,rx
diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c
index 38324c2dd..a25c4b5c3 100644
index 38324c2ddda10..a25c4b5c3d1bc 100644
--- a/drivers/char/hw_random/stm32-rng.c
+++ b/drivers/char/hw_random/stm32-rng.c
@@ -135,7 +135,10 @@ static int stm32_rng_probe(struct platform_device *ofdev)
@ -154,7 +154,7 @@ index 38324c2dd..a25c4b5c3 100644
udelay(2);
reset_control_deassert(priv->rst);
diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index 960542dea..8105fe423 100644
index 960542dea5adb..8105fe4230cc5 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -1080,6 +1080,43 @@ int nvmem_cell_write(struct nvmem_cell *cell, void *buf, size_t len)
@ -202,7 +202,7 @@ index 960542dea..8105fe423 100644
* nvmem_cell_read_u16() - Read a cell value as an u16
*
diff --git a/include/linux/nvmem-consumer.h b/include/linux/nvmem-consumer.h
index 5c17cb733..c3c53a63e 100644
index 5c17cb7332241..c3c53a63e358a 100644
--- a/include/linux/nvmem-consumer.h
+++ b/include/linux/nvmem-consumer.h
@@ -61,6 +61,7 @@ void nvmem_cell_put(struct nvmem_cell *cell);

691
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0005-ARM-stm32mp1-r1-CLOCK.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0005-ARM-stm32mp1-r2-CLOCK.patch
View File

File diff suppressed because it is too large Load Diff

108
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0006-ARM-stm32mp1-r1-DMA.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0006-ARM-stm32mp1-r2-DMA.patch
View File

@ -1,18 +1,18 @@
From ec7780453caf21817873becfdb8efb2a99cad0d5 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:40:57 +0200
Subject: [PATCH 06/23] ARM-stm32mp1-r1-DMA
From ea9107d1f4dde411886c614bfa5f7403e28c4d0b Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:42 +0200
Subject: [PATCH 06/22] ARM-stm32mp1-r2-rc8-DMA
---
drivers/dma/dmaengine.c | 113 +++-
drivers/dma/stm32-dma.c | 1118 +++++++++++++++++++++++++++++++-----
drivers/dma/stm32-dma.c | 1119 +++++++++++++++++++++++++++++++-----
drivers/dma/stm32-dmamux.c | 95 ++-
drivers/dma/stm32-mdma.c | 273 +++++++--
include/linux/dmaengine.h | 18 +
5 files changed, 1379 insertions(+), 238 deletions(-)
5 files changed, 1380 insertions(+), 238 deletions(-)
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 4b604086b..3db3f8e36 100644
index 4b604086b1b3a..3db3f8e36dea0 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -58,6 +58,65 @@ static DEFINE_IDA(dma_ida);
@ -172,7 +172,7 @@ index 4b604086b..3db3f8e36 100644
arch_initcall(dma_bus_init);
diff --git a/drivers/dma/stm32-dma.c b/drivers/dma/stm32-dma.c
index 5989b0893..9ebcaadf4 100644
index 5989b08935211..e8bedbad125c3 100644
--- a/drivers/dma/stm32-dma.c
+++ b/drivers/dma/stm32-dma.c
@@ -14,11 +14,14 @@
@ -272,7 +272,7 @@ index 5989b0893..9ebcaadf4 100644
};
static struct stm32_dma_device *stm32_dma_get_dev(struct stm32_dma_chan *chan)
@@ -260,6 +295,7 @@ static int stm32_dma_get_width(struct stm32_dma_chan *chan,
@@ -260,9 +295,11 @@ static int stm32_dma_get_width(struct stm32_dma_chan *chan,
}
static enum dma_slave_buswidth stm32_dma_get_max_width(u32 buf_len,
@ -280,17 +280,21 @@ index 5989b0893..9ebcaadf4 100644
u32 threshold)
{
enum dma_slave_buswidth max_width;
@@ -273,6 +309,9 @@ static enum dma_slave_buswidth stm32_dma_get_max_width(u32 buf_len,
+ u64 addr = buf_addr;
if (threshold == STM32_DMA_FIFO_THRESHOLD_FULL)
max_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
@@ -273,6 +310,9 @@ static enum dma_slave_buswidth stm32_dma_get_max_width(u32 buf_len,
max_width > DMA_SLAVE_BUSWIDTH_1_BYTE)
max_width = max_width >> 1;
+ if (buf_addr % max_width)
+ if (do_div(addr, max_width))
+ max_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+
return max_width;
}
@@ -281,6 +320,9 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
@@ -281,6 +321,9 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
{
u32 remaining;
@ -300,7 +304,7 @@ index 5989b0893..9ebcaadf4 100644
if (width != DMA_SLAVE_BUSWIDTH_UNDEFINED) {
if (burst != 0) {
/*
@@ -302,6 +344,10 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
@@ -302,6 +345,10 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
static bool stm32_dma_is_burst_possible(u32 buf_len, u32 threshold)
{
@ -311,7 +315,7 @@ index 5989b0893..9ebcaadf4 100644
/*
* Buffer or period length has to be aligned on FIFO depth.
* Otherwise bytes may be stuck within FIFO at buffer or period
@@ -422,29 +468,19 @@ static void stm32_dma_irq_clear(struct stm32_dma_chan *chan, u32 flags)
@@ -422,29 +469,19 @@ static void stm32_dma_irq_clear(struct stm32_dma_chan *chan, u32 flags)
static int stm32_dma_disable_chan(struct stm32_dma_chan *chan)
{
struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
@ -348,7 +352,7 @@ index 5989b0893..9ebcaadf4 100644
}
return 0;
@@ -483,13 +519,22 @@ static void stm32_dma_stop(struct stm32_dma_chan *chan)
@@ -483,13 +520,22 @@ static void stm32_dma_stop(struct stm32_dma_chan *chan)
static int stm32_dma_terminate_all(struct dma_chan *c)
{
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
@ -374,7 +378,7 @@ index 5989b0893..9ebcaadf4 100644
chan->desc = NULL;
}
@@ -500,9 +545,103 @@ static int stm32_dma_terminate_all(struct dma_chan *c)
@@ -500,9 +546,103 @@ static int stm32_dma_terminate_all(struct dma_chan *c)
return 0;
}
@ -478,7 +482,7 @@ index 5989b0893..9ebcaadf4 100644
vchan_synchronize(&chan->vchan);
}
@@ -525,62 +664,213 @@ static void stm32_dma_dump_reg(struct stm32_dma_chan *chan)
@@ -525,62 +665,213 @@ static void stm32_dma_dump_reg(struct stm32_dma_chan *chan)
dev_dbg(chan2dev(chan), "SFCR: 0x%08x\n", sfcr);
}
@ -729,7 +733,7 @@ index 5989b0893..9ebcaadf4 100644
}
static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
@@ -612,23 +902,134 @@ static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
@@ -612,23 +903,134 @@ static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
}
}
@ -875,7 +879,7 @@ index 5989b0893..9ebcaadf4 100644
}
static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
@@ -643,26 +1044,37 @@ static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
@@ -643,26 +1045,37 @@ static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id));
sfcr = stm32_dma_read(dmadev, STM32_DMA_SFCR(chan->id));
@ -923,7 +927,7 @@ index 5989b0893..9ebcaadf4 100644
if (status) {
stm32_dma_irq_clear(chan, status);
dev_err(chan2dev(chan), "DMA error: status=0x%08x\n", status);
@@ -680,31 +1092,37 @@ static void stm32_dma_issue_pending(struct dma_chan *c)
@@ -680,31 +1093,37 @@ static void stm32_dma_issue_pending(struct dma_chan *c)
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
unsigned long flags;
@ -965,7 +969,7 @@ index 5989b0893..9ebcaadf4 100644
switch (direction) {
case DMA_MEM_TO_DEV:
@@ -716,7 +1134,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
@@ -716,7 +1135,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
/* Set device burst size */
dst_best_burst = stm32_dma_get_best_burst(buf_len,
dst_maxburst,
@ -974,7 +978,7 @@ index 5989b0893..9ebcaadf4 100644
dst_addr_width);
dst_burst_size = stm32_dma_get_burst(chan, dst_best_burst);
@@ -724,7 +1142,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
@@ -724,7 +1143,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
return dst_burst_size;
/* Set memory data size */
@ -984,7 +988,7 @@ index 5989b0893..9ebcaadf4 100644
chan->mem_width = src_addr_width;
src_bus_width = stm32_dma_get_width(chan, src_addr_width);
if (src_bus_width < 0)
@@ -734,7 +1153,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
@@ -734,7 +1154,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
src_maxburst = STM32_DMA_MAX_BURST;
src_best_burst = stm32_dma_get_best_burst(buf_len,
src_maxburst,
@ -993,7 +997,7 @@ index 5989b0893..9ebcaadf4 100644
src_addr_width);
src_burst_size = stm32_dma_get_burst(chan, src_best_burst);
if (src_burst_size < 0)
@@ -748,7 +1167,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
@@ -748,7 +1168,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
/* Set FIFO threshold */
chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_FTH_MASK;
@ -1003,7 +1007,7 @@ index 5989b0893..9ebcaadf4 100644
/* Set peripheral address */
chan->chan_reg.dma_spar = chan->dma_sconfig.dst_addr;
@@ -764,7 +1184,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
@@ -764,7 +1185,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
/* Set device burst size */
src_best_burst = stm32_dma_get_best_burst(buf_len,
src_maxburst,
@ -1012,7 +1016,7 @@ index 5989b0893..9ebcaadf4 100644
src_addr_width);
chan->mem_burst = src_best_burst;
src_burst_size = stm32_dma_get_burst(chan, src_best_burst);
@@ -772,7 +1192,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
@@ -772,7 +1193,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
return src_burst_size;
/* Set memory data size */
@ -1022,7 +1026,7 @@ index 5989b0893..9ebcaadf4 100644
chan->mem_width = dst_addr_width;
dst_bus_width = stm32_dma_get_width(chan, dst_addr_width);
if (dst_bus_width < 0)
@@ -782,7 +1203,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
@@ -782,7 +1204,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
dst_maxburst = STM32_DMA_MAX_BURST;
dst_best_burst = stm32_dma_get_best_burst(buf_len,
dst_maxburst,
@ -1031,7 +1035,7 @@ index 5989b0893..9ebcaadf4 100644
dst_addr_width);
chan->mem_burst = dst_best_burst;
dst_burst_size = stm32_dma_get_burst(chan, dst_best_burst);
@@ -797,7 +1218,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
@@ -797,7 +1219,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
/* Set FIFO threshold */
chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_FTH_MASK;
@ -1041,7 +1045,7 @@ index 5989b0893..9ebcaadf4 100644
/* Set peripheral address */
chan->chan_reg.dma_spar = chan->dma_sconfig.src_addr;
@@ -825,6 +1247,162 @@ static void stm32_dma_clear_reg(struct stm32_dma_chan_reg *regs)
@@ -825,6 +1248,162 @@ static void stm32_dma_clear_reg(struct stm32_dma_chan_reg *regs)
memset(regs, 0, sizeof(struct stm32_dma_chan_reg));
}
@ -1204,7 +1208,7 @@ index 5989b0893..9ebcaadf4 100644
static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
struct dma_chan *c, struct scatterlist *sgl,
u32 sg_len, enum dma_transfer_direction direction,
@@ -832,9 +1410,6 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
@@ -832,9 +1411,6 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
{
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
struct stm32_dma_desc *desc;
@ -1214,7 +1218,7 @@ index 5989b0893..9ebcaadf4 100644
int i, ret;
if (!chan->config_init) {
@@ -857,48 +1432,140 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
@@ -857,48 +1433,140 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
else
chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL;
@ -1375,7 +1379,7 @@ index 5989b0893..9ebcaadf4 100644
int i, ret;
if (!buf_len || !period_len) {
@@ -927,7 +1594,8 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
@@ -927,7 +1595,8 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
return NULL;
}
@ -1385,7 +1389,7 @@ index 5989b0893..9ebcaadf4 100644
if (ret < 0)
return NULL;
@@ -946,28 +1614,49 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
@@ -946,28 +1615,49 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
/* Clear periph ctrl if client set it */
chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL;
@ -1447,7 +1451,7 @@ index 5989b0893..9ebcaadf4 100644
return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
}
@@ -1008,13 +1697,13 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
@@ -1008,13 +1698,13 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
STM32_DMA_SCR_PINC |
STM32_DMA_SCR_TCIE |
STM32_DMA_SCR_TEIE;
@ -1463,7 +1467,7 @@ index 5989b0893..9ebcaadf4 100644
}
desc->num_sgs = num_sgs;
@@ -1023,18 +1712,6 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
@@ -1023,18 +1713,6 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
}
@ -1482,7 +1486,7 @@ index 5989b0893..9ebcaadf4 100644
/**
* stm32_dma_is_current_sg - check that expected sg_req is currently transferred
* @chan: dma channel
@@ -1081,6 +1758,10 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
@@ -1081,6 +1759,10 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
struct stm32_dma_sg_req *sg_req = &chan->desc->sg_req[chan->next_sg];
int i;
@ -1493,7 +1497,7 @@ index 5989b0893..9ebcaadf4 100644
/*
* Calculate the residue means compute the descriptors
* information:
@@ -1112,7 +1793,7 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
@@ -1112,7 +1794,7 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
n_sg++;
if (n_sg == chan->desc->num_sgs)
n_sg = 0;
@ -1502,7 +1506,7 @@ index 5989b0893..9ebcaadf4 100644
}
/*
@@ -1124,7 +1805,7 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
@@ -1124,7 +1806,7 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
*/
if (!chan->desc->cyclic || n_sg != 0)
for (i = n_sg; i < desc->num_sgs; i++)
@ -1511,7 +1515,7 @@ index 5989b0893..9ebcaadf4 100644
if (!chan->mem_burst)
return residue;
@@ -1142,11 +1823,23 @@ static enum dma_status stm32_dma_tx_status(struct dma_chan *c,
@@ -1142,11 +1824,23 @@ static enum dma_status stm32_dma_tx_status(struct dma_chan *c,
struct dma_tx_state *state)
{
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
@ -1535,7 +1539,7 @@ index 5989b0893..9ebcaadf4 100644
status = dma_cookie_status(c, cookie, state);
if (status == DMA_COMPLETE || !state)
return status;
@@ -1203,25 +1896,51 @@ static void stm32_dma_free_chan_resources(struct dma_chan *c)
@@ -1203,25 +1897,51 @@ static void stm32_dma_free_chan_resources(struct dma_chan *c)
pm_runtime_put(dmadev->ddev.dev);
vchan_free_chan_resources(to_virt_chan(c));
@ -1592,7 +1596,7 @@ index 5989b0893..9ebcaadf4 100644
}
static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
@@ -1259,6 +1978,9 @@ static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
@@ -1259,6 +1979,9 @@ static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
stm32_dma_set_config(chan, &cfg);
@ -1602,7 +1606,7 @@ index 5989b0893..9ebcaadf4 100644
return c;
}
@@ -1271,10 +1993,13 @@ MODULE_DEVICE_TABLE(of, stm32_dma_of_match);
@@ -1271,10 +1994,13 @@ MODULE_DEVICE_TABLE(of, stm32_dma_of_match);
static int stm32_dma_probe(struct platform_device *pdev)
{
struct stm32_dma_chan *chan;
@ -1616,7 +1620,7 @@ index 5989b0893..9ebcaadf4 100644
int i, ret;
match = of_match_device(stm32_dma_of_match, &pdev->dev);
@@ -1296,8 +2021,10 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1296,8 +2022,10 @@ static int stm32_dma_probe(struct platform_device *pdev)
dmadev->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(dmadev->clk)) {
@ -1629,7 +1633,7 @@ index 5989b0893..9ebcaadf4 100644
}
ret = clk_prepare_enable(dmadev->clk);
@@ -1309,13 +2036,26 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1309,13 +2037,26 @@ static int stm32_dma_probe(struct platform_device *pdev)
dmadev->mem2mem = of_property_read_bool(pdev->dev.of_node,
"st,mem2mem");
@ -1660,7 +1664,7 @@ index 5989b0893..9ebcaadf4 100644
dma_cap_set(DMA_SLAVE, dd->cap_mask);
dma_cap_set(DMA_PRIVATE, dd->cap_mask);
dma_cap_set(DMA_CYCLIC, dd->cap_mask);
@@ -1336,7 +2076,9 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1336,7 +2077,9 @@ static int stm32_dma_probe(struct platform_device *pdev)
BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
dd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
dd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
@ -1670,7 +1674,7 @@ index 5989b0893..9ebcaadf4 100644
dd->dev = &pdev->dev;
INIT_LIST_HEAD(&dd->channels);
@@ -1351,11 +2093,27 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1351,11 +2094,27 @@ static int stm32_dma_probe(struct platform_device *pdev)
chan->id = i;
chan->vchan.desc_free = stm32_dma_desc_free;
vchan_init(&chan->vchan, dd);
@ -1699,7 +1703,7 @@ index 5989b0893..9ebcaadf4 100644
for (i = 0; i < STM32_DMA_MAX_CHANNELS; i++) {
chan = &dmadev->chan[i];
@@ -1396,7 +2154,11 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1396,7 +2155,11 @@ static int stm32_dma_probe(struct platform_device *pdev)
err_unregister:
dma_async_device_unregister(dd);
@ -1712,7 +1716,7 @@ index 5989b0893..9ebcaadf4 100644
clk_disable_unprepare(dmadev->clk);
return ret;
@@ -1427,7 +2189,44 @@ static int stm32_dma_runtime_resume(struct device *dev)
@@ -1427,7 +2190,44 @@ static int stm32_dma_runtime_resume(struct device *dev)
}
#endif
@ -1757,7 +1761,7 @@ index 5989b0893..9ebcaadf4 100644
SET_RUNTIME_PM_OPS(stm32_dma_runtime_suspend,
stm32_dma_runtime_resume, NULL)
};
@@ -1438,10 +2237,11 @@ static struct platform_driver stm32_dma_driver = {
@@ -1438,10 +2238,11 @@ static struct platform_driver stm32_dma_driver = {
.of_match_table = stm32_dma_of_match,
.pm = &stm32_dma_pm_ops,
},
@ -1772,7 +1776,7 @@ index 5989b0893..9ebcaadf4 100644
-subsys_initcall(stm32_dma_init);
+device_initcall(stm32_dma_init);
diff --git a/drivers/dma/stm32-dmamux.c b/drivers/dma/stm32-dmamux.c
index 3c89bd39e..bbfa14100 100644
index 3c89bd39e0968..bbfa141004cdf 100644
--- a/drivers/dma/stm32-dmamux.c
+++ b/drivers/dma/stm32-dmamux.c
@@ -35,12 +35,14 @@ struct stm32_dmamux {
@ -1924,7 +1928,7 @@ index 3c89bd39e..bbfa14100 100644
stm32_dmamux_runtime_resume, NULL)
};
diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
index 5838311cf..856421335 100644
index 5838311cf9900..85642133554eb 100644
--- a/drivers/dma/stm32-mdma.c
+++ b/drivers/dma/stm32-mdma.c
@@ -199,7 +199,9 @@
@ -2498,7 +2502,7 @@ index 5838311cf..856421335 100644
stm32_mdma_runtime_resume, NULL)
};
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 801356275..07f6e1136 100644
index 8013562751a50..07f6e1136dbf8 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -258,6 +258,9 @@ struct dma_chan {

380
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0007-ARM-stm32mp1-r1-DRM.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0007-ARM-stm32mp1-r2-DRM.patch
View File

@ -1,11 +1,15 @@
From 29a46aadaab8285eafc89b86fb6db1b092979589 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:41:19 +0200
Subject: [PATCH 07/23] ARM-stm32mp1-r1-DRM
From 8cfec718ba7f8e1e8e004d7033b4f48b901b2779 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:43 +0200
Subject: [PATCH 07/22] ARM-stm32mp1-r2-rc8-DRM
---
.../display/panel/orisetech,otm8009a.txt | 23 --
.../display/panel/orisetech,otm8009a.yaml | 53 ++++
.../display/panel/raydium,rm68200.txt | 25 --
.../display/panel/raydium,rm68200.yaml | 52 ++++
drivers/gpu/drm/bridge/sii902x.c | 145 +++++++++-
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 160 +++++++++--
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 212 ++++++++++----
drivers/gpu/drm/drm_modes.c | 19 +-
.../gpu/drm/panel/panel-orisetech-otm8009a.c | 20 +-
drivers/gpu/drm/panel/panel-raydium-rm68200.c | 14 +-
@ -15,10 +19,191 @@ Subject: [PATCH 07/23] ARM-stm32mp1-r1-DRM
drivers/input/touchscreen/edt-ft5x06.c | 18 +-
drivers/input/touchscreen/goodix.c | 16 ++
include/uapi/drm/drm_mode.h | 6 +
11 files changed, 512 insertions(+), 166 deletions(-)
15 files changed, 648 insertions(+), 235 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.txt
create mode 100644 Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml
delete mode 100644 Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt
create mode 100644 Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml
diff --git a/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.txt b/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.txt
deleted file mode 100644
index 203b03eefb688..0000000000000
--- a/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-Orise Tech OTM8009A 3.97" 480x800 TFT LCD panel (MIPI-DSI video mode)
-
-The Orise Tech OTM8009A is a 3.97" 480x800 TFT LCD panel connected using
-a MIPI-DSI video interface. Its backlight is managed through the DSI link.
-
-Required properties:
- - compatible: "orisetech,otm8009a"
- - reg: the virtual channel number of a DSI peripheral
-
-Optional properties:
- - reset-gpios: a GPIO spec for the reset pin (active low).
- - power-supply: phandle of the regulator that provides the supply voltage.
-
-Example:
-&dsi {
- ...
- panel@0 {
- compatible = "orisetech,otm8009a";
- reg = <0>;
- reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
- power-supply = <&v1v8>;
- };
-};
diff --git a/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml b/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml
new file mode 100644
index 0000000000000..6eda24035c9eb
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/orisetech,otm8009a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Orise Tech OTM8009A 3.97" 480x800 panel
+
+maintainers:
+ - Yannick Fertre <yannick.fertre@st.com>
+
+description:
+ The Orise Tech OTM8009A is a 3.97" 480x800 TFT LCD panel connected using
+ a MIPI-DSI video interface. Its backlight is managed through the DSI link.
+
+properties:
+ compatible:
+ const: orisetech,otm8009a
+
+ power-supply: true
+ reset-gpios: true
+ backlight: true
+ port: true
+ reg: true
+
+required:
+ - compatible
+ - reg
+ - port
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ display1: display {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ panel {
+ compatible = "orisetech,otm8009a";
+ reg = <0>;
+ reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
+ power-supply = <&v1v8>;
+
+ port {
+ panel_in_dsi: endpoint {
+ remote-endpoint = <&controller_out_dsi>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt b/Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt
deleted file mode 100644
index cbb79ef3bfc98..0000000000000
--- a/Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Raydium Semiconductor Corporation RM68200 5.5" 720p MIPI-DSI TFT LCD panel
-
-The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD
-panel connected using a MIPI-DSI video interface.
-
-Required properties:
- - compatible: "raydium,rm68200"
- - reg: the virtual channel number of a DSI peripheral
-
-Optional properties:
- - reset-gpios: a GPIO spec for the reset pin (active low).
- - power-supply: phandle of the regulator that provides the supply voltage.
- - backlight: phandle of the backlight device attached to the panel.
-
-Example:
-&dsi {
- ...
- panel@0 {
- compatible = "raydium,rm68200";
- reg = <0>;
- reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>;
- power-supply = <&v1v8>;
- backlight = <&pwm_backlight>;
- };
-};
diff --git a/Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml b/Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml
new file mode 100644
index 0000000000000..2bbd4a0cb5da8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/raydium,rm68200.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Raydium RM68200 5.5" 720x1280 panel
+
+maintainers:
+ - Yannick Fertre <yannick.fertre@st.com>
+
+description:
+ The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD
+ panel connected using a MIPI-DSI video interface.
+
+properties:
+ compatible:
+ const: raydium,rm68200
+
+ power-supply: true
+ reset-gpios: true
+ backlight: true
+ port: true
+ reg: true
+
+required:
+ - compatible
+ - reg
+ - port
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ display0: display {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ panel {
+ compatible = "raydium,rm68200";
+ reg = <0>;
+ reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>;
+ power-supply = <&v1v8>;
+ port {
+ panel_in_dsi: endpoint {
+ remote-endpoint = <&controller_out_dsi>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c
index 38f75ac58..92299884f 100644
index 38f75ac580df4..92299884f6cb9 100644
--- a/drivers/gpu/drm/bridge/sii902x.c
+++ b/drivers/gpu/drm/bridge/sii902x.c
@@ -16,8 +16,10 @@
@ -291,7 +476,7 @@ index 38f75ac58..92299884f 100644
.id_table = sii902x_i2c_ids,
};
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
index 675442bfc..1389bbfa0 100644
index 675442bfc1bd7..34a9569e28f6d 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
@@ -90,6 +90,7 @@
@ -323,41 +508,51 @@ index 675442bfc..1389bbfa0 100644
#define DSI_INT_MSK0 0xc4
#define DSI_INT_MSK1 0xc8
@@ -297,7 +312,13 @@ static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
@@ -295,9 +310,7 @@ static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
{
struct dw_mipi_dsi *dsi = host_to_dsi(host);
const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data;
struct drm_bridge *bridge;
struct drm_panel *panel;
- struct drm_bridge *bridge;
- struct drm_panel *panel;
- int ret;
+ int i, nb_endpoints;
+ int ret = -ENODEV;
+
+ /* Get number of endpoints */
+ nb_endpoints = of_graph_get_endpoint_count(host->dev->of_node);
+ if (!nb_endpoints)
+ return -ENODEV;
if (device->lanes > dsi->plat_data->max_data_lanes) {
dev_err(dsi->dev, "the number of data lanes(%u) is too many\n",
@@ -310,8 +331,16 @@ static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
@@ -310,21 +323,6 @@ static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
dsi->format = device->format;
dsi->mode_flags = device->mode_flags;
- ret = drm_of_find_panel_or_bridge(host->dev->of_node, 1, 0,
- &panel, &bridge);
+ for (i = 1; i < nb_endpoints; i++) {
+ ret = drm_of_find_panel_or_bridge(host->dev->of_node, i, 0,
+ &panel, &bridge);
+ if (!ret)
+ break;
+ else if (ret == -EPROBE_DEFER)
+ return ret;
+ }
+
+ /* check if an error is returned >> no panel or bridge detected */
if (ret)
return ret;
- if (ret)
- return ret;
-
- if (panel) {
- bridge = drm_panel_bridge_add(panel, DRM_MODE_CONNECTOR_DSI);
- if (IS_ERR(bridge))
- return PTR_ERR(bridge);
- }
-
- dsi->panel_bridge = bridge;
-
- drm_bridge_add(&dsi->bridge);
-
if (pdata->host_ops && pdata->host_ops->attach) {
ret = pdata->host_ops->attach(pdata->priv_data, device);
if (ret < 0)
@@ -347,10 +345,6 @@ static int dw_mipi_dsi_host_detach(struct mipi_dsi_host *host,
return ret;
}
@@ -360,13 +389,32 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi,
- drm_of_panel_bridge_remove(host->dev->of_node, 1, 0);
-
- drm_bridge_remove(&dsi->bridge);
-
return 0;
}
@@ -360,13 +354,32 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi,
bool lpm = msg->flags & MIPI_DSI_MSG_USE_LPM;
u32 val = 0;
@ -391,7 +586,7 @@ index 675442bfc..1389bbfa0 100644
}
static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)
@@ -396,6 +444,42 @@ static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)
@@ -396,6 +409,42 @@ static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)
return 0;
}
@ -434,7 +629,7 @@ index 675442bfc..1389bbfa0 100644
static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi,
const struct mipi_dsi_packet *packet)
{
@@ -425,6 +509,12 @@ static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi,
@@ -425,6 +474,12 @@ static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi,
"failed to get available write payload FIFO\n");
return ret;
}
@ -447,7 +642,7 @@ index 675442bfc..1389bbfa0 100644
}
word = 0;
@@ -458,6 +548,12 @@ static int dw_mipi_dsi_read(struct dw_mipi_dsi *dsi,
@@ -458,6 +513,12 @@ static int dw_mipi_dsi_read(struct dw_mipi_dsi *dsi,
return ret;
}
@ -460,7 +655,7 @@ index 675442bfc..1389bbfa0 100644
val = dsi_read(dsi, DSI_GEN_PLD_DATA);
for (j = 0; j < 4 && j + i < len; j++)
buf[i + j] = val >> (8 * j);
@@ -472,6 +568,7 @@ static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host,
@@ -472,6 +533,7 @@ static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host,
struct dw_mipi_dsi *dsi = host_to_dsi(host);
struct mipi_dsi_packet packet;
int ret, nb_bytes;
@ -468,7 +663,7 @@ index 675442bfc..1389bbfa0 100644
ret = mipi_dsi_create_packet(&packet, msg);
if (ret) {
@@ -483,24 +580,32 @@ static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host,
@@ -483,24 +545,32 @@ static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host,
if (dsi->slave)
dw_mipi_message_config(dsi->slave, msg);
@ -515,7 +710,7 @@ index 675442bfc..1389bbfa0 100644
return nb_bytes;
}
@@ -541,16 +646,22 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
@@ -541,16 +611,22 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
unsigned long mode_flags)
{
@ -539,7 +734,7 @@ index 675442bfc..1389bbfa0 100644
dsi_write(dsi, DSI_PWR_UP, POWERUP);
}
@@ -611,14 +722,6 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
@@ -611,14 +687,6 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
dsi_write(dsi, DSI_DPI_VCID, DPI_VCID(dsi->channel));
dsi_write(dsi, DSI_DPI_COLOR_CODING, color);
dsi_write(dsi, DSI_DPI_CFG_POL, val);
@ -554,7 +749,7 @@ index 675442bfc..1389bbfa0 100644
}
static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
@@ -814,7 +917,8 @@ static void dw_mipi_dsi_bridge_post_disable(struct drm_bridge *bridge)
@@ -814,7 +882,8 @@ static void dw_mipi_dsi_bridge_post_disable(struct drm_bridge *bridge)
* This needs to be fixed in the drm_bridge framework and the API
* needs to be updated to manage our own call chains...
*/
@ -564,8 +759,83 @@ index 675442bfc..1389bbfa0 100644
if (dsi->slave) {
dw_mipi_dsi_disable(dsi->slave);
@@ -982,6 +1051,9 @@ __dw_mipi_dsi_probe(struct platform_device *pdev,
struct reset_control *apb_rst;
struct dw_mipi_dsi *dsi;
struct resource *res;
+ struct drm_bridge *bridge;
+ struct drm_panel *panel;
+ int i, nb_endpoints;
int ret;
dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
@@ -1052,8 +1124,7 @@ __dw_mipi_dsi_probe(struct platform_device *pdev,
ret = mipi_dsi_host_register(&dsi->dsi_host);
if (ret) {
dev_err(dev, "Failed to register MIPI host: %d\n", ret);
- dw_mipi_dsi_debugfs_remove(dsi);
- return ERR_PTR(ret);
+ goto err_pmr_enable;
}
dsi->bridge.driver_private = dsi;
@@ -1062,11 +1133,54 @@ __dw_mipi_dsi_probe(struct platform_device *pdev,
dsi->bridge.of_node = pdev->dev.of_node;
#endif
+ /* Get number of endpoints */
+ nb_endpoints = of_graph_get_endpoint_count(pdev->dev.of_node);
+ if (!nb_endpoints) {
+ ret = -ENODEV;
+ goto err_host_reg;
+ }
+
+ for (i = 1; i < nb_endpoints; i++) {
+ ret = drm_of_find_panel_or_bridge(pdev->dev.of_node, i, 0,
+ &panel, &bridge);
+ if (!ret)
+ break;
+ else if (ret == -EPROBE_DEFER)
+ goto err_host_reg;
+ }
+
+ /* check if an error is returned >> no panel or bridge detected */
+ if (ret)
+ goto err_host_reg;
+
+ if (panel) {
+ bridge = drm_panel_bridge_add(panel, DRM_MODE_CONNECTOR_DSI);
+ if (IS_ERR(bridge)) {
+ ret = PTR_ERR(bridge);
+ goto err_host_reg;
+ }
+ }
+
+ dsi->panel_bridge = bridge;
+
+ drm_bridge_add(&dsi->bridge);
+
return dsi;
+
+err_host_reg:
+ mipi_dsi_host_unregister(&dsi->dsi_host);
+
+err_pmr_enable:
+ pm_runtime_disable(dev);
+ dw_mipi_dsi_debugfs_remove(dsi);
+
+ return ERR_PTR(ret);
}
static void __dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi)
{
+ drm_bridge_remove(&dsi->bridge);
+ drm_panel_bridge_remove(dsi->panel_bridge);
mipi_dsi_host_unregister(&dsi->dsi_host);
pm_runtime_disable(dsi->dev);
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 3fd35e6b9..80de2fb7e 100644
index 3fd35e6b9d535..80de2fb7ed817 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -127,7 +127,7 @@ EXPORT_SYMBOL(drm_mode_probed_add);
@ -609,7 +879,7 @@ index 3fd35e6b9..80de2fb7e 100644
EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode);
diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
index c7b48df88..2fdf9d183 100644
index c7b48df8869a1..2fdf9d183d239 100644
--- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
+++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
@@ -101,20 +101,6 @@ static void otm8009a_dcs_write_buf(struct otm8009a *ctx, const void *data,
@ -661,7 +931,7 @@ index c7b48df88..2fdf9d183 100644
drm_panel_init(&ctx->panel);
ctx->panel.dev = dev;
diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
index ba889625a..b20e26666 100644
index ba889625ad435..b20e26666c7cb 100644
--- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c
+++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
@@ -84,15 +84,15 @@ struct rm68200 {
@ -696,7 +966,7 @@ index ba889625a..b20e26666 100644
drm_panel_init(&ctx->panel);
ctx->panel.dev = dev;
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
index a03a642c1..d1689758f 100644
index a03a642c147cc..d1689758fea0d 100644
--- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
+++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
@@ -260,8 +260,11 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, const struct drm_display_mode *mode,
@ -724,7 +994,7 @@ index a03a642c1..d1689758f 100644
}
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 3ab4fbf8e..1f7836be2 100644
index 3ab4fbf8eb0d1..1f7836be2e6a9 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -15,6 +15,7 @@
@ -1176,7 +1446,7 @@ index 3ab4fbf8e..1f7836be2 100644
pm_runtime_disable(ddev->dev);
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
index a1ad0ae3b..310e87f06 100644
index a1ad0ae3b0068..310e87f0667c2 100644
--- a/drivers/gpu/drm/stm/ltdc.h
+++ b/drivers/gpu/drm/stm/ltdc.h
@@ -19,6 +19,7 @@ struct ltdc_caps {
@ -1188,7 +1458,7 @@ index a1ad0ae3b..310e87f06 100644
#define LTDC_MAX_LAYER 4
diff --git a/drivers/input/touchscreen/edt-ft5x06.c b/drivers/input/touchscreen/edt-ft5x06.c
index 240e8de24..66f790de8 100644
index b41b97c962edc..fd21d31b64644 100644
--- a/drivers/input/touchscreen/edt-ft5x06.c
+++ b/drivers/input/touchscreen/edt-ft5x06.c
@@ -28,6 +28,8 @@
@ -1200,7 +1470,7 @@ index 240e8de24..66f790de8 100644
#define WORK_REGISTER_THRESHOLD 0x00
#define WORK_REGISTER_REPORT_RATE 0x08
@@ -1042,6 +1044,8 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
@@ -1048,6 +1050,8 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
const struct edt_i2c_chip_data *chip_data;
struct edt_ft5x06_ts_data *tsdata;
u8 buf[2] = { 0xfc, 0x00 };
@ -1209,7 +1479,7 @@ index 240e8de24..66f790de8 100644
struct input_dev *input;
unsigned long irq_flags;
int error;
@@ -1107,7 +1111,7 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
@@ -1113,7 +1117,7 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
error = edt_ft5x06_ts_identify(client, tsdata, fw_version);
if (error) {
@ -1218,7 +1488,7 @@ index 240e8de24..66f790de8 100644
return error;
}
@@ -1176,6 +1180,18 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
@@ -1182,6 +1186,18 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
if (error)
return error;
@ -1238,7 +1508,7 @@ index 240e8de24..66f790de8 100644
device_init_wakeup(&client->dev, 1);
diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c
index 0403102e8..8816f2cd4 100644
index 37b35ab97beb2..ed63c343ba423 100644
--- a/drivers/input/touchscreen/goodix.c
+++ b/drivers/input/touchscreen/goodix.c
@@ -21,6 +21,7 @@
@ -1249,7 +1519,7 @@ index 0403102e8..8816f2cd4 100644
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/regulator/consumer.h>
@@ -844,6 +845,8 @@ static int goodix_ts_probe(struct i2c_client *client,
@@ -866,6 +867,8 @@ static int goodix_ts_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct goodix_ts_data *ts;
@ -1258,7 +1528,7 @@ index 0403102e8..8816f2cd4 100644
int error;
dev_dbg(&client->dev, "I2C Address: 0x%02x\n", client->addr);
@@ -936,6 +939,17 @@ static int goodix_ts_probe(struct i2c_client *client,
@@ -958,6 +961,17 @@ static int goodix_ts_probe(struct i2c_client *client,
return error;
}
@ -1276,7 +1546,7 @@ index 0403102e8..8816f2cd4 100644
return 0;
}
@@ -990,6 +1004,7 @@ static int __maybe_unused goodix_suspend(struct device *dev)
@@ -1012,6 +1026,7 @@ static int __maybe_unused goodix_suspend(struct device *dev)
* sooner, delay 58ms here.
*/
msleep(58);
@ -1284,7 +1554,7 @@ index 0403102e8..8816f2cd4 100644
return 0;
}
@@ -1054,6 +1069,7 @@ static const struct of_device_id goodix_of_match[] = {
@@ -1076,6 +1091,7 @@ static const struct of_device_id goodix_of_match[] = {
{ .compatible = "goodix,gt9271" },
{ .compatible = "goodix,gt928" },
{ .compatible = "goodix,gt967" },
@ -1293,7 +1563,7 @@ index 0403102e8..8816f2cd4 100644
};
MODULE_DEVICE_TABLE(of, goodix_of_match);
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 735c8cfda..28a9ea94e 100644
index 735c8cfdaaa14..28a9ea94ea2ed 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -97,6 +97,12 @@ extern "C" {

124
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0008-ARM-stm32mp1-r1-HWSPINLOCK.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0008-ARM-stm32mp1-r2-HWSPINLOCK.patch
View File

@ -1,16 +1,17 @@
From 9e9f45cd3d4887d9af58da15e627443838da1645 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:41:46 +0200
Subject: [PATCH 08/23] ARM-stm32mp1-r1-HWSPINLOCK
From 10e0333454dbd6ccecb67ad303eae3aef707ce0b Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:43 +0200
Subject: [PATCH 08/22] ARM-stm32mp1-r2-rc8-HWSPINLOCK
---
Documentation/hwspinlock.txt | 10 ++-
drivers/hwspinlock/hwspinlock_core.c | 82 ++++++++++++++++++------
drivers/hwspinlock/hwspinlock_internal.h | 2 +
3 files changed, 73 insertions(+), 21 deletions(-)
drivers/hwspinlock/stm32_hwspinlock.c | 62 +++++++++++-------
4 files changed, 112 insertions(+), 44 deletions(-)
diff --git a/Documentation/hwspinlock.txt b/Documentation/hwspinlock.txt
index 6f03713b7..605bd2dc8 100644
index 6f03713b70039..605bd2dc8a03e 100644
--- a/Documentation/hwspinlock.txt
+++ b/Documentation/hwspinlock.txt
@@ -54,9 +54,11 @@ Should be called from a process context (might sleep).
@ -43,7 +44,7 @@ index 6f03713b7..605bd2dc8 100644
};
diff --git a/drivers/hwspinlock/hwspinlock_core.c b/drivers/hwspinlock/hwspinlock_core.c
index 8862445aa..ac76631c7 100644
index 8862445aa8580..ac76631c7059b 100644
--- a/drivers/hwspinlock/hwspinlock_core.c
+++ b/drivers/hwspinlock/hwspinlock_core.c
@@ -29,6 +29,8 @@
@ -231,7 +232,7 @@ index 8862445aa..ac76631c7 100644
return ret;
}
diff --git a/drivers/hwspinlock/hwspinlock_internal.h b/drivers/hwspinlock/hwspinlock_internal.h
index 9eb6bd020..c808e116c 100644
index 9eb6bd020dc70..c808e116ce3fe 100644
--- a/drivers/hwspinlock/hwspinlock_internal.h
+++ b/drivers/hwspinlock/hwspinlock_internal.h
@@ -35,11 +35,13 @@ struct hwspinlock_ops {
@ -248,6 +249,113 @@ index 9eb6bd020..c808e116c 100644
void *priv;
};
diff --git a/drivers/hwspinlock/stm32_hwspinlock.c b/drivers/hwspinlock/stm32_hwspinlock.c
index c8eacf4f9692b..c7c8c4cc2c5fa 100644
--- a/drivers/hwspinlock/stm32_hwspinlock.c
+++ b/drivers/hwspinlock/stm32_hwspinlock.c
@@ -54,8 +54,23 @@ static const struct hwspinlock_ops stm32_hwspinlock_ops = {
.relax = stm32_hwspinlock_relax,
};
+static void stm32_hwspinlock_disable_clk(void *data)
+{
+ struct platform_device *pdev = data;
+ struct stm32_hwspinlock *hw = platform_get_drvdata(pdev);
+ struct device *dev = &pdev->dev;
+
+ pm_runtime_get_sync(dev);
+ pm_runtime_disable(dev);
+ pm_runtime_set_suspended(dev);
+ pm_runtime_put_noidle(dev);
+
+ clk_disable_unprepare(hw->clk);
+}
+
static int stm32_hwspinlock_probe(struct platform_device *pdev)
{
+ struct device *dev = &pdev->dev;
struct stm32_hwspinlock *hw;
void __iomem *io_base;
struct resource *res;
@@ -63,46 +78,48 @@ static int stm32_hwspinlock_probe(struct platform_device *pdev)
int i, ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- io_base = devm_ioremap_resource(&pdev->dev, res);
+ io_base = devm_ioremap_resource(dev, res);
if (IS_ERR(io_base))
return PTR_ERR(io_base);
array_size = STM32_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
- hw = devm_kzalloc(&pdev->dev, sizeof(*hw) + array_size, GFP_KERNEL);
+ hw = devm_kzalloc(dev, sizeof(*hw) + array_size, GFP_KERNEL);
if (!hw)
return -ENOMEM;
- hw->clk = devm_clk_get(&pdev->dev, "hsem");
+ hw->clk = devm_clk_get(dev, "hsem");
if (IS_ERR(hw->clk))
return PTR_ERR(hw->clk);
- for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++)
- hw->bank.lock[i].priv = io_base + i * sizeof(u32);
+ ret = clk_prepare_enable(hw->clk);
+ if (ret) {
+ dev_err(dev, "Failed to prepare_enable clock\n");
+ return ret;
+ }
+
+ pm_runtime_get_noresume(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+ pm_runtime_put(dev);
platform_set_drvdata(pdev, hw);
- pm_runtime_enable(&pdev->dev);
- ret = hwspin_lock_register(&hw->bank, &pdev->dev, &stm32_hwspinlock_ops,
- 0, STM32_MUTEX_NUM_LOCKS);
+ ret = devm_add_action_or_reset(dev, stm32_hwspinlock_disable_clk, pdev);
+ if (ret) {
+ dev_err(dev, "Failed to register action\n");
+ return ret;
+ }
- if (ret)
- pm_runtime_disable(&pdev->dev);
-
- return ret;
-}
+ for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++)
+ hw->bank.lock[i].priv = io_base + i * sizeof(u32);
-static int stm32_hwspinlock_remove(struct platform_device *pdev)
-{
- struct stm32_hwspinlock *hw = platform_get_drvdata(pdev);
- int ret;
+ ret = devm_hwspin_lock_register(dev, &hw->bank, &stm32_hwspinlock_ops,
+ 0, STM32_MUTEX_NUM_LOCKS);
- ret = hwspin_lock_unregister(&hw->bank);
if (ret)
- dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
-
- pm_runtime_disable(&pdev->dev);
+ dev_err(dev, "Failed to register hwspinlock\n");
- return 0;
+ return ret;
}
static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev)
@@ -137,7 +154,6 @@ MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids);
static struct platform_driver stm32_hwspinlock_driver = {
.probe = stm32_hwspinlock_probe,
- .remove = stm32_hwspinlock_remove,
.driver = {
.name = "stm32_hwspinlock",
.of_match_table = stm32_hwpinlock_ids,
--
2.17.1

772
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0009-ARM-stm32mp1-r1-I2C-IIO-IRQCHIP.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0009-ARM-stm32mp1-r2-I2C-IIO-IRQCHIP.patch
View File

File diff suppressed because it is too large Load Diff

1249
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0010-ARM-stm32mp1-r1-MAILBOX-REMOTEPROC-RPMSG.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0010-ARM-stm32mp1-r2-MAILBOX-REMOTEPROC-RPMSG.patch
View File

File diff suppressed because it is too large Load Diff

165
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0011-ARM-stm32mp1-r1-RESET-RTC-WATCHDOG.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0011-ARM-stm32mp1-r2-RESET-RTC-WATCHDOG.patch
View File

@ -1,17 +1,49 @@
From 835fe45ed0a3c0ef8cb2b74a900d227a124b4761 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:44:22 +0200
Subject: [PATCH 11/23] ARM-stm32mp1-r1-RESET-RTC-WATCHDOG
From 60ca74ac3c89a476b38d4f41c3bea3745779587e Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:46 +0200
Subject: [PATCH 11/22] ARM-stm32mp1-r2-rc8-RESET-RTC-WATCHDOG
---
drivers/reset/reset-stm32mp1.c | 83 +++++++++++------
drivers/rtc/Kconfig | 1 +
drivers/rtc/rtc-stm32.c | 159 +++++++++++++++++++++++++++------
drivers/watchdog/stm32_iwdg.c | 6 +-
4 files changed, 192 insertions(+), 57 deletions(-)
.../devicetree/bindings/rtc/st,stm32-rtc.txt | 10 +-
drivers/reset/reset-stm32mp1.c | 83 +++++---
drivers/rtc/Kconfig | 1 +
drivers/rtc/rtc-stm32.c | 180 +++++++++++++++---
drivers/watchdog/stm32_iwdg.c | 6 +-
include/dt-bindings/reset/stm32mp1-resets.h | 15 ++
include/dt-bindings/rtc/rtc-stm32.h | 13 ++
7 files changed, 246 insertions(+), 62 deletions(-)
create mode 100644 include/dt-bindings/rtc/rtc-stm32.h
diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
index 130ca5b982538..bab0df81af2cc 100644
--- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
@@ -21,9 +21,14 @@ Required properties:
domain (RTC registers) write protection.
It is required on stm32(f4/f7/h7).
-Optional properties (to override default rtc_ck parent clock on stm32(f4/f7/h7):
+Optional properties:
+* to override default rtc_ck parent clock on stm32(f4/f7/h7):
- assigned-clocks: reference to the rtc_ck clock entry.
- assigned-clock-parents: phandle of the new parent clock of rtc_ck.
+* to select and enable RTC Low Speed Clock Output on stm32mp1:
+- st,lsco: defines the RTC output on which RTC Low-Speed Clock is Output. The
+ valid output values are defined in <dt-bindings/rtc/rtc-stm32.h>.
+- pinctrl state named "default" may be defined to reserve pin for RTC output.
Example:
@@ -58,4 +63,7 @@ Example:
clock-names = "pclk", "rtc_ck";
interrupts-extended = <&intc GIC_SPI 3 IRQ_TYPE_NONE>,
<&exti 19 1>;
+ st,lsco = <RTC_OUT2_RMP>;
+ pinctrl-0 = <&rtc_out2_rmp_pins_a>;
+ pinctrl-names = "default";
};
diff --git a/drivers/reset/reset-stm32mp1.c b/drivers/reset/reset-stm32mp1.c
index b221a2804..daf0e26b2 100644
index b221a28041fa0..daf0e26b27a8d 100644
--- a/drivers/reset/reset-stm32mp1.c
+++ b/drivers/reset/reset-stm32mp1.c
@@ -4,14 +4,21 @@
@ -123,7 +155,7 @@ index b221a2804..daf0e26b2 100644
+}
+OF_DECLARE_1(clk, stm32mp1_rcc, "st,stm32mp1-rcc", stm32mp1_reset_of_init_drv);
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index c5b980414..d590b4205 100644
index c5b9804140860..d590b420525ce 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1862,6 +1862,7 @@ config RTC_DRV_R7301
@ -135,7 +167,7 @@ index c5b980414..d590b4205 100644
help
If you say yes here you get support for the STM32 On-Chip
diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
index 2999e33a7..5bfe655c5 100644
index 2999e33a7e376..3cf51497681a4 100644
--- a/drivers/rtc/rtc-stm32.c
+++ b/drivers/rtc/rtc-stm32.c
@@ -6,6 +6,8 @@
@ -189,16 +221,17 @@ index 2999e33a7..5bfe655c5 100644
u16 verr;
};
@@ -114,7 +130,7 @@ struct stm32_rtc_data {
@@ -114,7 +130,8 @@ struct stm32_rtc_data {
void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
bool has_pclk;
bool need_dbp;
- bool has_wakeirq;
+ bool has_lsco;
+ bool need_accuracy;
};
struct stm32_rtc {
@@ -127,9 +143,87 @@ struct stm32_rtc {
@@ -127,9 +144,87 @@ struct stm32_rtc {
struct clk *rtc_ck;
const struct stm32_rtc_data *data;
int irq_alarm;
@ -287,16 +320,17 @@ index 2999e33a7..5bfe655c5 100644
static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
{
const struct stm32_rtc_registers *regs = &rtc->data->regs;
@@ -547,7 +641,7 @@ static void stm32_rtc_clear_events(struct stm32_rtc *rtc,
@@ -547,7 +642,8 @@ static void stm32_rtc_clear_events(struct stm32_rtc *rtc,
static const struct stm32_rtc_data stm32_rtc_data = {
.has_pclk = false,
.need_dbp = true,
- .has_wakeirq = false,
+ .has_lsco = false,
+ .need_accuracy = false,
.regs = {
.tr = 0x00,
.dr = 0x04,
@@ -558,6 +652,7 @@ static const struct stm32_rtc_data stm32_rtc_data = {
@@ -558,6 +654,7 @@ static const struct stm32_rtc_data stm32_rtc_data = {
.wpr = 0x24,
.sr = 0x0C, /* set to ISR offset to ease alarm management */
.scr = UNDEF_REG,
@ -304,16 +338,17 @@ index 2999e33a7..5bfe655c5 100644
.verr = UNDEF_REG,
},
.events = {
@@ -569,7 +664,7 @@ static const struct stm32_rtc_data stm32_rtc_data = {
@@ -569,7 +666,8 @@ static const struct stm32_rtc_data stm32_rtc_data = {
static const struct stm32_rtc_data stm32h7_rtc_data = {
.has_pclk = true,
.need_dbp = true,
- .has_wakeirq = false,
+ .has_lsco = false,
+ .need_accuracy = false,
.regs = {
.tr = 0x00,
.dr = 0x04,
@@ -580,6 +675,7 @@ static const struct stm32_rtc_data stm32h7_rtc_data = {
@@ -580,6 +678,7 @@ static const struct stm32_rtc_data stm32h7_rtc_data = {
.wpr = 0x24,
.sr = 0x0C, /* set to ISR offset to ease alarm management */
.scr = UNDEF_REG,
@ -321,16 +356,17 @@ index 2999e33a7..5bfe655c5 100644
.verr = UNDEF_REG,
},
.events = {
@@ -600,7 +696,7 @@ static void stm32mp1_rtc_clear_events(struct stm32_rtc *rtc,
@@ -600,7 +699,8 @@ static void stm32mp1_rtc_clear_events(struct stm32_rtc *rtc,
static const struct stm32_rtc_data stm32mp1_data = {
.has_pclk = true,
.need_dbp = false,
- .has_wakeirq = true,
+ .has_lsco = true,
+ .need_accuracy = true,
.regs = {
.tr = 0x00,
.dr = 0x04,
@@ -611,6 +707,7 @@ static const struct stm32_rtc_data stm32mp1_data = {
@@ -611,6 +711,7 @@ static const struct stm32_rtc_data stm32mp1_data = {
.wpr = 0x24,
.sr = 0x50,
.scr = 0x5C,
@ -338,7 +374,32 @@ index 2999e33a7..5bfe655c5 100644
.verr = 0x3F4,
},
.events = {
@@ -738,13 +835,15 @@ static int stm32_rtc_probe(struct platform_device *pdev)
@@ -641,11 +742,20 @@ static int stm32_rtc_init(struct platform_device *pdev,
pred_a_max = STM32_RTC_PRER_PRED_A >> STM32_RTC_PRER_PRED_A_SHIFT;
pred_s_max = STM32_RTC_PRER_PRED_S >> STM32_RTC_PRER_PRED_S_SHIFT;
- for (pred_a = pred_a_max; pred_a + 1 > 0; pred_a--) {
- pred_s = (rate / (pred_a + 1)) - 1;
+ if (rtc->data->need_accuracy) {
+ for (pred_a = 0; pred_a <= pred_a_max; pred_a++) {
+ pred_s = (rate / (pred_a + 1)) - 1;
+
+ if (((pred_s + 1) * (pred_a + 1)) == rate)
+ break;
+ }
+ } else {
+ for (pred_a = pred_a_max; pred_a + 1 > 0; pred_a--) {
+ pred_s = (rate / (pred_a + 1)) - 1;
- if (((pred_s + 1) * (pred_a + 1)) == rate)
- break;
+ if (((pred_s + 1) * (pred_a + 1)) == rate)
+ break;
+ }
}
/*
@@ -738,13 +848,15 @@ static int stm32_rtc_probe(struct platform_device *pdev)
} else {
rtc->pclk = devm_clk_get(&pdev->dev, "pclk");
if (IS_ERR(rtc->pclk)) {
@ -356,7 +417,7 @@ index 2999e33a7..5bfe655c5 100644
return PTR_ERR(rtc->rtc_ck);
}
@@ -781,19 +880,12 @@ static int stm32_rtc_probe(struct platform_device *pdev)
@@ -781,19 +893,12 @@ static int stm32_rtc_probe(struct platform_device *pdev)
}
ret = device_init_wakeup(&pdev->dev, true);
@ -381,7 +442,7 @@ index 2999e33a7..5bfe655c5 100644
platform_set_drvdata(pdev, rtc);
@@ -816,6 +908,21 @@ static int stm32_rtc_probe(struct platform_device *pdev)
@@ -816,6 +921,21 @@ static int stm32_rtc_probe(struct platform_device *pdev)
goto err;
}
@ -403,7 +464,7 @@ index 2999e33a7..5bfe655c5 100644
/*
* If INITS flag is reset (calendar year field set to 0x00), calendar
* must be initialized
@@ -852,6 +959,9 @@ static int stm32_rtc_remove(struct platform_device *pdev)
@@ -852,6 +972,9 @@ static int stm32_rtc_remove(struct platform_device *pdev)
const struct stm32_rtc_registers *regs = &rtc->data->regs;
unsigned int cr;
@ -413,7 +474,7 @@ index 2999e33a7..5bfe655c5 100644
/* Disable interrupts */
stm32_rtc_wpr_unlock(rtc);
cr = readl_relaxed(rtc->base + regs->cr);
@@ -881,9 +991,6 @@ static int stm32_rtc_suspend(struct device *dev)
@@ -881,9 +1004,6 @@ static int stm32_rtc_suspend(struct device *dev)
if (rtc->data->has_pclk)
clk_disable_unprepare(rtc->pclk);
@ -423,7 +484,7 @@ index 2999e33a7..5bfe655c5 100644
return 0;
}
@@ -902,15 +1009,13 @@ static int stm32_rtc_resume(struct device *dev)
@@ -902,15 +1022,13 @@ static int stm32_rtc_resume(struct device *dev)
if (ret < 0)
return ret;
@ -443,7 +504,7 @@ index 2999e33a7..5bfe655c5 100644
static struct platform_driver stm32_rtc_driver = {
.probe = stm32_rtc_probe,
diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c
index 25188d6bb..1b71c205c 100644
index 25188d6bbe152..1b71c205cee0e 100644
--- a/drivers/watchdog/stm32_iwdg.c
+++ b/drivers/watchdog/stm32_iwdg.c
@@ -163,7 +163,8 @@ static int stm32_iwdg_clk_init(struct platform_device *pdev,
@ -466,6 +527,56 @@ index 25188d6bb..1b71c205c 100644
return PTR_ERR(wdt->clk_pclk);
}
diff --git a/include/dt-bindings/reset/stm32mp1-resets.h b/include/dt-bindings/reset/stm32mp1-resets.h
index f0c3aaef67a0a..f3a0ed3178356 100644
--- a/include/dt-bindings/reset/stm32mp1-resets.h
+++ b/include/dt-bindings/reset/stm32mp1-resets.h
@@ -7,6 +7,7 @@
#ifndef _DT_BINDINGS_STM32MP1_RESET_H_
#define _DT_BINDINGS_STM32MP1_RESET_H_
+#define MCU_HOLD_BOOT_R 2144
#define LTDC_R 3072
#define DSI_R 3076
#define DDRPERFM_R 3080
@@ -105,4 +106,18 @@
#define GPIOJ_R 19785
#define GPIOK_R 19786
+/* SCMI reset domain identifiers */
+#define RST_SCMI0_SPI6 0
+#define RST_SCMI0_I2C4 1
+#define RST_SCMI0_I2C6 2
+#define RST_SCMI0_USART1 3
+#define RST_SCMI0_STGEN 4
+#define RST_SCMI0_GPIOZ 5
+#define RST_SCMI0_CRYP1 6
+#define RST_SCMI0_HASH1 7
+#define RST_SCMI0_RNG1 8
+#define RST_SCMI0_MDMA 9
+#define RST_SCMI0_MCU 10
+#define RST_SCMI0_MCU_HOLD_BOOT 11
+
#endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */
diff --git a/include/dt-bindings/rtc/rtc-stm32.h b/include/dt-bindings/rtc/rtc-stm32.h
new file mode 100644
index 0000000000000..4373c4dea5879
--- /dev/null
+++ b/include/dt-bindings/rtc/rtc-stm32.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides constants for STM32_RTC bindings.
+ */
+
+#ifndef _DT_BINDINGS_RTC_RTC_STM32_H
+#define _DT_BINDINGS_RTC_RTC_STM32_H
+
+#define RTC_OUT1 0
+#define RTC_OUT2 1
+#define RTC_OUT2_RMP 2
+
+#endif
--
2.17.1

356
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0012-ARM-stm32mp1-r1-MEDIA-SOC-THERMAL.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0012-ARM-stm32mp1-r2-MEDIA-SOC-THERMAL.patch
View File

@ -1,29 +1,92 @@
From 3da66d9a5ce2cb975d8ee48f47d497de85d79ccc Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:44:58 +0200
Subject: [PATCH 12/23] ARM-stm32mp1-r1-MEDIA-SOC-THERMAL
From 1d34419db80914e8fcd39e622a56c3fdf0b2fe30 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:46 +0200
Subject: [PATCH 12/22] ARM-stm32mp1-r2-rc8-MEDIA-SOC-THERMAL
---
drivers/media/i2c/ov5640.c | 77 +++--
drivers/media/platform/stm32/stm32-cec.c | 10 +-
drivers/media/platform/stm32/stm32-dcmi.c | 51 ++-
drivers/media/v4l2-core/v4l2-fwnode.c | 3 +
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/st/Kconfig | 17 +
drivers/soc/st/Makefile | 2 +
drivers/soc/st/stm32_hdp.c | 242 ++++++++++++++
drivers/soc/st/stm32_pm_domain.c | 212 ++++++++++++
drivers/thermal/st/stm_thermal.c | 383 +++++++---------------
include/media/v4l2-fwnode.h | 2 +
12 files changed, 699 insertions(+), 302 deletions(-)
.../bindings/media/video-interfaces.txt | 2 +
.../bindings/soc/stm32/stm32_hdp.txt | 39 ++
drivers/media/i2c/ov5640.c | 77 +++-
drivers/media/platform/stm32/stm32-cec.c | 10 +-
drivers/media/platform/stm32/stm32-dcmi.c | 100 +++--
drivers/media/v4l2-core/v4l2-fwnode.c | 3 +
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/st/Kconfig | 17 +
drivers/soc/st/Makefile | 2 +
drivers/soc/st/stm32_hdp.c | 242 +++++++++++
drivers/soc/st/stm32_pm_domain.c | 212 ++++++++++
drivers/thermal/st/stm_thermal.c | 383 ++++++------------
include/dt-bindings/soc/stm32-hdp.h | 108 +++++
include/media/v4l2-fwnode.h | 2 +
15 files changed, 882 insertions(+), 317 deletions(-)
create mode 100644 Documentation/devicetree/bindings/soc/stm32/stm32_hdp.txt
create mode 100644 drivers/soc/st/Kconfig
create mode 100644 drivers/soc/st/Makefile
create mode 100644 drivers/soc/st/stm32_hdp.c
create mode 100644 drivers/soc/st/stm32_pm_domain.c
create mode 100644 include/dt-bindings/soc/stm32-hdp.h
diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt
index f884ada0bffc8..aff685a25aca9 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.txt
+++ b/Documentation/devicetree/bindings/media/video-interfaces.txt
@@ -149,6 +149,8 @@ Optional endpoint properties
as 0 (normal). This property is valid for serial busses only.
- strobe: Whether the clock signal is used as clock (0) or strobe (1). Used
with CCP2, for instance.
+- pclk-max-frequency: maximum pixel clock frequency admissible by video
+ host interface.
Example
-------
diff --git a/Documentation/devicetree/bindings/soc/stm32/stm32_hdp.txt b/Documentation/devicetree/bindings/soc/stm32/stm32_hdp.txt
new file mode 100644
index 0000000000000..e2bd82f4980eb
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/stm32/stm32_hdp.txt
@@ -0,0 +1,39 @@
+STM32 - STM32MP1- HDP Pin configuration for STM32MP1
+=======================================================
+
+The Hardware Debug Port (HDP) allows the observation of internal signals. By using multiplexers,
+up to 16 signals for each of 8-bit output can be observed.
+
+Required Properties:
+
+ - compatible: Must be "st,stm32mp1-hdp"
+ - muxing-hdp: Indicates for each HDP pins selected which HDP output among the 16 available signals you want
+
+For each HDP pins you can select one of 16 signals which will be described in file : include/dt-bindings/soc/stm32-hdp.h
+
+Example
+-------
+
+In common dtsi file:
+
+hdp: hdp@5002a000 {
+ compatible = "st,stm32mp1-hdp";
+ reg = <0x5002a000 0x400>;
+ clocks = <&rcc HDP>;
+ clock-names = "hdp";
+};
+
+In board-specific file:
+
+In this example I've selected HDP0, HDP6 and HDP7, and for HDP0 the output signal is HDP0_GPOVAL_0,
+for HDP6 is HDP6_GPOVAL_6, and for HDP7 is HDP7_GPOVAL_7.
+
+&hdp {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&hdp0_pins_a &hdp6_pins_a &hdp7_pins_a>;
+ pinctrl-1 = <&hdp0_pins_sleep_a &hdp6_pins_sleep_a &hdp7_pins_sleep_a>;
+
+ muxing-hdp = <(STM32_HDP(0, HDP0_GPOVAL_0) |
+ STM32_HDP(6, HDP6_GPOVAL_6) |
+ STM32_HDP(7, HDP7_GPOVAL_7))>;
+};
diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
index a398ea81e..3bee8eed7 100644
index 266e947572c1e..6a1b50bec7c84 100644
--- a/drivers/media/i2c/ov5640.c
+++ b/drivers/media/i2c/ov5640.c
@@ -63,6 +63,7 @@
@ -244,7 +307,7 @@ index a398ea81e..3bee8eed7 100644
ret = hdl->error;
goto free_ctrls;
diff --git a/drivers/media/platform/stm32/stm32-cec.c b/drivers/media/platform/stm32/stm32-cec.c
index 8a86b2cc2..108f83c26 100644
index 8a86b2cc22fab..108f83c264f84 100644
--- a/drivers/media/platform/stm32/stm32-cec.c
+++ b/drivers/media/platform/stm32/stm32-cec.c
@@ -291,7 +291,9 @@ static int stm32_cec_probe(struct platform_device *pdev)
@ -275,7 +338,7 @@ index 8a86b2cc2..108f83c26 100644
}
}
diff --git a/drivers/media/platform/stm32/stm32-dcmi.c b/drivers/media/platform/stm32/stm32-dcmi.c
index 9392e3409..2e78facd0 100644
index 9392e3409fba0..7c8256441db33 100644
--- a/drivers/media/platform/stm32/stm32-dcmi.c
+++ b/drivers/media/platform/stm32/stm32-dcmi.c
@@ -95,6 +95,9 @@ enum state {
@ -306,6 +369,15 @@ index 9392e3409..2e78facd0 100644
/* Restart capture */
if (dcmi_restart_capture(dcmi))
@@ -733,7 +736,7 @@ static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
if (ret < 0) {
dev_err(dcmi->dev, "%s: Failed to start streaming, cannot get sync (%d)\n",
__func__, ret);
- goto err_release_buffers;
+ goto err_pm_put;
}
ret = media_pipeline_start(&dcmi->vdev->entity, &dcmi->pipeline);
@@ -784,8 +787,31 @@ static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
dcmi_set_crop(dcmi);
@ -340,7 +412,16 @@ index 9392e3409..2e78facd0 100644
/* Enable dcmi */
reg_set(dcmi->regs, DCMI_CR, CR_ENABLE);
@@ -884,7 +910,7 @@ static void dcmi_stop_streaming(struct vb2_queue *vq)
@@ -837,8 +863,6 @@ static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
err_pm_put:
pm_runtime_put(dcmi->dev);
-
-err_release_buffers:
spin_lock_irq(&dcmi->irqlock);
/*
* Return all buffers to vb2 in QUEUED state.
@@ -884,7 +908,7 @@ static void dcmi_stop_streaming(struct vb2_queue *vq)
/* Stop all pending DMA operations */
mutex_lock(&dcmi->dma_lock);
@ -349,7 +430,60 @@ index 9392e3409..2e78facd0 100644
mutex_unlock(&dcmi->dma_lock);
pm_runtime_put(dcmi->dev);
@@ -1853,7 +1879,9 @@ static int dcmi_probe(struct platform_device *pdev)
@@ -1576,6 +1600,22 @@ static const struct dcmi_format dcmi_formats[] = {
.fourcc = V4L2_PIX_FMT_JPEG,
.mbus_code = MEDIA_BUS_FMT_JPEG_1X8,
.bpp = 1,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SBGGR8,
+ .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
+ .bpp = 1,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGBRG8,
+ .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
+ .bpp = 1,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGRBG8,
+ .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
+ .bpp = 1,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SRGGB8,
+ .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
+ .bpp = 1,
},
};
@@ -1747,6 +1787,15 @@ static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
dev_dbg(dcmi->dev, "Subdev \"%s\" bound\n", subdev->name);
+ ret = video_register_device(dcmi->vdev, VFL_TYPE_GRABBER, -1);
+ if (ret) {
+ dev_err(dcmi->dev, "Failed to register video device\n");
+ return ret;
+ }
+
+ dev_dbg(dcmi->dev, "Device registered as %s\n",
+ video_device_node_name(dcmi->vdev));
+
/*
* Link this sub-device to DCMI, it could be
* a parallel camera sensor or a bridge
@@ -1759,10 +1808,11 @@ static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
&dcmi->vdev->entity, 0,
MEDIA_LNK_FL_IMMUTABLE |
MEDIA_LNK_FL_ENABLED);
- if (ret)
+ if (ret) {
dev_err(dcmi->dev, "Failed to create media pad link with subdev \"%s\"\n",
subdev->name);
- else
+ video_unregister_device(dcmi->vdev);
+ } else
dev_dbg(dcmi->dev, "DCMI is now linked to \"%s\"\n",
subdev->name);
@@ -1853,7 +1903,9 @@ static int dcmi_probe(struct platform_device *pdev)
dcmi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
if (IS_ERR(dcmi->rstc)) {
@ -360,7 +494,7 @@ index 9392e3409..2e78facd0 100644
return PTR_ERR(dcmi->rstc);
}
@@ -1910,10 +1938,13 @@ static int dcmi_probe(struct platform_device *pdev)
@@ -1910,10 +1962,13 @@ static int dcmi_probe(struct platform_device *pdev)
return PTR_ERR(mclk);
}
@ -378,8 +512,52 @@ index 9392e3409..2e78facd0 100644
}
spin_lock_init(&dcmi->irqlock);
@@ -1971,15 +2026,6 @@ static int dcmi_probe(struct platform_device *pdev)
}
dcmi->vdev->entity.flags |= MEDIA_ENT_FL_DEFAULT;
- ret = video_register_device(dcmi->vdev, VFL_TYPE_GRABBER, -1);
- if (ret) {
- dev_err(dcmi->dev, "Failed to register video device\n");
- goto err_media_entity_cleanup;
- }
-
- dev_dbg(dcmi->dev, "Device registered as %s\n",
- video_device_node_name(dcmi->vdev));
-
/* Buffer queue */
q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
@@ -2000,7 +2046,7 @@ static int dcmi_probe(struct platform_device *pdev)
ret = dcmi_graph_init(dcmi);
if (ret < 0)
- goto err_media_entity_cleanup;
+ goto err_vb2_queue_release;
/* Reset device */
ret = reset_control_assert(dcmi->rstc);
@@ -2026,7 +2072,10 @@ static int dcmi_probe(struct platform_device *pdev)
return 0;
err_cleanup:
+ v4l2_async_notifier_unregister(&dcmi->notifier);
v4l2_async_notifier_cleanup(&dcmi->notifier);
+err_vb2_queue_release:
+ vb2_queue_release(q);
err_media_entity_cleanup:
media_entity_cleanup(&dcmi->vdev->entity);
err_device_release:
@@ -2048,6 +2097,7 @@ static int dcmi_remove(struct platform_device *pdev)
v4l2_async_notifier_unregister(&dcmi->notifier);
v4l2_async_notifier_cleanup(&dcmi->notifier);
+ vb2_queue_release(&dcmi->queue);
media_entity_cleanup(&dcmi->vdev->entity);
v4l2_device_unregister(&dcmi->v4l2_dev);
media_device_cleanup(&dcmi->mdev);
diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c
index 3bd188878..7f370d6b7 100644
index 3bd1888787eb3..7f370d6b7a143 100644
--- a/drivers/media/v4l2-core/v4l2-fwnode.c
+++ b/drivers/media/v4l2-core/v4l2-fwnode.c
@@ -356,6 +356,9 @@ v4l2_fwnode_endpoint_parse_parallel_bus(struct fwnode_handle *fwnode,
@ -393,7 +571,7 @@ index 3bd188878..7f370d6b7 100644
default:
bus->flags = flags;
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 833e04a78..4ad5724f5 100644
index 833e04a7835c5..4ad5724f5cefd 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -14,6 +14,7 @@ source "drivers/soc/qcom/Kconfig"
@ -405,7 +583,7 @@ index 833e04a78..4ad5724f5 100644
source "drivers/soc/tegra/Kconfig"
source "drivers/soc/ti/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 2ec355003..30d3dcabf 100644
index 2ec3550035243..30d3dcabf3bb0 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -20,6 +20,7 @@ obj-y += qcom/
@ -418,7 +596,7 @@ index 2ec355003..30d3dcabf 100644
obj-y += ti/
diff --git a/drivers/soc/st/Kconfig b/drivers/soc/st/Kconfig
new file mode 100644
index 000000000..59db03150
index 0000000000000..59db031505522
--- /dev/null
+++ b/drivers/soc/st/Kconfig
@@ -0,0 +1,17 @@
@ -441,7 +619,7 @@ index 000000000..59db03150
+endif # ARCH_STM32
diff --git a/drivers/soc/st/Makefile b/drivers/soc/st/Makefile
new file mode 100644
index 000000000..0fce1db16
index 0000000000000..0fce1db166421
--- /dev/null
+++ b/drivers/soc/st/Makefile
@@ -0,0 +1,2 @@
@ -449,7 +627,7 @@ index 000000000..0fce1db16
+obj-$(CONFIG_STM32_PM_DOMAINS) += stm32_pm_domain.o
diff --git a/drivers/soc/st/stm32_hdp.c b/drivers/soc/st/stm32_hdp.c
new file mode 100644
index 000000000..6408ac68c
index 0000000000000..6408ac68ca5f8
--- /dev/null
+++ b/drivers/soc/st/stm32_hdp.c
@@ -0,0 +1,242 @@
@ -697,7 +875,7 @@ index 000000000..6408ac68c
+module_platform_driver(hdp_driver);
diff --git a/drivers/soc/st/stm32_pm_domain.c b/drivers/soc/st/stm32_pm_domain.c
new file mode 100644
index 000000000..0386624c2
index 0000000000000..0386624c20f2f
--- /dev/null
+++ b/drivers/soc/st/stm32_pm_domain.c
@@ -0,0 +1,212 @@
@ -914,7 +1092,7 @@ index 000000000..0386624c2
+}
+core_initcall(stm32_pm_domains_init);
diff --git a/drivers/thermal/st/stm_thermal.c b/drivers/thermal/st/stm_thermal.c
index cf9ddc52f..1cecf9544 100644
index cf9ddc52f30e1..1cecf95449c3e 100644
--- a/drivers/thermal/st/stm_thermal.c
+++ b/drivers/thermal/st/stm_thermal.c
@@ -30,7 +30,7 @@
@ -1533,8 +1711,122 @@ index cf9ddc52f..1cecf9544 100644
dev_info(&pdev->dev, "%s: Driver initialized successfully\n",
__func__);
diff --git a/include/dt-bindings/soc/stm32-hdp.h b/include/dt-bindings/soc/stm32-hdp.h
new file mode 100644
index 0000000000000..d98665327281b
--- /dev/null
+++ b/include/dt-bindings/soc/stm32-hdp.h
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
+ * Author: Roullier Christophe <christophe.roullier@st.com>
+ * for STMicroelectronics.
+ */
+
+#ifndef _DT_BINDINGS_STM32_HDP_H
+#define _DT_BINDINGS_STM32_HDP_H
+
+#define STM32_HDP(port, value) ((value) << ((port) * 4))
+
+/* define HDP Pins number*/
+#define HDP0_PWR_PWRWAKE_SYS 0
+#define HDP0_CM4_SLEEPDEEP 1
+#define HDP0_PWR_STDBY_WKUP 2
+#define HDP0_PWR_ENCOMP_VDDCORE 3
+#define HDP0_BSEC_OUT_SEC_NIDEN 4
+#define HDP0_RCC_CM4_SLEEPDEEP 6
+#define HDP0_GPU_DBG7 7
+#define HDP0_DDRCTRL_LP_REQ 8
+#define HDP0_PWR_DDR_RET_ENABLE_N 9
+#define HDP0_GPOVAL_0 15
+
+#define HDP1_PWR_PWRWAKE_MCU 0
+#define HDP1_CM4_HALTED 1
+#define HDP1_CA7_NAXIERRIRQ 2
+#define HDP1_PWR_OKIN_MR 3
+#define HDP1_BSEC_OUT_SEC_DBGEN 4
+#define HDP1_EXTI_SYS_WAKEUP 5
+#define HDP1_RCC_PWRDS_MPU 6
+#define HDP1_GPU_DBG6 7
+#define HDP1_DDRCTRL_DFI_CTRLUPD_REQ 8
+#define HDP1_DDRCTRL_CACTIVE_DDRC_ASR 9
+#define HDP1_GPOVAL_1 15
+
+#define HDP2_PWR_PWRWAKE_MPU 0
+#define HDP2_CM4_RXEV 1
+#define HDP2_CA7_NPMUIRQ1 2
+#define HDP2_CA7_NFIQOUT1 3
+#define HDP2_BSEC_IN_RSTCORE_N 4
+#define HDP2_EXTI_C2_WAKEUP 5
+#define HDP2_RCC_PWRDS_MCU 6
+#define HDP2_GPU_DBG5 7
+#define HDP2_DDRCTRL_DFI_INIT_COMPLETE 8
+#define HDP2_DDRCTRL_PERF_OP_IS_REFRESH 9
+#define HDP2_DDRCTRL_GSKP_DFI_LP_REQ 10
+#define HDP2_GPOVAL_2 15
+
+#define HDP3_PWR_SEL_VTH_VDD_CORE 0
+#define HDP3_CM4_TXEV 1
+#define HDP3_CA7_NPMUIRQ0 2
+#define HDP3_CA7_NFIQOUT0 3
+#define HDP3_BSEC_OUT_SEC_DFTLOCK 4
+#define HDP3_EXTI_C1_WAKEUP 5
+#define HDP3_RCC_PWRDS_SYS 6
+#define HDP3_GPU_DBG4 7
+#define HDP3_DDRCTRL_STAT_DDRC_REG_SELREF_TYPE0 8
+#define HDP3_DDRCTRL_CACTIVE_1 9
+#define HDP3_GPOVAL_3 15
+
+#define HDP4_PWR_PDDS 0
+#define HDP4_CM4_SLEEPING 1
+#define HDP4_CA7_NRESET1 2
+#define HDP4_CA7_NIRQOUT1 3
+#define HDP4_BSEC_OUT_SEC_DFTEN 4
+#define HDP4_BSEC_OUT_SEC_DBGSWENABLE 5
+#define HDP4_ETH_OUT_PMT_INTR_O 6
+#define HDP4_GPU_DBG3 7
+#define HDP4_DDRCTRL_STAT_DDRC_REG_SELREF_TYPE1 8
+#define HDP4_DDRCTRL_CACTIVE_0 9
+#define HDP4_GPOVAL_4 15
+
+#define HDP5_CA7_STANDBYWFIL2 0
+#define HDP5_PWR_VTH_VDDCORE_ACK 1
+#define HDP5_CA7_NRESET0 2
+#define HDP5_CA7_NIRQOUT0 3
+#define HDP5_BSEC_IN_PWROK 4
+#define HDP5_BSEC_OUT_SEC_DEVICEEN 5
+#define HDP5_ETH_OUT_LPI_INTR_O 6
+#define HDP5_GPU_DBG2 7
+#define HDP5_DDRCTRL_CACTIVE_DDRC 8
+#define HDP5_DDRCTRL_WR_CREDIT_CNT 9
+#define HDP5_GPOVAL_5 15
+
+#define HDP6_CA7_STANDBYWFI1 0
+#define HDP6_CA7_STANDBYWFE1 1
+#define HDP6_CA7_EVENT0 2
+#define HDP6_CA7_DBGACK1 3
+#define HDP6_BSEC_OUT_SEC_SPNIDEN 5
+#define HDP6_ETH_OUT_MAC_SPEED_O1 6
+#define HDP6_GPU_DBG1 7
+#define HDP6_DDRCTRL_CSYSACK_DDRC 8
+#define HDP6_DDRCTRL_LPR_CREDIT_CNT 9
+#define HDP6_GPOVAL_6 15
+
+#define HDP7_CA7_STANDBYWFI0 0
+#define HDP7_CA7_STANDBYWFE0 1
+#define HDP7_CA7_DBGACK0 3
+#define HDP7_BSEC_OUT_FUSE_OK 4
+#define HDP7_BSEC_OUT_SEC_SPIDEN 5
+#define HDP7_ETH_OUT_MAC_SPEED_O0 6
+#define HDP7_GPU_DBG0 7
+#define HDP7_DDRCTRL_CSYSREQ_DDRC 8
+#define HDP7_DDRCTRL_HPR_CREDIT_CNT 9
+#define HDP7_GPOVAL_7 15
+
+#endif /* _DT_BINDINGS_STM32_HDP_H */
diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h
index f6a7bcd13..c3dd47f14 100644
index f6a7bcd131977..c3dd47f14c1ac 100644
--- a/include/media/v4l2-fwnode.h
+++ b/include/media/v4l2-fwnode.h
@@ -50,11 +50,13 @@ struct v4l2_fwnode_bus_mipi_csi2 {

403
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0013-ARM-stm32mp1-r1-MFD.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0013-ARM-stm32mp1-r2-MFD.patch
View File

@ -1,24 +1,265 @@
From f811efe3cbe842a78d98740c0a0a8e1b7c0181b0 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:45:15 +0200
Subject: [PATCH 13/23] ARM-stm32mp1-r1-MFD
From c37d67ecd03c14eabef9d8cde67913bdfe497ae8 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:47 +0200
Subject: [PATCH 13/22] ARM-stm32mp1-r2-rc8-MFD
---
drivers/mfd/Kconfig | 10 +
drivers/mfd/Makefile | 1 +
drivers/mfd/stm32-pwr.c | 400 +++++++++++++++++++++++++++++++
drivers/mfd/stm32-timers.c | 36 ++-
drivers/mfd/stmfx.c | 22 +-
drivers/mfd/stpmic1.c | 6 +
drivers/mfd/wm8994-core.c | 21 ++
include/linux/mfd/stm32-timers.h | 12 +-
include/linux/mfd/stmfx.h | 1 +
include/linux/mfd/wm8994/pdata.h | 6 +
10 files changed, 494 insertions(+), 21 deletions(-)
.../bindings/mfd/st,stm32mp1-pwr.txt | 57 +++
.../devicetree/bindings/mfd/stm32-lptimer.txt | 10 +
.../bindings/mtd/st,stm32-fmc2-nand.yaml | 129 ++++++
drivers/mfd/Kconfig | 10 +
drivers/mfd/Makefile | 1 +
drivers/mfd/stm32-lptimer.c | 1 +
drivers/mfd/stm32-pwr.c | 400 ++++++++++++++++++
drivers/mfd/stm32-timers.c | 36 +-
drivers/mfd/stpmic1.c | 6 +
drivers/mfd/wm8994-core.c | 21 +
include/dt-bindings/mfd/stm32f4-rcc.h | 1 -
include/linux/mfd/stm32-lptimer.h | 5 +
include/linux/mfd/stm32-timers.h | 12 +-
include/linux/mfd/wm8994/pdata.h | 6 +
14 files changed, 675 insertions(+), 20 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/st,stm32mp1-pwr.txt
create mode 100644 Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml
create mode 100644 drivers/mfd/stm32-pwr.c
diff --git a/Documentation/devicetree/bindings/mfd/st,stm32mp1-pwr.txt b/Documentation/devicetree/bindings/mfd/st,stm32mp1-pwr.txt
new file mode 100644
index 0000000000000..eb622387bb651
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/st,stm32mp1-pwr.txt
@@ -0,0 +1,57 @@
+STMicroelectronics STM32MP1 Power Management Controller
+=======================================================
+
+The PWR IP is responsible for handling the power related resources such as
+clocks, power supplies and resets. It provides 6 wake-up pins that are handled
+by an interrupt-controller. Wake-up pin can be used to wake-up from STANDBY SoC state.
+
+Required properties:
+- compatible should be: "st,stm32mp1-pwr"
+- reg: should be register base and length as documented in the
+ datasheet
+- interrupts: contains the reference to the gic wake-up pin interrupt
+- interrupt-controller; Enable interrupt controller for wake-up pins.
+- #interrupt-cells = <3>
+- wakeup-gpios: contains a list of GPIO spec describing each wake-up pin.
+
+Optional Properties:
+- pwr-supply: main soc power supply
+
+Interrupt consumers have to specify 3 cells:
+ - cell 1: wake-up pin id from 0 to 5
+ - cell 2: IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_RISING
+ - cell 3: Pull config: 0 = No Pull, 1=Pull Up, 2=Pull Down
+
+
+Example:
+
+ pwr: pwr@50001000 {
+ compatible = "st,stm32mp1-pwr", "simple-mfd";
+ reg = <0x50001000 0x400>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ wakeup-gpios = <&gpioa 0 0>, <&gpioa 2 0>,
+ <&gpioc 13 0>, <&gpioi 8 0>,
+ <&gpioi 11 0>, <&gpioc 1 0>;
+
+ pwr-supply = <&vdd>;
+ };
+
+
+Example of interrupt user:
+gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ button@4 {
+ label = "WakeUp4";
+ linux,code = <BTN_4>;
+ interrupt-parent = <&pwr>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING 1>;
+ wakeup-source;
+ };
+};
+
diff --git a/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt b/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt
index fb54e4dad5b3e..ef3b795b5d9f0 100644
--- a/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt
+++ b/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt
@@ -14,10 +14,15 @@ Required properties:
- #address-cells: Should be '<1>'.
- #size-cells: Should be '<0>'.
+Optional properties:
+- interrupts: Interrupt line for the LP timer.
+
Optional subnodes:
- pwm: See ../pwm/pwm-stm32-lp.txt
- counter: See ../counter/stm32-lptimer-cnt.txt
- trigger: See ../iio/timer/stm32-lptimer-trigger.txt
+- timer: Must contain "st,stm32-lptimer-timer" compatible
+ property.
Example:
@@ -26,6 +31,7 @@ Example:
reg = <0x40002400 0x400>;
clocks = <&timer_clk>;
clock-names = "mux";
+ interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -45,4 +51,8 @@ Example:
pinctrl-names = "default";
pinctrl-0 = <&lptim1_in_pins>;
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ };
};
diff --git a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml
new file mode 100644
index 0000000000000..6ae7de15d172f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml
@@ -0,0 +1,129 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings
+
+maintainers:
+ - Christophe Kerello <christophe.kerello@st.com>
+
+properties:
+ compatible:
+ enum:
+ - st,stm32mp15-fmc2
+ - st,stm32mp1-fmc2-nfc
+
+ reg:
+ minItems: 6
+ maxItems: 7
+
+ interrupts:
+ maxItems: 1
+
+ dmas:
+ items:
+ - description: tx DMA channel
+ - description: rx DMA channel
+ - description: ecc DMA channel
+
+ dma-names:
+ items:
+ - const: tx
+ - const: rx
+ - const: ecc
+
+patternProperties:
+ "^nand@[a-f0-9]$":
+ type: object
+ properties:
+ nand-ecc-step-size:
+ const: 512
+
+ nand-ecc-strength:
+ enum: [1, 4 ,8 ]
+
+allOf:
+ - $ref: "nand-controller.yaml#"
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32mp15-fmc2
+ then:
+ properties:
+ reg:
+ items:
+ - description: Registers
+ - description: Chip select 0 data
+ - description: Chip select 0 command
+ - description: Chip select 0 address space
+ - description: Chip select 1 data
+ - description: Chip select 1 command
+ - description: Chip select 1 address space
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ required:
+ - clocks
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32mp1-fmc2-nfc
+ then:
+ properties:
+ reg:
+ items:
+ - description: Chip select 0 data
+ - description: Chip select 0 command
+ - description: Chip select 0 address space
+ - description: Chip select 1 data
+ - description: Chip select 1 command
+ - description: Chip select 1 address space
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/stm32mp1-clks.h>
+ #include <dt-bindings/reset/stm32mp1-resets.h>
+ nand-controller@58002000 {
+ compatible = "st,stm32mp15-fmc2";
+ reg = <0x58002000 0x1000>,
+ <0x80000000 0x1000>,
+ <0x88010000 0x1000>,
+ <0x88020000 0x1000>,
+ <0x81000000 0x1000>,
+ <0x89010000 0x1000>,
+ <0x89020000 0x1000>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
+ <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
+ <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
+ dma-names = "tx", "rx", "ecc";
+ clocks = <&rcc FMC_K>;
+ resets = <&rcc FMC_R>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+ };
+
+...
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 43169f25d..48ef1822a 100644
index 43169f25da1fd..48ef1822ab1ce 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1955,6 +1955,16 @@ config MFD_STPMIC1
@ -39,7 +280,7 @@ index 43169f25d..48ef1822a 100644
tristate "Support for STMicroelectronics Multi-Function eXpander (STMFX)"
depends on I2C
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index c1067ea46..11acfa1bf 100644
index c1067ea462046..11acfa1bf8160 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -249,6 +249,7 @@ obj-$(CONFIG_MFD_SUN4I_GPADC) += sun4i-gpadc.o
@ -50,9 +291,21 @@ index c1067ea46..11acfa1bf 100644
obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
diff --git a/drivers/mfd/stm32-lptimer.c b/drivers/mfd/stm32-lptimer.c
index a00f99f365595..746e51a17cc8e 100644
--- a/drivers/mfd/stm32-lptimer.c
+++ b/drivers/mfd/stm32-lptimer.c
@@ -17,6 +17,7 @@ static const struct regmap_config stm32_lptimer_regmap_cfg = {
.val_bits = 32,
.reg_stride = sizeof(u32),
.max_register = STM32_LPTIM_MAX_REGISTER,
+ .fast_io = true,
};
static int stm32_lptimer_detect_encoder(struct stm32_lptimer *ddata)
diff --git a/drivers/mfd/stm32-pwr.c b/drivers/mfd/stm32-pwr.c
new file mode 100644
index 000000000..48ca8b474
index 0000000000000..48ca8b4745d34
--- /dev/null
+++ b/drivers/mfd/stm32-pwr.c
@@ -0,0 +1,400 @@
@ -457,7 +710,7 @@ index 000000000..48ca8b474
+arch_initcall(stm32_pwr_init);
+module_exit(stm32_pwr_exit);
diff --git a/drivers/mfd/stm32-timers.c b/drivers/mfd/stm32-timers.c
index efcd4b980..65a160a26 100644
index efcd4b980c94c..65a160a264555 100644
--- a/drivers/mfd/stm32-timers.c
+++ b/drivers/mfd/stm32-timers.c
@@ -167,26 +167,36 @@ static void stm32_timers_get_arr_size(struct stm32_timers *ddata)
@ -520,68 +773,8 @@ index efcd4b980..65a160a26 100644
platform_set_drvdata(pdev, ddata);
diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c
index 857991cb3..711979afd 100644
--- a/drivers/mfd/stmfx.c
+++ b/drivers/mfd/stmfx.c
@@ -287,14 +287,21 @@ static int stmfx_irq_init(struct i2c_client *client)
ret = regmap_write(stmfx->map, STMFX_REG_IRQ_OUT_PIN, irqoutpin);
if (ret)
- return ret;
+ goto irq_exit;
ret = devm_request_threaded_irq(stmfx->dev, client->irq,
NULL, stmfx_irq_handler,
irqtrigger | IRQF_ONESHOT,
"stmfx", stmfx);
if (ret)
- stmfx_irq_exit(client);
+ goto irq_exit;
+
+ stmfx->irq = client->irq;
+
+ return 0;
+
+irq_exit:
+ stmfx_irq_exit(client);
return ret;
}
@@ -481,6 +488,8 @@ static int stmfx_suspend(struct device *dev)
if (ret)
return ret;
+ disable_irq(stmfx->irq);
+
if (stmfx->vdd)
return regulator_disable(stmfx->vdd);
@@ -501,6 +510,13 @@ static int stmfx_resume(struct device *dev)
}
}
+ /* Reset STMFX - supply has been stopped during suspend */
+ ret = stmfx_chip_reset(stmfx);
+ if (ret) {
+ dev_err(stmfx->dev, "Failed to reset chip: %d\n", ret);
+ return ret;
+ }
+
ret = regmap_raw_write(stmfx->map, STMFX_REG_SYS_CTRL,
&stmfx->bkp_sysctrl, sizeof(stmfx->bkp_sysctrl));
if (ret)
@@ -517,6 +533,8 @@ static int stmfx_resume(struct device *dev)
if (ret)
return ret;
+ enable_irq(stmfx->irq);
+
return 0;
}
#endif
diff --git a/drivers/mfd/stpmic1.c b/drivers/mfd/stpmic1.c
index 7dfbe8906..766c3217f 100644
index 7dfbe8906cb86..766c3217f30ed 100644
--- a/drivers/mfd/stpmic1.c
+++ b/drivers/mfd/stpmic1.c
@@ -170,6 +170,9 @@ static int stpmic1_suspend(struct device *dev)
@ -605,7 +798,7 @@ index 7dfbe8906..766c3217f 100644
return 0;
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c
index 1e9fe7d92..b110c8ac1 100644
index 737dede4a95c3..8161ee16c2f86 100644
--- a/drivers/mfd/wm8994-core.c
+++ b/drivers/mfd/wm8994-core.c
@@ -7,6 +7,7 @@
@ -650,8 +843,40 @@ index 1e9fe7d92..b110c8ac1 100644
return 0;
}
#else
diff --git a/include/dt-bindings/mfd/stm32f4-rcc.h b/include/dt-bindings/mfd/stm32f4-rcc.h
index 309e8c79f27b1..36448a5619a12 100644
--- a/include/dt-bindings/mfd/stm32f4-rcc.h
+++ b/include/dt-bindings/mfd/stm32f4-rcc.h
@@ -34,7 +34,6 @@
#define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)
-
/* AHB2 */
#define STM32F4_RCC_AHB2_DCMI 0
#define STM32F4_RCC_AHB2_CRYP 4
diff --git a/include/linux/mfd/stm32-lptimer.h b/include/linux/mfd/stm32-lptimer.h
index 605f622648258..90b20550c1c8b 100644
--- a/include/linux/mfd/stm32-lptimer.h
+++ b/include/linux/mfd/stm32-lptimer.h
@@ -27,10 +27,15 @@
#define STM32_LPTIM_CMPOK BIT(3)
/* STM32_LPTIM_ICR - bit fields */
+#define STM32_LPTIM_ARRMCF BIT(1)
#define STM32_LPTIM_CMPOKCF_ARROKCF GENMASK(4, 3)
+/* STM32_LPTIM_IER - bit flieds */
+#define STM32_LPTIM_ARRMIE BIT(1)
+
/* STM32_LPTIM_CR - bit fields */
#define STM32_LPTIM_CNTSTRT BIT(2)
+#define STM32_LPTIM_SNGSTRT BIT(1)
#define STM32_LPTIM_ENABLE BIT(0)
/* STM32_LPTIM_CFGR - bit fields */
diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h
index 067d14655..f8db83aed 100644
index 067d14655c28b..f8db83aedb2b5 100644
--- a/include/linux/mfd/stm32-timers.h
+++ b/include/linux/mfd/stm32-timers.h
@@ -70,14 +70,11 @@
@ -682,20 +907,8 @@ index 067d14655..f8db83aed 100644
enum stm32_timers_dmas {
STM32_TIMERS_DMA_CH1,
diff --git a/include/linux/mfd/stmfx.h b/include/linux/mfd/stmfx.h
index 3c6798367..744dce639 100644
--- a/include/linux/mfd/stmfx.h
+++ b/include/linux/mfd/stmfx.h
@@ -109,6 +109,7 @@ struct stmfx {
struct device *dev;
struct regmap *map;
struct regulator *vdd;
+ int irq;
struct irq_domain *irq_domain;
struct mutex lock; /* IRQ bus lock */
u8 irq_src;
diff --git a/include/linux/mfd/wm8994/pdata.h b/include/linux/mfd/wm8994/pdata.h
index 81e7dcbd9..addb2fede 100644
index 81e7dcbd94dfb..addb2fede83d8 100644
--- a/include/linux/mfd/wm8994/pdata.h
+++ b/include/linux/mfd/wm8994/pdata.h
@@ -231,6 +231,12 @@ struct wm8994_pdata {

3318
recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0014-ARM-stm32mp1-r2-MMC-NAND.patch Normal file
View File

File diff suppressed because it is too large Load Diff

745
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0015-ARM-stm32mp1-r1-NET-TTY.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0015-ARM-stm32mp1-r2-NET-TTY.patch
View File

File diff suppressed because it is too large Load Diff

625
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0016-ARM-stm32mp1-r1-PHY-USB.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0016-ARM-stm32mp1-r2-PHY-USB.patch
View File

File diff suppressed because it is too large Load Diff

457
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0017-ARM-stm32mp1-r1-PINCTRL-REGULATOR-SPI-PWM.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0017-ARM-stm32mp1-r2-PINCTRL-REGULATOR-SPI-PWM.patch
View File

@ -1,22 +1,80 @@
From 479f8a903c863085c2bc680c71ae0f7fea166aa8 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:47:29 +0200
Subject: [PATCH 17/23] ARM-stm32mp1-r1-PINCTRL-REGULATOR-SPI-PWM
From a3294658232852248461b79c8c0a532956974568 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:51 +0200
Subject: [PATCH 17/22] ARM-stm32mp1-r2-rc8-PINCTRL-REGULATOR-SPI-PWM
---
drivers/pinctrl/pinctrl-stmfx.c | 36 +-
drivers/pinctrl/stm32/pinctrl-stm32.c | 250 +++++++---
drivers/pinctrl/stm32/pinctrl-stm32.h | 17 +-
drivers/pinctrl/stm32/pinctrl-stm32mp157.c | 1 +
drivers/pwm/pwm-stm32.c | 116 +++--
drivers/regulator/stm32-pwr.c | 85 +++-
drivers/regulator/stpmic1_regulator.c | 203 +++++++-
drivers/spi/spi-stm32-qspi.c | 127 ++++-
drivers/spi/spi-stm32.c | 511 +++++++++++++--------
9 files changed, 990 insertions(+), 356 deletions(-)
.../bindings/pinctrl/st,stm32-pinctrl.yaml | 8 +
.../devicetree/bindings/pwm/pwm-stm32.txt | 8 +-
drivers/pinctrl/pinctrl-stmfx.c | 36 +-
drivers/pinctrl/stm32/pinctrl-stm32.c | 268 +++++++---
drivers/pinctrl/stm32/pinctrl-stm32.h | 17 +-
drivers/pinctrl/stm32/pinctrl-stm32mp157.c | 1 +
drivers/pwm/pwm-stm32.c | 116 ++--
drivers/regulator/stm32-pwr.c | 85 ++-
drivers/regulator/stpmic1_regulator.c | 203 ++++++-
drivers/spi/spi-stm32-qspi.c | 155 ++++--
drivers/spi/spi-stm32.c | 495 ++++++++++--------
include/dt-bindings/pinctrl/stm32-pinfunc.h | 1 +
12 files changed, 1019 insertions(+), 374 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
index 400df2da018a3..4e24a8e863475 100644
--- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
@@ -144,9 +144,13 @@ patternProperties:
* ...
* 16 : Alternate Function 15
* 17 : Analog
+ * 18 : Reserved
To simplify the usage, macro is available to generate "pinmux" field.
This macro is available here:
- include/dt-bindings/pinctrl/stm32-pinfunc.h
+ Setting the pinmux's function to the Reserved (RSVD) value is used to inform
+ the driver that it shall not apply the mux setting. This can be used to
+ reserve some pins, for example to a co-processor not running Linux.
Some examples of using macro:
/* GPIO A9 set as alernate function 2 */
... {
@@ -160,6 +164,10 @@ patternProperties:
... {
pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
};
+ /* GPIO A9 reserved for co-processor */
+ ... {
+ pinmux = <STM32_PINMUX('A', 9, RSVD)>;
+ };
bias-disable:
type: boolean
diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
index a8690bfa5e1fa..f1620c1feebfc 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
@@ -5,8 +5,9 @@ See ../mfd/stm32-timers.txt for details about the parent node.
Required parameters:
- compatible: Must be "st,stm32-pwm".
-- pinctrl-names: Set to "default".
-- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module.
+- pinctrl-names: Set to "default". An additional "sleep" state can be
+ defined to set pins in sleep state when in low power.
+- pinctrl-n: List of phandles pointing to pin configuration nodes for PWM module.
For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells
bindings defined in pwm.txt.
@@ -32,7 +33,8 @@ Example:
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
pinctrl-0 = <&pwm1_pins>;
- pinctrl-names = "default";
+ pinctrl-1 = <&pwm1_sleep_pins>;
+ pinctrl-names = "default", "sleep";
st,breakinput = <0 1 5>;
};
};
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
index ccdf0bb21..f7958eece 100644
index ccdf0bb214149..f7958eece5e0e 100644
--- a/drivers/pinctrl/pinctrl-stmfx.c
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -277,7 +277,7 @@ static int stmfx_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
@ -84,7 +142,7 @@ index ccdf0bb21..f7958eece 100644
ret = gpiochip_irqchip_add_nested(&pctl->gpio_chip, &pctl->irq_chip,
0, handle_bad_irq, IRQ_TYPE_NONE);
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index 2d5e0435a..1d52cbeab 100644
index 2d5e0435af0a4..ef3b081d27983 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -64,7 +64,7 @@
@ -448,7 +506,7 @@ index 2d5e0435a..1d52cbeab 100644
if (ret < 0)
return ret;
@@ -1070,10 +1141,36 @@ static int stm32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
@@ -1070,10 +1141,51 @@ static int stm32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
return 0;
}
@ -475,6 +533,21 @@ index 2d5e0435a..1d52cbeab 100644
+
+ return 0;
+}
+
+static struct stm32_desc_pin *
+stm32_pconf_get_pin_desc_by_pin_number(struct stm32_pinctrl *pctl,
+ unsigned int pin_number)
+{
+ struct stm32_desc_pin *pins = pctl->pins;
+ int i;
+
+ for (i = 0; i < pctl->npins; i++) {
+ if (pins->pin.number == pin_number)
+ return pins;
+ pins++;
+ }
+ return NULL;
+}
+
static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
struct seq_file *s,
@ -485,18 +558,21 @@ index 2d5e0435a..1d52cbeab 100644
struct pinctrl_gpio_range *range;
struct stm32_gpio_bank *bank;
int offset;
@@ -1123,7 +1220,9 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
@@ -1123,7 +1235,12 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
case 2:
drive = stm32_pconf_get_driving(bank, offset);
speed = stm32_pconf_get_speed(bank, offset);
- seq_printf(s, "%d - %s - %s - %s %s", alt,
+ pin_desc = pctl->pins + (pin - pctl->pin_base_shift);
+ pin_desc = stm32_pconf_get_pin_desc_by_pin_number(pctl, pin);
+ if (!pin_desc)
+ return;
+
+ seq_printf(s, "%d (%s) - %s - %s - %s %s", alt,
+ pin_desc->functions[alt + 1].name,
drive ? "open drain" : "push pull",
biasing[bias],
speeds[speed], "speed");
@@ -1140,6 +1239,7 @@ static const struct pinconf_ops stm32_pconf_ops = {
@@ -1140,6 +1257,7 @@ static const struct pinconf_ops stm32_pconf_ops = {
.pin_config_group_get = stm32_pconf_group_get,
.pin_config_group_set = stm32_pconf_group_set,
.pin_config_dbg_show = stm32_pconf_dbg_show,
@ -504,7 +580,7 @@ index 2d5e0435a..1d52cbeab 100644
};
static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
@@ -1151,13 +1251,11 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
@@ -1151,13 +1269,11 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
struct of_phandle_args args;
struct device *dev = pctl->dev;
struct resource res;
@ -520,7 +596,7 @@ index 2d5e0435a..1d52cbeab 100644
if (of_address_to_resource(np, 0, &res))
return -ENODEV;
@@ -1166,12 +1264,6 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
@@ -1166,12 +1282,6 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
if (IS_ERR(bank->base))
return PTR_ERR(bank->base);
@ -533,7 +609,7 @@ index 2d5e0435a..1d52cbeab 100644
err = clk_prepare(bank->clk);
if (err) {
dev_err(dev, "failed to prepare clk (%d)\n", err);
@@ -1335,7 +1427,8 @@ static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl,
@@ -1335,7 +1445,8 @@ static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl,
if (pctl->pkg && !(pctl->pkg & p->pkg))
continue;
pins->pin = p->pin;
@ -543,7 +619,7 @@ index 2d5e0435a..1d52cbeab 100644
pins++;
nb_pins_available++;
}
@@ -1444,6 +1537,7 @@ int stm32_pctl_probe(struct platform_device *pdev)
@@ -1444,6 +1555,7 @@ int stm32_pctl_probe(struct platform_device *pdev)
pctl->pctl_desc.pctlops = &stm32_pctrl_ops;
pctl->pctl_desc.pmxops = &stm32_pmx_ops;
pctl->dev = &pdev->dev;
@ -551,7 +627,7 @@ index 2d5e0435a..1d52cbeab 100644
pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc,
pctl);
@@ -1466,6 +1560,28 @@ int stm32_pctl_probe(struct platform_device *pdev)
@@ -1466,6 +1578,28 @@ int stm32_pctl_probe(struct platform_device *pdev)
if (!pctl->banks)
return -ENOMEM;
@ -581,7 +657,7 @@ index 2d5e0435a..1d52cbeab 100644
if (of_property_read_bool(child, "gpio-controller")) {
ret = stm32_gpiolib_register_bank(pctl, child);
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.h b/drivers/pinctrl/stm32/pinctrl-stm32.h
index ec0d34c33..b11a223f3 100644
index ec0d34c339031..b11a223f3504c 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.h
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.h
@@ -17,6 +17,8 @@
@ -644,7 +720,7 @@ index ec0d34c33..b11a223f3 100644
struct stm32_gpio_bank;
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32mp157.c b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
index 2ccb99d64..86fe6d5ac 100644
index 2ccb99d64df83..86fe6d5ac54d6 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
@@ -2328,6 +2328,7 @@ static struct stm32_pinctrl_match_data stm32mp157_match_data = {
@ -656,7 +732,7 @@ index 2ccb99d64..86fe6d5ac 100644
static const struct of_device_id stm32mp157_pctrl_match[] = {
diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
index 359b08596..d3be944f2 100644
index 359b08596d9e3..d3be944f2ae96 100644
--- a/drivers/pwm/pwm-stm32.c
+++ b/drivers/pwm/pwm-stm32.c
@@ -12,6 +12,7 @@
@ -861,7 +937,7 @@ index 359b08596..d3be944f2 100644
};
module_platform_driver(stm32_pwm_driver);
diff --git a/drivers/regulator/stm32-pwr.c b/drivers/regulator/stm32-pwr.c
index e0e627b01..373d83797 100644
index e0e627b0106e0..373d83797ea86 100644
--- a/drivers/regulator/stm32-pwr.c
+++ b/drivers/regulator/stm32-pwr.c
@@ -3,12 +3,15 @@
@ -1021,7 +1097,7 @@ index e0e627b01..373d83797 100644
priv->ready_mask = ready_mask_table[i];
config.driver_data = priv;
diff --git a/drivers/regulator/stpmic1_regulator.c b/drivers/regulator/stpmic1_regulator.c
index f09061473..4537e3ab1 100644
index f09061473613c..4537e3ab143ca 100644
--- a/drivers/regulator/stpmic1_regulator.c
+++ b/drivers/regulator/stpmic1_regulator.c
@@ -2,7 +2,9 @@
@ -1339,7 +1415,7 @@ index f09061473..4537e3ab1 100644
dev_dbg(&pdev->dev, "stpmic1_regulator driver probed\n");
diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c
index 4e726929b..02f110b10 100644
index 4e726929bb4f5..77c1da13a3f05 100644
--- a/drivers/spi/spi-stm32-qspi.c
+++ b/drivers/spi/spi-stm32-qspi.c
@@ -16,6 +16,7 @@
@ -1458,22 +1534,23 @@ index 4e726929b..02f110b10 100644
}
static void stm32_qspi_dma_free(struct stm32_qspi *qspi)
@@ -524,9 +556,14 @@ static const struct spi_controller_mem_ops stm32_qspi_mem_ops = {
static void stm32_qspi_release(struct stm32_qspi *qspi)
{
/* disable qspi */
+ pm_runtime_get_sync(qspi->dev);
writel_relaxed(0, qspi->io_base + QSPI_CR);
stm32_qspi_dma_free(qspi);
mutex_destroy(&qspi->lock);
+ pm_runtime_put_noidle(qspi->dev);
+ pm_runtime_disable(qspi->dev);
+ pm_runtime_set_suspended(qspi->dev);
+ pm_runtime_dont_use_autosuspend(qspi->dev);
clk_disable_unprepare(qspi->clk);
}
@@ -521,15 +553,6 @@ static const struct spi_controller_mem_ops stm32_qspi_mem_ops = {
.exec_op = stm32_qspi_exec_op,
};
@@ -550,7 +587,7 @@ static int stm32_qspi_probe(struct platform_device *pdev)
-static void stm32_qspi_release(struct stm32_qspi *qspi)
-{
- /* disable qspi */
- writel_relaxed(0, qspi->io_base + QSPI_CR);
- stm32_qspi_dma_free(qspi);
- mutex_destroy(&qspi->lock);
- clk_disable_unprepare(qspi->clk);
-}
-
static int stm32_qspi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -550,7 +573,7 @@ static int stm32_qspi_probe(struct platform_device *pdev)
qspi->io_base = devm_ioremap_resource(dev, res);
if (IS_ERR(qspi->io_base)) {
ret = PTR_ERR(qspi->io_base);
@ -1482,7 +1559,7 @@ index 4e726929b..02f110b10 100644
}
qspi->phys_base = res->start;
@@ -559,24 +596,26 @@ static int stm32_qspi_probe(struct platform_device *pdev)
@@ -559,24 +582,26 @@ static int stm32_qspi_probe(struct platform_device *pdev)
qspi->mm_base = devm_ioremap_resource(dev, res);
if (IS_ERR(qspi->mm_base)) {
ret = PTR_ERR(qspi->mm_base);
@ -1514,7 +1591,7 @@ index 4e726929b..02f110b10 100644
}
init_completion(&qspi->data_completion);
@@ -584,23 +623,27 @@ static int stm32_qspi_probe(struct platform_device *pdev)
@@ -584,23 +609,27 @@ static int stm32_qspi_probe(struct platform_device *pdev)
qspi->clk = devm_clk_get(dev, NULL);
if (IS_ERR(qspi->clk)) {
ret = PTR_ERR(qspi->clk);
@ -1541,24 +1618,24 @@ index 4e726929b..02f110b10 100644
+ if (IS_ERR(rstc)) {
+ ret = PTR_ERR(rstc);
+ if (ret == -EPROBE_DEFER)
+ goto err_qspi_release;
+ goto err_clk_disable;
+ } else {
reset_control_assert(rstc);
udelay(2);
reset_control_deassert(rstc);
@@ -608,7 +651,10 @@ static int stm32_qspi_probe(struct platform_device *pdev)
@@ -608,7 +637,10 @@ static int stm32_qspi_probe(struct platform_device *pdev)
qspi->dev = dev;
platform_set_drvdata(pdev, qspi);
- stm32_qspi_dma_setup(qspi);
+ ret = stm32_qspi_dma_setup(qspi);
+ if (ret)
+ goto err_qspi_release;
+ goto err_dma_free;
+
mutex_init(&qspi->lock);
ctrl->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD
@@ -619,12 +665,24 @@ static int stm32_qspi_probe(struct platform_device *pdev)
@@ -619,12 +651,35 @@ static int stm32_qspi_probe(struct platform_device *pdev)
ctrl->num_chipselect = STM32_QSPI_MAX_NORCHIP;
ctrl->dev.of_node = dev->of_node;
@ -1572,7 +1649,7 @@ index 4e726929b..02f110b10 100644
- if (!ret)
- return 0;
+ if (ret)
+ goto err_qspi_release;
+ goto err_pm_runtime_free;
+
+ pm_runtime_mark_last_busy(dev);
+ pm_runtime_put_autosuspend(dev);
@ -1580,16 +1657,39 @@ index 4e726929b..02f110b10 100644
+ return 0;
-err:
+err_qspi_release:
stm32_qspi_release(qspi);
- stm32_qspi_release(qspi);
+err_pm_runtime_free:
+ pm_runtime_get_sync(qspi->dev);
+ /* disable qspi */
+ writel_relaxed(0, qspi->io_base + QSPI_CR);
+ mutex_destroy(&qspi->lock);
+ pm_runtime_put_noidle(qspi->dev);
+ pm_runtime_disable(qspi->dev);
+ pm_runtime_set_suspended(qspi->dev);
+ pm_runtime_dont_use_autosuspend(qspi->dev);
+err_dma_free:
+ stm32_qspi_dma_free(qspi);
+err_clk_disable:
+ clk_disable_unprepare(qspi->clk);
+err_master_put:
spi_master_put(qspi->ctrl);
return ret;
@@ -635,14 +693,28 @@ static int stm32_qspi_remove(struct platform_device *pdev)
@@ -634,15 +689,38 @@ static int stm32_qspi_remove(struct platform_device *pdev)
{
struct stm32_qspi *qspi = platform_get_drvdata(pdev);
stm32_qspi_release(qspi);
- stm32_qspi_release(qspi);
+ pm_runtime_get_sync(qspi->dev);
+ /* disable qspi */
+ writel_relaxed(0, qspi->io_base + QSPI_CR);
+ stm32_qspi_dma_free(qspi);
+ mutex_destroy(&qspi->lock);
+ pm_runtime_put_noidle(qspi->dev);
+ pm_runtime_disable(qspi->dev);
+ pm_runtime_set_suspended(qspi->dev);
+ pm_runtime_dont_use_autosuspend(qspi->dev);
+ clk_disable_unprepare(qspi->clk);
+
return 0;
}
@ -1616,7 +1716,7 @@ index 4e726929b..02f110b10 100644
pinctrl_pm_select_sleep_state(dev);
return 0;
@@ -651,17 +723,28 @@ static int __maybe_unused stm32_qspi_suspend(struct device *dev)
@@ -651,17 +729,28 @@ static int __maybe_unused stm32_qspi_suspend(struct device *dev)
static int __maybe_unused stm32_qspi_resume(struct device *dev)
{
struct stm32_qspi *qspi = dev_get_drvdata(dev);
@ -1648,7 +1748,7 @@ index 4e726929b..02f110b10 100644
static const struct of_device_id stm32_qspi_match[] = {
{.compatible = "st,stm32f469-qspi"},
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index b222ce8d0..df98a6925 100644
index b222ce8d083ef..feed9206323be 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -5,6 +5,7 @@
@ -1677,15 +1777,13 @@ index b222ce8d0..df98a6925 100644
#define STM32F4_SPI_CR1_SPE BIT(6)
#define STM32F4_SPI_CR1_LSBFRST BIT(7)
#define STM32F4_SPI_CR1_SSI BIT(8)
@@ -94,27 +96,24 @@
@@ -94,27 +96,22 @@
#define STM32H7_SPI_CR1_SSI BIT(12)
/* STM32H7_SPI_CR2 bit fields */
-#define STM32H7_SPI_CR2_TSIZE_SHIFT 0
#define STM32H7_SPI_CR2_TSIZE GENMASK(15, 0)
+#define STM32H7_SPI_CR2_TSER GENMASK(31, 16)
+#define STM32H7_SPI_TSIZE_MAX GENMASK(15, 0)
+#define STM32H7_SPI_TSER_MAX (GENMASK(31, 16) >> 16)
/* STM32H7_SPI_CFG1 bit fields */
-#define STM32H7_SPI_CFG1_DSIZE_SHIFT 0
@ -1709,27 +1807,19 @@ index b222ce8d0..df98a6925 100644
#define STM32H7_SPI_CFG2_SP GENMASK(21, 19)
#define STM32H7_SPI_CFG2_MASTER BIT(22)
#define STM32H7_SPI_CFG2_LSBFRST BIT(23)
@@ -131,16 +130,18 @@
#define STM32H7_SPI_IER_TXTFIE BIT(4)
#define STM32H7_SPI_IER_OVRIE BIT(6)
#define STM32H7_SPI_IER_MODFIE BIT(9)
+#define STM32H7_SPI_IER_TSERFIE BIT(10)
#define STM32H7_SPI_IER_ALL GENMASK(10, 0)
/* STM32H7_SPI_SR bit fields */
@@ -137,10 +134,10 @@
#define STM32H7_SPI_SR_RXP BIT(0)
#define STM32H7_SPI_SR_TXP BIT(1)
#define STM32H7_SPI_SR_EOT BIT(3)
+#define STM32H7_SPI_SR_TXTF BIT(4)
#define STM32H7_SPI_SR_OVR BIT(6)
#define STM32H7_SPI_SR_MODF BIT(9)
+#define STM32H7_SPI_SR_TSERF BIT(10)
#define STM32H7_SPI_SR_SUSP BIT(11)
-#define STM32H7_SPI_SR_RXPLVL_SHIFT 13
#define STM32H7_SPI_SR_RXPLVL GENMASK(14, 13)
#define STM32H7_SPI_SR_RXWNE BIT(15)
@@ -167,8 +168,6 @@
@@ -167,8 +164,6 @@
#define SPI_3WIRE_TX 3
#define SPI_3WIRE_RX 4
@ -1738,7 +1828,7 @@ index b222ce8d0..df98a6925 100644
/*
* use PIO for small transfers, avoiding DMA setup/teardown overhead for drivers
* without fifo buffers.
@@ -249,7 +248,7 @@ struct stm32_spi_cfg {
@@ -249,7 +244,7 @@ struct stm32_spi_cfg {
int (*set_mode)(struct stm32_spi *spi, unsigned int comm_type);
void (*set_data_idleness)(struct stm32_spi *spi, u32 length);
int (*set_number_of_data)(struct stm32_spi *spi, u32 length);
@ -1747,7 +1837,7 @@ index b222ce8d0..df98a6925 100644
void (*dma_rx_cb)(void *data);
void (*dma_tx_cb)(void *data);
int (*transfer_one_irq)(struct stm32_spi *spi);
@@ -268,7 +267,6 @@ struct stm32_spi_cfg {
@@ -268,7 +263,6 @@ struct stm32_spi_cfg {
* @base: virtual memory area
* @clk: hw kernel clock feeding the SPI clock generator
* @clk_rate: rate of the hw kernel clock feeding the SPI clock generator
@ -1755,15 +1845,7 @@ index b222ce8d0..df98a6925 100644
* @lock: prevent I/O concurrent access
* @irq: SPI controller interrupt line
* @fifo_size: size of the embedded fifo in bytes
@@ -278,6 +276,7 @@ struct stm32_spi_cfg {
* @cur_fthlv: fifo threshold level (data frames in a single data packet)
* @cur_comm: SPI communication mode
* @cur_xferlen: current transfer length in bytes
+ * @cur_reload: current transfer remaining bytes to be loaded
* @cur_usedma: boolean to know if dma is used in current transfer
* @tx_buf: data to be written, or NULL
* @rx_buf: data to be read, or NULL
@@ -294,7 +293,6 @@ struct stm32_spi {
@@ -294,7 +288,6 @@ struct stm32_spi {
void __iomem *base;
struct clk *clk;
u32 clk_rate;
@ -1771,15 +1853,7 @@ index b222ce8d0..df98a6925 100644
spinlock_t lock; /* prevent I/O concurrent access */
int irq;
unsigned int fifo_size;
@@ -305,6 +303,7 @@ struct stm32_spi {
unsigned int cur_fthlv;
unsigned int cur_comm;
unsigned int cur_xferlen;
+ unsigned int cur_reload;
bool cur_usedma;
const void *tx_buf;
@@ -313,7 +312,10 @@ struct stm32_spi {
@@ -313,7 +306,10 @@ struct stm32_spi {
int rx_len;
struct dma_chan *dma_tx;
struct dma_chan *dma_rx;
@ -1790,7 +1864,7 @@ index b222ce8d0..df98a6925 100644
};
static const struct stm32_spi_regspec stm32f4_spi_regspec = {
@@ -417,9 +419,7 @@ static int stm32h7_spi_get_bpw_mask(struct stm32_spi *spi)
@@ -417,9 +413,7 @@ static int stm32h7_spi_get_bpw_mask(struct stm32_spi *spi)
stm32_spi_set_bits(spi, STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_DSIZE);
cfg1 = readl_relaxed(spi->base + STM32H7_SPI_CFG1);
@ -1801,7 +1875,7 @@ index b222ce8d0..df98a6925 100644
spin_unlock_irqrestore(&spi->lock, flags);
@@ -442,7 +442,8 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
@@ -442,7 +436,8 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
{
u32 div, mbrdiv;
@ -1811,7 +1885,7 @@ index b222ce8d0..df98a6925 100644
/*
* SPI framework set xfer->speed_hz to master->max_speed_hz if
@@ -469,19 +470,22 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
@@ -469,19 +464,22 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
* stm32h7_spi_prepare_fthlv - Determine FIFO threshold level
* @spi: pointer to the spi controller data structure
*/
@ -1839,7 +1913,7 @@ index b222ce8d0..df98a6925 100644
/* align packet size with data registers access */
if (spi->cur_bpw > 8)
@@ -489,9 +493,29 @@ static u32 stm32h7_spi_prepare_fthlv(struct stm32_spi *spi)
@@ -489,6 +487,9 @@ static u32 stm32h7_spi_prepare_fthlv(struct stm32_spi *spi)
else
fthlv -= (fthlv % 4); /* multiple of 4 */
@ -1849,27 +1923,7 @@ index b222ce8d0..df98a6925 100644
return fthlv;
}
+static void stm32h7_spi_transfer_extension(struct stm32_spi *spi)
+{
+ if (spi->cur_reload > 0) {
+ u32 cr2 = readl_relaxed(spi->base + STM32H7_SPI_CR2);
+ u32 tsize = FIELD_GET(STM32H7_SPI_CR2_TSIZE, cr2);
+ u32 tser = STM32H7_SPI_TSER_MAX;
+
+ tser -= (STM32H7_SPI_TSER_MAX % spi->cur_fthlv);
+ tser = min(spi->cur_reload, tser);
+
+ writel_relaxed(FIELD_PREP(STM32H7_SPI_CR2_TSER, tser) |
+ FIELD_PREP(STM32H7_SPI_CR2_TSIZE, tsize),
+ spi->base + STM32H7_SPI_CR2);
+ spi->cur_reload -= tser;
+ }
+}
+
/**
* stm32f4_spi_write_tx - Write bytes to Transmit Data Register
* @spi: pointer to the spi controller data structure
@@ -592,25 +616,26 @@ static void stm32f4_spi_read_rx(struct stm32_spi *spi)
@@ -592,25 +593,26 @@ static void stm32f4_spi_read_rx(struct stm32_spi *spi)
* Write in rx_buf depends on remaining bytes to avoid to write beyond
* rx_buf end.
*/
@ -1902,7 +1956,7 @@ index b222ce8d0..df98a6925 100644
u16 *rx_buf16 = (u16 *)(spi->rx_buf + offs);
*rx_buf16 = readw_relaxed(spi->base + STM32H7_SPI_RXDR);
@@ -623,12 +648,11 @@ static void stm32h7_spi_read_rxfifo(struct stm32_spi *spi, bool flush)
@@ -623,12 +625,11 @@ static void stm32h7_spi_read_rxfifo(struct stm32_spi *spi, bool flush)
}
sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
@ -1918,7 +1972,7 @@ index b222ce8d0..df98a6925 100644
}
/**
@@ -696,12 +720,7 @@ static void stm32f4_spi_disable(struct stm32_spi *spi)
@@ -696,12 +697,7 @@ static void stm32f4_spi_disable(struct stm32_spi *spi)
* @spi: pointer to the spi controller data structure
*
* RX-Fifo is flushed when SPI controller is disabled. To prevent any data
@ -1932,7 +1986,7 @@ index b222ce8d0..df98a6925 100644
*/
static void stm32h7_spi_disable(struct stm32_spi *spi)
{
@@ -736,7 +755,7 @@ static void stm32h7_spi_disable(struct stm32_spi *spi)
@@ -736,7 +732,7 @@ static void stm32h7_spi_disable(struct stm32_spi *spi)
}
if (!spi->cur_usedma && spi->rx_buf && (spi->rx_len > 0))
@ -1941,7 +1995,7 @@ index b222ce8d0..df98a6925 100644
if (spi->cur_usedma && spi->dma_tx)
dmaengine_terminate_all(spi->dma_tx);
@@ -891,7 +910,7 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
@@ -891,7 +887,7 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
{
struct spi_master *master = dev_id;
struct stm32_spi *spi = spi_master_get_devdata(master);
@ -1950,7 +2004,7 @@ index b222ce8d0..df98a6925 100644
unsigned long flags;
bool end = false;
@@ -899,77 +918,82 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
@@ -899,77 +895,77 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
ier = readl_relaxed(spi->base + STM32H7_SPI_IER);
@ -1989,11 +2043,6 @@ index b222ce8d0..df98a6925 100644
- if (sr & STM32H7_SPI_SR_SUSP) {
- dev_warn(spi->dev, "Communication suspended\n");
+ if (mask & STM32H7_SPI_SR_TSERF) {
+ stm32h7_spi_transfer_extension(spi);
+ ifcr |= STM32H7_SPI_SR_TSERF;
+ }
+
+ if (mask & STM32H7_SPI_SR_SUSP) {
+ dev_warn_once(spi->dev,
+ "System too slow is limiting data throughput\n");
@ -2075,7 +2124,42 @@ index b222ce8d0..df98a6925 100644
return IRQ_HANDLED;
}
@@ -1079,25 +1103,18 @@ static void stm32f4_spi_dma_rx_cb(void *data)
@@ -980,11 +976,8 @@ static int stm32_spi_setup(struct spi_device *spi_dev)
{
int ret = 0;
- if (!gpio_is_valid(spi_dev->cs_gpio)) {
- dev_err(&spi_dev->dev, "%d is not a valid gpio\n",
- spi_dev->cs_gpio);
- return -EINVAL;
- }
+ if (!gpio_is_valid(spi_dev->cs_gpio))
+ return 0;
dev_dbg(&spi_dev->dev, "%s: set gpio%d output %s\n", __func__,
spi_dev->cs_gpio,
@@ -1034,6 +1027,20 @@ static int stm32_spi_prepare_msg(struct spi_master *master,
spi_dev->mode & SPI_LSB_FIRST,
spi_dev->mode & SPI_CS_HIGH);
+ /* On STM32H7, messages should not exceed a maximum size setted
+ * afterward via the set_number_of_data function. In order to
+ * ensure that, split large messages into several messages
+ */
+ if (spi->cfg->set_number_of_data) {
+ int ret;
+
+ ret = spi_split_transfers_maxsize(master, msg,
+ STM32H7_SPI_TSIZE_MAX,
+ GFP_KERNEL | GFP_DMA);
+ if (ret)
+ return ret;
+ }
+
spin_lock_irqsave(&spi->lock, flags);
/* CPOL, CPHA and LSB FIRST bits have common register */
@@ -1079,25 +1086,18 @@ static void stm32f4_spi_dma_rx_cb(void *data)
/**
* stm32h7_spi_dma_cb - dma callback
*
@ -2103,7 +2187,7 @@ index b222ce8d0..df98a6925 100644
}
/**
@@ -1190,9 +1207,6 @@ static int stm32f4_spi_transfer_one_irq(struct stm32_spi *spi)
@@ -1190,9 +1190,6 @@ static int stm32f4_spi_transfer_one_irq(struct stm32_spi *spi)
/**
* stm32h7_spi_transfer_one_irq - transfer a single spi_transfer using
* interrupts
@ -2113,18 +2197,16 @@ index b222ce8d0..df98a6925 100644
*/
static int stm32h7_spi_transfer_one_irq(struct stm32_spi *spi)
{
@@ -1209,7 +1223,9 @@ static int stm32h7_spi_transfer_one_irq(struct stm32_spi *spi)
@@ -1209,7 +1206,7 @@ static int stm32h7_spi_transfer_one_irq(struct stm32_spi *spi)
/* Enable the interrupts relative to the end of transfer */
ier |= STM32H7_SPI_IER_EOTIE | STM32H7_SPI_IER_TXTFIE |
- STM32H7_SPI_IER_OVRIE | STM32H7_SPI_IER_MODFIE;
+ STM32H7_SPI_IER_OVRIE;
+ /* Enable the interrupt relative to transfer extension */
+ ier |= STM32H7_SPI_IER_TSERFIE;
spin_lock_irqsave(&spi->lock, flags);
@@ -1225,15 +1241,19 @@ static int stm32h7_spi_transfer_one_irq(struct stm32_spi *spi)
@@ -1225,15 +1222,19 @@ static int stm32h7_spi_transfer_one_irq(struct stm32_spi *spi)
spin_unlock_irqrestore(&spi->lock, flags);
@ -2146,7 +2228,7 @@ index b222ce8d0..df98a6925 100644
/* In DMA mode end of transfer is handled by DMA TX or RX callback. */
if (spi->cur_comm == SPI_SIMPLEX_RX || spi->cur_comm == SPI_3WIRE_RX ||
spi->cur_comm == SPI_FULL_DUPLEX) {
@@ -1246,40 +1266,58 @@ static void stm32f4_spi_transfer_one_dma_start(struct stm32_spi *spi)
@@ -1246,40 +1247,56 @@ static void stm32f4_spi_transfer_one_dma_start(struct stm32_spi *spi)
}
stm32_spi_enable(spi);
@ -2170,10 +2252,9 @@ index b222ce8d0..df98a6925 100644
/* Enable the interrupts relative to the end of transfer */
stm32_spi_set_bits(spi, STM32H7_SPI_IER, STM32H7_SPI_IER_EOTIE |
STM32H7_SPI_IER_TXTFIE |
STM32H7_SPI_IER_OVRIE |
- STM32H7_SPI_IER_OVRIE |
- STM32H7_SPI_IER_MODFIE);
+ /* transfer extension */
+ STM32H7_SPI_IER_TSERFIE);
+ STM32H7_SPI_IER_OVRIE);
stm32_spi_enable(spi);
@ -2210,7 +2291,7 @@ index b222ce8d0..df98a6925 100644
rx_dma_desc = NULL;
if (spi->rx_buf && spi->dma_rx) {
stm32_spi_dma_config(spi, &rx_dma_conf, DMA_DEV_TO_MEM);
@@ -1316,7 +1354,7 @@ static int stm32_spi_transfer_one_dma(struct stm32_spi *spi,
@@ -1316,7 +1333,7 @@ static int stm32_spi_transfer_one_dma(struct stm32_spi *spi,
goto dma_desc_error;
if (rx_dma_desc) {
@ -2219,7 +2300,7 @@ index b222ce8d0..df98a6925 100644
rx_dma_desc->callback_param = spi;
if (dma_submit_error(dmaengine_submit(rx_dma_desc))) {
@@ -1330,7 +1368,7 @@ static int stm32_spi_transfer_one_dma(struct stm32_spi *spi,
@@ -1330,7 +1347,7 @@ static int stm32_spi_transfer_one_dma(struct stm32_spi *spi,
if (tx_dma_desc) {
if (spi->cur_comm == SPI_SIMPLEX_TX ||
spi->cur_comm == SPI_3WIRE_TX) {
@ -2228,7 +2309,7 @@ index b222ce8d0..df98a6925 100644
tx_dma_desc->callback_param = spi;
}
@@ -1345,12 +1383,9 @@ static int stm32_spi_transfer_one_dma(struct stm32_spi *spi,
@@ -1345,12 +1362,9 @@ static int stm32_spi_transfer_one_dma(struct stm32_spi *spi,
stm32_spi_set_bits(spi, spi->cfg->regs->dma_tx_en.reg,
spi->cfg->regs->dma_tx_en.mask);
}
@ -2242,7 +2323,7 @@ index b222ce8d0..df98a6925 100644
dma_submit_error:
if (spi->dma_rx)
@@ -1392,15 +1427,13 @@ static void stm32h7_spi_set_bpw(struct stm32_spi *spi)
@@ -1392,15 +1406,13 @@ static void stm32h7_spi_set_bpw(struct stm32_spi *spi)
bpw = spi->cur_bpw - 1;
cfg1_clrb |= STM32H7_SPI_CFG1_DSIZE;
@ -2261,7 +2342,7 @@ index b222ce8d0..df98a6925 100644
writel_relaxed(
(readl_relaxed(spi->base + STM32H7_SPI_CFG1) &
@@ -1418,8 +1451,7 @@ static void stm32_spi_set_mbr(struct stm32_spi *spi, u32 mbrdiv)
@@ -1418,8 +1430,7 @@ static void stm32_spi_set_mbr(struct stm32_spi *spi, u32 mbrdiv)
u32 clrb = 0, setb = 0;
clrb |= spi->cfg->regs->br.mask;
@ -2271,7 +2352,7 @@ index b222ce8d0..df98a6925 100644
writel_relaxed((readl_relaxed(spi->base + spi->cfg->regs->br.reg) &
~clrb) | setb,
@@ -1504,8 +1536,7 @@ static int stm32h7_spi_set_mode(struct stm32_spi *spi, unsigned int comm_type)
@@ -1504,8 +1515,7 @@ static int stm32h7_spi_set_mode(struct stm32_spi *spi, unsigned int comm_type)
}
cfg2_clrb |= STM32H7_SPI_CFG2_COMM;
@ -2281,7 +2362,7 @@ index b222ce8d0..df98a6925 100644
writel_relaxed(
(readl_relaxed(spi->base + STM32H7_SPI_CFG2) &
@@ -1527,15 +1558,15 @@ static void stm32h7_spi_data_idleness(struct stm32_spi *spi, u32 len)
@@ -1527,15 +1537,15 @@ static void stm32h7_spi_data_idleness(struct stm32_spi *spi, u32 len)
cfg2_clrb |= STM32H7_SPI_CFG2_MIDI;
if ((len > 1) && (spi->cur_midi > 0)) {
@ -2303,7 +2384,7 @@ index b222ce8d0..df98a6925 100644
}
writel_relaxed((readl_relaxed(spi->base + STM32H7_SPI_CFG2) &
@@ -1550,19 +1581,23 @@ static void stm32h7_spi_data_idleness(struct stm32_spi *spi, u32 len)
@@ -1550,14 +1560,8 @@ static void stm32h7_spi_data_idleness(struct stm32_spi *spi, u32 len)
*/
static int stm32h7_spi_number_of_data(struct stm32_spi *spi, u32 nb_words)
{
@ -2315,29 +2396,12 @@ index b222ce8d0..df98a6925 100644
- cr2_setb = nb_words << STM32H7_SPI_CR2_TSIZE_SHIFT;
- writel_relaxed((readl_relaxed(spi->base + STM32H7_SPI_CR2) &
- ~cr2_clrb) | cr2_setb,
- spi->base + STM32H7_SPI_CR2);
+ u32 tsize;
+
+ if (nb_words <= STM32H7_SPI_TSIZE_MAX) {
+ tsize = nb_words;
+ spi->cur_reload = 0;
+ writel_relaxed(FIELD_PREP(STM32H7_SPI_CR2_TSIZE, nb_words),
spi->base + STM32H7_SPI_CR2);
} else {
- return -EMSGSIZE;
+ tsize = STM32H7_SPI_TSIZE_MAX;
+ tsize -= (STM32H7_SPI_TSIZE_MAX % spi->cur_fthlv);
+ spi->cur_reload = nb_words - tsize;
}
+ writel_relaxed(FIELD_PREP(STM32H7_SPI_CR2_TSIZE, tsize),
+ spi->base + STM32H7_SPI_CR2);
+
+ if (spi->cur_reload > 0)
+ stm32h7_spi_transfer_extension(spi);
+
return 0;
}
@@ -1578,39 +1613,33 @@ static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
return -EMSGSIZE;
@@ -1578,39 +1582,33 @@ static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
unsigned long flags;
unsigned int comm_type;
int nb_words, ret = 0;
@ -2349,10 +2413,12 @@ index b222ce8d0..df98a6925 100644
- spi->cur_bpw = transfer->bits_per_word;
- spi->cfg->set_bpw(spi);
- }
-
+ spi->cur_xferlen = transfer->len;
- if (spi->cur_speed != transfer->speed_hz) {
- int mbr;
+ spi->cur_xferlen = transfer->len;
+ spi->cur_bpw = transfer->bits_per_word;
+ spi->cfg->set_bpw(spi);
- /* Update spi->cur_speed with real clock speed */
- mbr = stm32_spi_prepare_mbr(spi, transfer->speed_hz,
@ -2362,9 +2428,7 @@ index b222ce8d0..df98a6925 100644
- ret = mbr;
- goto out;
- }
+ spi->cur_bpw = transfer->bits_per_word;
+ spi->cfg->set_bpw(spi);
-
- transfer->speed_hz = spi->cur_speed;
- stm32_spi_set_mbr(spi, mbr);
+ /* Update spi->cur_speed with real clock speed */
@ -2395,7 +2459,7 @@ index b222ce8d0..df98a6925 100644
if (spi->cfg->set_data_idleness)
spi->cfg->set_data_idleness(spi, transfer->len);
@@ -1628,8 +1657,6 @@ static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
@@ -1628,8 +1626,6 @@ static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
goto out;
}
@ -2404,7 +2468,7 @@ index b222ce8d0..df98a6925 100644
dev_dbg(spi->dev, "transfer communication mode set to %d\n",
spi->cur_comm);
dev_dbg(spi->dev,
@@ -1658,6 +1685,8 @@ static int stm32_spi_transfer_one(struct spi_master *master,
@@ -1658,8 +1654,16 @@ static int stm32_spi_transfer_one(struct spi_master *master,
struct spi_transfer *transfer)
{
struct stm32_spi *spi = spi_master_get_devdata(master);
@ -2412,8 +2476,16 @@ index b222ce8d0..df98a6925 100644
+ unsigned long timeout;
int ret;
+ /* Don't do anything on 0 bytes transfers */
+ if (transfer->len == 0) {
+ spi->xfer_status = 0;
+ goto finalize;
+ }
+
spi->tx_buf = transfer->tx_buf;
@@ -1674,10 +1703,39 @@ static int stm32_spi_transfer_one(struct spi_master *master,
spi->rx_buf = transfer->rx_buf;
spi->tx_len = spi->tx_buf ? transfer->len : 0;
@@ -1674,10 +1678,40 @@ static int stm32_spi_transfer_one(struct spi_master *master,
return ret;
}
@ -2449,13 +2521,14 @@ index b222ce8d0..df98a6925 100644
+
+ spi->cfg->disable(spi);
+
+finalize:
+ spi_finalize_current_transfer(master);
+
+ return spi->xfer_status;
}
/**
@@ -1810,7 +1868,8 @@ static int stm32_spi_probe(struct platform_device *pdev)
@@ -1810,7 +1844,8 @@ static int stm32_spi_probe(struct platform_device *pdev)
struct spi_master *master;
struct stm32_spi *spi;
struct resource *res;
@ -2465,7 +2538,7 @@ index b222ce8d0..df98a6925 100644
master = spi_alloc_master(&pdev->dev, sizeof(struct stm32_spi));
if (!master) {
@@ -1823,6 +1882,8 @@ static int stm32_spi_probe(struct platform_device *pdev)
@@ -1823,6 +1858,8 @@ static int stm32_spi_probe(struct platform_device *pdev)
spi->dev = &pdev->dev;
spi->master = master;
spin_lock_init(&spi->lock);
@ -2474,7 +2547,7 @@ index b222ce8d0..df98a6925 100644
spi->cfg = (const struct stm32_spi_cfg *)
of_match_device(pdev->dev.driver->of_match_table,
@@ -1873,11 +1934,20 @@ static int stm32_spi_probe(struct platform_device *pdev)
@@ -1873,11 +1910,20 @@ static int stm32_spi_probe(struct platform_device *pdev)
goto err_clk_disable;
}
@ -2499,7 +2572,7 @@ index b222ce8d0..df98a6925 100644
}
if (spi->cfg->has_fifo)
@@ -1903,17 +1973,29 @@ static int stm32_spi_probe(struct platform_device *pdev)
@@ -1903,17 +1949,29 @@ static int stm32_spi_probe(struct platform_device *pdev)
master->transfer_one = stm32_spi_transfer_one;
master->unprepare_message = stm32_spi_unprepare_msg;
@ -2539,7 +2612,7 @@ index b222ce8d0..df98a6925 100644
if (spi->dma_tx || spi->dma_rx)
master->can_dma = stm32_spi_can_dma;
@@ -1921,36 +2003,33 @@ static int stm32_spi_probe(struct platform_device *pdev)
@@ -1921,36 +1979,33 @@ static int stm32_spi_probe(struct platform_device *pdev)
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
@ -2549,14 +2622,14 @@ index b222ce8d0..df98a6925 100644
- ret);
- goto err_dma_release;
- }
-
+ num_cs = of_gpio_named_count(pdev->dev.of_node, "cs-gpios");
- if (!master->cs_gpios) {
- dev_err(&pdev->dev, "no CS gpios available\n");
- ret = -EINVAL;
- goto err_dma_release;
- }
+ num_cs = of_gpio_named_count(pdev->dev.of_node, "cs-gpios");
-
- for (i = 0; i < master->num_chipselect; i++) {
- if (!gpio_is_valid(master->cs_gpios[i])) {
- dev_err(&pdev->dev, "%i is not a valid gpio\n",
@ -2596,7 +2669,7 @@ index b222ce8d0..df98a6925 100644
dev_info(&pdev->dev, "driver initialized\n");
return 0;
@@ -1975,6 +2054,9 @@ static int stm32_spi_remove(struct platform_device *pdev)
@@ -1975,6 +2030,9 @@ static int stm32_spi_remove(struct platform_device *pdev)
struct spi_master *master = platform_get_drvdata(pdev);
struct stm32_spi *spi = spi_master_get_devdata(master);
@ -2606,7 +2679,7 @@ index b222ce8d0..df98a6925 100644
spi->cfg->disable(spi);
if (master->dma_tx)
@@ -1984,7 +2066,12 @@ static int stm32_spi_remove(struct platform_device *pdev)
@@ -1984,7 +2042,12 @@ static int stm32_spi_remove(struct platform_device *pdev)
clk_disable_unprepare(spi->clk);
@ -2619,7 +2692,7 @@ index b222ce8d0..df98a6925 100644
return 0;
}
@@ -1997,13 +2084,18 @@ static int stm32_spi_runtime_suspend(struct device *dev)
@@ -1997,13 +2060,18 @@ static int stm32_spi_runtime_suspend(struct device *dev)
clk_disable_unprepare(spi->clk);
@ -2639,7 +2712,7 @@ index b222ce8d0..df98a6925 100644
return clk_prepare_enable(spi->clk);
}
@@ -2033,10 +2125,23 @@ static int stm32_spi_resume(struct device *dev)
@@ -2033,10 +2101,23 @@ static int stm32_spi_resume(struct device *dev)
return ret;
ret = spi_master_resume(master);
@ -2665,6 +2738,18 @@ index b222ce8d0..df98a6925 100644
}
#endif
diff --git a/include/dt-bindings/pinctrl/stm32-pinfunc.h b/include/dt-bindings/pinctrl/stm32-pinfunc.h
index e6fb8ada3f4d3..370a25a9366cc 100644
--- a/include/dt-bindings/pinctrl/stm32-pinfunc.h
+++ b/include/dt-bindings/pinctrl/stm32-pinfunc.h
@@ -26,6 +26,7 @@
#define AF14 0xf
#define AF15 0x10
#define ANALOG 0x11
+#define RSVD 0x12
/* define Pins number*/
#define PIN_NO(port, line) (((port) - 'A') * 0x10 + (line))
--
2.17.1

687
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0018-ARM-stm32mp1-r1-SOUND.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0018-ARM-stm32mp1-r2-SOUND.patch
View File

@ -1,20 +1,189 @@
From 9ce7cf9f5ce6b3fe1370be07d989eabaf0afb25a Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:47:45 +0200
Subject: [PATCH 18/23] ARM-stm32mp1-r1-SOUND
From 69629ada3651978075924c825648de57ad2dab11 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:51 +0200
Subject: [PATCH 18/22] ARM-stm32mp1-r2-rc8-SOUND
---
sound/soc/codecs/Kconfig | 2 +-
sound/soc/codecs/cs42l51.c | 17 ++++--
sound/soc/codecs/wm8994.c | 80 +++++++++++++++++++++++--
sound/soc/stm/stm32_i2s.c | 75 +++++++++++++++++-------
sound/soc/stm/stm32_sai.c | 26 ++++++---
sound/soc/stm/stm32_sai_sub.c | 21 ++++---
sound/soc/stm/stm32_spdifrx.c | 107 +++++++++++++++++++++-------------
7 files changed, 241 insertions(+), 87 deletions(-)
.../bindings/sound/st,stm32-i2s.txt | 62 ---
.../bindings/sound/st,stm32-i2s.yaml | 91 +++++
sound/soc/codecs/Kconfig | 2 +-
sound/soc/codecs/cs42l51.c | 17 +-
sound/soc/codecs/wm8994.c | 80 +++-
sound/soc/stm/stm32_i2s.c | 385 +++++++++++++++---
sound/soc/stm/stm32_sai.c | 26 +-
sound/soc/stm/stm32_sai_sub.c | 21 +-
sound/soc/stm/stm32_spdifrx.c | 105 +++--
9 files changed, 599 insertions(+), 190 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/st,stm32-i2s.txt
create mode 100644 Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/st,stm32-i2s.txt b/Documentation/devicetree/bindings/sound/st,stm32-i2s.txt
deleted file mode 100644
index cbf24bcd1b8d3..0000000000000
--- a/Documentation/devicetree/bindings/sound/st,stm32-i2s.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-STMicroelectronics STM32 SPI/I2S Controller
-
-The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode.
-Only some SPI instances support I2S.
-
-Required properties:
- - compatible: Must be "st,stm32h7-i2s"
- - reg: Offset and length of the device's register set.
- - interrupts: Must contain the interrupt line id.
- - clocks: Must contain phandle and clock specifier pairs for each entry
- in clock-names.
- - clock-names: Must contain "i2sclk", "pclk", "x8k" and "x11k".
- "i2sclk": clock which feeds the internal clock generator
- "pclk": clock which feeds the peripheral bus interface
- "x8k": I2S parent clock for sampling rates multiple of 8kHz.
- "x11k": I2S parent clock for sampling rates multiple of 11.025kHz.
- - dmas: DMA specifiers for tx and rx dma.
- See Documentation/devicetree/bindings/dma/stm32-dma.txt.
- - dma-names: Identifier for each DMA request line. Must be "tx" and "rx".
- - pinctrl-names: should contain only value "default"
- - pinctrl-0: see Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
-
-Optional properties:
- - resets: Reference to a reset controller asserting the reset controller
-
-The device node should contain one 'port' child node with one child 'endpoint'
-node, according to the bindings defined in Documentation/devicetree/bindings/
-graph.txt.
-
-Example:
-sound_card {
- compatible = "audio-graph-card";
- dais = <&i2s2_port>;
-};
-
-i2s2: audio-controller@40003800 {
- compatible = "st,stm32h7-i2s";
- reg = <0x40003800 0x400>;
- interrupts = <36>;
- clocks = <&rcc PCLK1>, <&rcc SPI2_CK>, <&rcc PLL1_Q>, <&rcc PLL2_P>;
- clock-names = "pclk", "i2sclk", "x8k", "x11k";
- dmas = <&dmamux2 2 39 0x400 0x1>,
- <&dmamux2 3 40 0x400 0x1>;
- dma-names = "rx", "tx";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2s2>;
-
- i2s2_port: port@0 {
- cpu_endpoint: endpoint {
- remote-endpoint = <&codec_endpoint>;
- format = "i2s";
- };
- };
-};
-
-audio-codec {
- codec_port: port@0 {
- codec_endpoint: endpoint {
- remote-endpoint = <&cpu_endpoint>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml b/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml
new file mode 100644
index 0000000000000..6feb5a09c184e
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 SPI/I2S Controller
+
+maintainers:
+ - Olivier Moysan <olivier.moysan@st.com>
+
+description:
+ The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode.
+ Only some SPI instances support I2S.
+
+properties:
+ compatible:
+ enum:
+ - st,stm32h7-i2s
+
+ "#sound-dai-cells":
+ const: 0
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: clock feeding the peripheral bus interface.
+ - description: clock feeding the internal clock generator.
+ - description: I2S parent clock for sampling rates multiple of 8kHz.
+ - description: I2S parent clock for sampling rates multiple of 11.025kHz.
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: i2sclk
+ - const: x8k
+ - const: x11k
+
+ interrupts:
+ maxItems: 1
+
+ dmas:
+ items:
+ - description: audio capture DMA.
+ - description: audio playback DMA.
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+ resets:
+ maxItems: 1
+
+ "#clock-cells":
+ description: Configure the I2S device as MCLK clock provider.
+ const: 0
+
+required:
+ - compatible
+ - "#sound-dai-cells"
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - dmas
+ - dma-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/stm32mp1-clks.h>
+ i2s2: audio-controller@4000b000 {
+ compatible = "st,stm32h7-i2s";
+ #sound-dai-cells = <0>;
+ reg = <0x4000b000 0x400>;
+ clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
+ clock-names = "pclk", "i2sclk", "x8k", "x11k";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmamux1 39 0x400 0x01>,
+ <&dmamux1 40 0x400 0x01>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s2_pins_a>;
+ };
+
+...
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 229cc89f8..e5d231a63 100644
index 229cc89f8c5a5..e5d231a6331b4 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -1395,7 +1395,7 @@ config SND_SOC_WM8993
@ -27,7 +196,7 @@ index 229cc89f8..e5d231a63 100644
config SND_SOC_WM8995
tristate
diff --git a/sound/soc/codecs/cs42l51.c b/sound/soc/codecs/cs42l51.c
index 55408c8fc..01a4d93e1 100644
index 55408c8fcb4e3..01a4d93e11dd8 100644
--- a/sound/soc/codecs/cs42l51.c
+++ b/sound/soc/codecs/cs42l51.c
@@ -174,6 +174,7 @@ static int cs42l51_pdn_event(struct snd_soc_dapm_widget *w,
@ -69,7 +238,7 @@ index 55408c8fc..01a4d93e1 100644
{"Right ADC", NULL, "Right PGA"},
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index d5fb7f5dd..a166ab1f3 100644
index d5fb7f5dd551c..a166ab1f34e1e 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -7,6 +7,7 @@
@ -214,10 +383,395 @@ index d5fb7f5dd..a166ab1f3 100644
snd_soc_dapm_new_controls(dapm, wm8994_lateclk_revd_widgets,
ARRAY_SIZE(wm8994_lateclk_revd_widgets));
diff --git a/sound/soc/stm/stm32_i2s.c b/sound/soc/stm/stm32_i2s.c
index 3e7226a53..7c4d63c33 100644
index 3e7226a53e53a..7d1672cf78cc5 100644
--- a/sound/soc/stm/stm32_i2s.c
+++ b/sound/soc/stm/stm32_i2s.c
@@ -831,25 +831,33 @@ static int stm32_i2s_parse_dt(struct platform_device *pdev,
@@ -8,6 +8,7 @@
#include <linux/bitfield.h>
#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/of_irq.h>
@@ -196,6 +197,9 @@ enum i2s_datlen {
#define STM32_I2S_IS_MASTER(x) ((x)->ms_flg == I2S_MS_MASTER)
#define STM32_I2S_IS_SLAVE(x) ((x)->ms_flg == I2S_MS_SLAVE)
+#define STM32_I2S_NAME_LEN 32
+#define STM32_I2S_RATE_11K 11025
+
/**
* struct stm32_i2s_data - private data of I2S
* @regmap_conf: I2S register map configuration pointer
@@ -206,6 +210,7 @@ enum i2s_datlen {
* @dma_data_rx: dma configuration data for tx channel
* @substream: PCM substream data pointer
* @i2sclk: kernel clock feeding the I2S clock generator
+ * @i2smclk: master clock from I2S mclk provider
* @pclk: peripheral clock driving bus interface
* @x8kclk: I2S parent clock for sampling frequencies multiple of 8kHz
* @x11kclk: I2S parent clock for sampling frequencies multiple of 11kHz
@@ -215,6 +220,9 @@ enum i2s_datlen {
* @irq_lock: prevent race condition with IRQ
* @mclk_rate: master clock frequency (Hz)
* @fmt: DAI protocol
+ * @divider: prescaler division ratio
+ * @div: prescaler div field
+ * @odd: prescaler odd field
* @refcount: keep count of opened streams on I2S
* @ms_flg: master mode flag.
*/
@@ -227,6 +235,7 @@ struct stm32_i2s_data {
struct snd_dmaengine_dai_dma_data dma_data_rx;
struct snd_pcm_substream *substream;
struct clk *i2sclk;
+ struct clk *i2smclk;
struct clk *pclk;
struct clk *x8kclk;
struct clk *x11kclk;
@@ -236,10 +245,210 @@ struct stm32_i2s_data {
spinlock_t irq_lock; /* used to prevent race condition with IRQ */
unsigned int mclk_rate;
unsigned int fmt;
+ unsigned int divider;
+ unsigned int div;
+ bool odd;
int refcount;
int ms_flg;
};
+struct stm32_i2smclk_data {
+ struct clk_hw hw;
+ unsigned long freq;
+ struct stm32_i2s_data *i2s_data;
+};
+
+#define to_mclk_data(_hw) container_of(_hw, struct stm32_i2smclk_data, hw)
+
+static int stm32_i2s_calc_clk_div(struct stm32_i2s_data *i2s,
+ unsigned long input_rate,
+ unsigned long output_rate)
+{
+ unsigned int ratio, div, divider = 1;
+ bool odd;
+
+ ratio = DIV_ROUND_CLOSEST(input_rate, output_rate);
+
+ /* Check the parity of the divider */
+ odd = ratio & 0x1;
+
+ /* Compute the div prescaler */
+ div = ratio >> 1;
+
+ /* If div is 0 actual divider is 1 */
+ if (div) {
+ divider = ((2 * div) + odd);
+ dev_dbg(&i2s->pdev->dev, "Divider: 2*%d(div)+%d(odd) = %d\n",
+ div, odd, divider);
+ }
+
+ /* Division by three is not allowed by I2S prescaler */
+ if ((div == 1 && odd) || div > I2S_CGFR_I2SDIV_MAX) {
+ dev_err(&i2s->pdev->dev, "Wrong divider setting\n");
+ return -EINVAL;
+ }
+
+ if (input_rate % divider)
+ dev_dbg(&i2s->pdev->dev,
+ "Rate not accurate. requested (%ld), actual (%ld)\n",
+ output_rate, input_rate / divider);
+
+ i2s->div = div;
+ i2s->odd = odd;
+ i2s->divider = divider;
+
+ return 0;
+}
+
+static int stm32_i2s_set_clk_div(struct stm32_i2s_data *i2s)
+{
+ u32 cgfr, cgfr_mask;
+
+ cgfr = I2S_CGFR_I2SDIV_SET(i2s->div) | (i2s->odd << I2S_CGFR_ODD_SHIFT);
+ cgfr_mask = I2S_CGFR_I2SDIV_MASK | I2S_CGFR_ODD;
+
+ return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
+ cgfr_mask, cgfr);
+}
+
+static int stm32_i2s_set_parent_clock(struct stm32_i2s_data *i2s,
+ unsigned int rate)
+{
+ struct platform_device *pdev = i2s->pdev;
+ struct clk *parent_clk;
+ int ret;
+
+ if (!(rate % STM32_I2S_RATE_11K))
+ parent_clk = i2s->x11kclk;
+ else
+ parent_clk = i2s->x8kclk;
+
+ ret = clk_set_parent(i2s->i2sclk, parent_clk);
+ if (ret)
+ dev_err(&pdev->dev,
+ "Error %d setting i2sclk parent clock\n", ret);
+
+ return ret;
+}
+
+static long stm32_i2smclk_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
+{
+ struct stm32_i2smclk_data *mclk = to_mclk_data(hw);
+ struct stm32_i2s_data *i2s = mclk->i2s_data;
+ int ret;
+
+ ret = stm32_i2s_calc_clk_div(i2s, *prate, rate);
+ if (ret)
+ return ret;
+
+ mclk->freq = *prate / i2s->divider;
+
+ return mclk->freq;
+}
+
+static unsigned long stm32_i2smclk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct stm32_i2smclk_data *mclk = to_mclk_data(hw);
+
+ return mclk->freq;
+}
+
+static int stm32_i2smclk_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct stm32_i2smclk_data *mclk = to_mclk_data(hw);
+ struct stm32_i2s_data *i2s = mclk->i2s_data;
+ int ret;
+
+ ret = stm32_i2s_calc_clk_div(i2s, parent_rate, rate);
+ if (ret)
+ return ret;
+
+ ret = stm32_i2s_set_clk_div(i2s);
+ if (ret)
+ return ret;
+
+ mclk->freq = rate;
+
+ return 0;
+}
+
+static int stm32_i2smclk_enable(struct clk_hw *hw)
+{
+ struct stm32_i2smclk_data *mclk = to_mclk_data(hw);
+ struct stm32_i2s_data *i2s = mclk->i2s_data;
+
+ dev_dbg(&i2s->pdev->dev, "Enable master clock\n");
+
+ return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
+ I2S_CGFR_MCKOE, I2S_CGFR_MCKOE);
+}
+
+static void stm32_i2smclk_disable(struct clk_hw *hw)
+{
+ struct stm32_i2smclk_data *mclk = to_mclk_data(hw);
+ struct stm32_i2s_data *i2s = mclk->i2s_data;
+
+ dev_dbg(&i2s->pdev->dev, "Disable master clock\n");
+
+ regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, I2S_CGFR_MCKOE, 0);
+}
+
+static const struct clk_ops mclk_ops = {
+ .enable = stm32_i2smclk_enable,
+ .disable = stm32_i2smclk_disable,
+ .recalc_rate = stm32_i2smclk_recalc_rate,
+ .round_rate = stm32_i2smclk_round_rate,
+ .set_rate = stm32_i2smclk_set_rate,
+};
+
+static int stm32_i2s_add_mclk_provider(struct stm32_i2s_data *i2s)
+{
+ struct clk_hw *hw;
+ struct stm32_i2smclk_data *mclk;
+ struct device *dev = &i2s->pdev->dev;
+ const char *pname = __clk_get_name(i2s->i2sclk);
+ char *mclk_name, *p, *s = (char *)pname;
+ int ret, i = 0;
+
+ mclk = devm_kzalloc(dev, sizeof(*mclk), GFP_KERNEL);
+ if (!mclk)
+ return -ENOMEM;
+
+ mclk_name = devm_kcalloc(dev, sizeof(char),
+ STM32_I2S_NAME_LEN, GFP_KERNEL);
+ if (!mclk_name)
+ return -ENOMEM;
+
+ /*
+ * Forge mclk clock name from parent clock name and suffix.
+ * String after "_" char is stripped in parent name.
+ */
+ p = mclk_name;
+ while (*s && *s != '_' && (i < (STM32_I2S_NAME_LEN - 7))) {
+ *p++ = *s++;
+ i++;
+ }
+ strcat(p, "_mclk");
+
+ mclk->hw.init = CLK_HW_INIT(mclk_name, pname, &mclk_ops, 0);
+ mclk->i2s_data = i2s;
+ hw = &mclk->hw;
+
+ dev_dbg(dev, "Register master clock %s\n", mclk_name);
+ ret = devm_clk_hw_register(&i2s->pdev->dev, hw);
+ if (ret) {
+ dev_err(dev, "mclk register fails with error %d\n", ret);
+ return ret;
+ }
+ i2s->i2smclk = hw->clk;
+
+ /* register mclk provider */
+ return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
+}
+
static irqreturn_t stm32_i2s_isr(int irq, void *devid)
{
struct stm32_i2s_data *i2s = (struct stm32_i2s_data *)devid;
@@ -405,18 +614,46 @@ static int stm32_i2s_set_sysclk(struct snd_soc_dai *cpu_dai,
int clk_id, unsigned int freq, int dir)
{
struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
+ int ret = 0;
- dev_dbg(cpu_dai->dev, "I2S MCLK frequency is %uHz\n", freq);
+ dev_dbg(cpu_dai->dev, "I2S MCLK frequency is %uHz. mode: %s, dir: %s\n",
+ freq, STM32_I2S_IS_MASTER(i2s) ? "master" : "slave",
+ dir ? "output" : "input");
- if ((dir == SND_SOC_CLOCK_OUT) && STM32_I2S_IS_MASTER(i2s)) {
- i2s->mclk_rate = freq;
+ /* MCLK generation is available only in master mode */
+ if (dir == SND_SOC_CLOCK_OUT && STM32_I2S_IS_MASTER(i2s)) {
+ if (!i2s->i2smclk) {
+ dev_dbg(cpu_dai->dev, "No MCLK registered\n");
+ return 0;
+ }
- /* Enable master clock if master mode and mclk-fs are set */
- return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
- I2S_CGFR_MCKOE, I2S_CGFR_MCKOE);
+ /* Assume shutdown if requested frequency is 0Hz */
+ if (!freq) {
+ /* Release mclk rate only if rate was actually set */
+ if (i2s->mclk_rate) {
+ clk_rate_exclusive_put(i2s->i2smclk);
+ i2s->mclk_rate = 0;
+ }
+ return regmap_update_bits(i2s->regmap,
+ STM32_I2S_CGFR_REG,
+ I2S_CGFR_MCKOE, 0);
+ }
+ /* If master clock is used, set parent clock now */
+ ret = stm32_i2s_set_parent_clock(i2s, freq);
+ if (ret)
+ return ret;
+ ret = clk_set_rate_exclusive(i2s->i2smclk, freq);
+ if (ret) {
+ dev_err(cpu_dai->dev, "Could not set mclk rate\n");
+ return ret;
+ }
+ ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
+ I2S_CGFR_MCKOE, I2S_CGFR_MCKOE);
+ if (!ret)
+ i2s->mclk_rate = freq;
}
- return 0;
+ return ret;
}
static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
@@ -424,11 +661,10 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
{
struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
unsigned long i2s_clock_rate;
- unsigned int tmp, div, real_div, nb_bits, frame_len;
+ unsigned int nb_bits, frame_len;
unsigned int rate = params_rate(params);
+ u32 cgfr;
int ret;
- u32 cgfr, cgfr_mask;
- bool odd;
if (!(rate % 11025))
clk_set_parent(i2s->i2sclk, i2s->x11kclk);
@@ -449,7 +685,10 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
* dsp mode : div = i2s_clk / (nb_bits x ws)
*/
if (i2s->mclk_rate) {
- tmp = DIV_ROUND_CLOSEST(i2s_clock_rate, i2s->mclk_rate);
+ ret = stm32_i2s_calc_clk_div(i2s, i2s_clock_rate,
+ i2s->mclk_rate);
+ if (ret)
+ return ret;
} else {
frame_len = 32;
if ((i2s->fmt & SND_SOC_DAIFMT_FORMAT_MASK) ==
@@ -462,34 +701,13 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
return ret;
nb_bits = frame_len * ((cgfr & I2S_CGFR_CHLEN) + 1);
- tmp = DIV_ROUND_CLOSEST(i2s_clock_rate, (nb_bits * rate));
- }
-
- /* Check the parity of the divider */
- odd = tmp & 0x1;
-
- /* Compute the div prescaler */
- div = tmp >> 1;
-
- cgfr = I2S_CGFR_I2SDIV_SET(div) | (odd << I2S_CGFR_ODD_SHIFT);
- cgfr_mask = I2S_CGFR_I2SDIV_MASK | I2S_CGFR_ODD;
-
- real_div = ((2 * div) + odd);
- dev_dbg(cpu_dai->dev, "I2S clk: %ld, SCLK: %d\n",
- i2s_clock_rate, rate);
- dev_dbg(cpu_dai->dev, "Divider: 2*%d(div)+%d(odd) = %d\n",
- div, odd, real_div);
-
- if (((div == 1) && odd) || (div > I2S_CGFR_I2SDIV_MAX)) {
- dev_err(cpu_dai->dev, "Wrong divider setting\n");
- return -EINVAL;
+ ret = stm32_i2s_calc_clk_div(i2s, i2s_clock_rate,
+ (nb_bits * rate));
+ if (ret)
+ return ret;
}
- if (!div && !odd)
- dev_warn(cpu_dai->dev, "real divider forced to 1\n");
-
- ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
- cgfr_mask, cgfr);
+ ret = stm32_i2s_set_clk_div(i2s);
if (ret < 0)
return ret;
@@ -694,9 +912,6 @@ static void stm32_i2s_shutdown(struct snd_pcm_substream *substream,
struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
unsigned long flags;
- regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
- I2S_CGFR_MCKOE, (unsigned int)~I2S_CGFR_MCKOE);
-
clk_disable_unprepare(i2s->i2sclk);
spin_lock_irqsave(&i2s->irq_lock, flags);
@@ -831,28 +1046,43 @@ static int stm32_i2s_parse_dt(struct platform_device *pdev,
/* Get clocks */
i2s->pclk = devm_clk_get(&pdev->dev, "pclk");
if (IS_ERR(i2s->pclk)) {
@ -255,7 +809,17 @@ index 3e7226a53..7c4d63c33 100644
return PTR_ERR(i2s->x11kclk);
}
@@ -866,12 +874,24 @@ static int stm32_i2s_parse_dt(struct platform_device *pdev,
+ /* Register mclk provider if requested */
+ if (of_find_property(np, "#clock-cells", NULL)) {
+ ret = stm32_i2s_add_mclk_provider(i2s);
+ if (ret < 0)
+ return ret;
+ }
+
/* Get irqs */
irq = platform_get_irq(pdev, 0);
if (irq < 0)
@@ -866,12 +1096,24 @@ static int stm32_i2s_parse_dt(struct platform_device *pdev,
}
/* Reset */
@ -285,7 +849,28 @@ index 3e7226a53..7c4d63c33 100644
return 0;
}
@@ -903,48 +923,62 @@ static int stm32_i2s_probe(struct platform_device *pdev)
@@ -886,16 +1128,16 @@ static int stm32_i2s_probe(struct platform_device *pdev)
if (!i2s)
return -ENOMEM;
- ret = stm32_i2s_parse_dt(pdev, i2s);
- if (ret)
- return ret;
-
i2s->pdev = pdev;
i2s->ms_flg = I2S_MS_NOT_SET;
spin_lock_init(&i2s->lock_fd);
spin_lock_init(&i2s->irq_lock);
platform_set_drvdata(pdev, i2s);
+ ret = stm32_i2s_parse_dt(pdev, i2s);
+ if (ret)
+ return ret;
+
ret = stm32_i2s_dais_init(pdev, i2s);
if (ret)
return ret;
@@ -903,48 +1145,62 @@ static int stm32_i2s_probe(struct platform_device *pdev)
i2s->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "pclk",
i2s->base, i2s->regmap_conf);
if (IS_ERR(i2s->regmap)) {
@ -359,7 +944,7 @@ index 3e7226a53..7c4d63c33 100644
return ret;
}
@@ -981,6 +1015,7 @@ static struct platform_driver stm32_i2s_driver = {
@@ -981,6 +1237,7 @@ static struct platform_driver stm32_i2s_driver = {
.pm = &stm32_i2s_pm_ops,
},
.probe = stm32_i2s_probe,
@ -368,7 +953,7 @@ index 3e7226a53..7c4d63c33 100644
module_platform_driver(stm32_i2s_driver);
diff --git a/sound/soc/stm/stm32_sai.c b/sound/soc/stm/stm32_sai.c
index ef4273361..820ae27e7 100644
index ef4273361d0d8..820ae27e7e2e9 100644
--- a/sound/soc/stm/stm32_sai.c
+++ b/sound/soc/stm/stm32_sai.c
@@ -174,20 +174,26 @@ static int stm32_sai_probe(struct platform_device *pdev)
@ -424,10 +1009,18 @@ index ef4273361..820ae27e7 100644
/* Enable peripheral clock to allow register access */
ret = clk_prepare_enable(sai->pclk);
diff --git a/sound/soc/stm/stm32_sai_sub.c b/sound/soc/stm/stm32_sai_sub.c
index 10eb4b8e8..be25715b4 100644
index 7e965848796c3..a7c39d1794a7b 100644
--- a/sound/soc/stm/stm32_sai_sub.c
+++ b/sound/soc/stm/stm32_sai_sub.c
@@ -1380,7 +1380,9 @@ static int stm32_sai_sub_parse_of(struct platform_device *pdev,
@@ -12,6 +12,7 @@
#include <linux/module.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <sound/asoundef.h>
@@ -1380,7 +1381,9 @@ static int stm32_sai_sub_parse_of(struct platform_device *pdev,
sai->regmap = devm_regmap_init_mmio(&pdev->dev, base,
sai->regmap_config);
if (IS_ERR(sai->regmap)) {
@ -438,7 +1031,7 @@ index 10eb4b8e8..be25715b4 100644
return PTR_ERR(sai->regmap);
}
@@ -1471,7 +1473,9 @@ static int stm32_sai_sub_parse_of(struct platform_device *pdev,
@@ -1471,7 +1474,9 @@ static int stm32_sai_sub_parse_of(struct platform_device *pdev,
of_node_put(args.np);
sai->sai_ck = devm_clk_get(&pdev->dev, "sai_ck");
if (IS_ERR(sai->sai_ck)) {
@ -449,13 +1042,8 @@ index 10eb4b8e8..be25715b4 100644
return PTR_ERR(sai->sai_ck);
}
@@ -1543,21 +1547,22 @@ static int stm32_sai_sub_probe(struct platform_device *pdev)
return ret;
}
@@ -1548,16 +1553,21 @@ static int stm32_sai_sub_probe(struct platform_device *pdev)
+ if (STM_SAI_PROTOCOL_IS_SPDIF(sai))
+ conf = &stm32_sai_pcm_config_spdif;
+
ret = snd_dmaengine_pcm_register(&pdev->dev, conf, 0);
if (ret) {
- dev_err(&pdev->dev, "Could not register pcm dma\n");
@ -466,20 +1054,29 @@ index 10eb4b8e8..be25715b4 100644
ret = snd_soc_register_component(&pdev->dev, &stm32_component,
&sai->cpu_dai_drv, 1);
if (ret)
- return ret;
+ snd_dmaengine_pcm_unregister(&pdev->dev);
- if (ret)
+ if (ret) {
snd_dmaengine_pcm_unregister(&pdev->dev);
+ return ret;
+ }
- if (STM_SAI_PROTOCOL_IS_SPDIF(sai))
- conf = &stm32_sai_pcm_config_spdif;
-
- return 0;
+ return ret;
- return ret;
+ pm_runtime_enable(&pdev->dev);
+
+ return 0;
}
static int stm32_sai_sub_remove(struct platform_device *pdev)
@@ -1567,6 +1577,7 @@ static int stm32_sai_sub_remove(struct platform_device *pdev)
clk_unprepare(sai->pdata->pclk);
snd_dmaengine_pcm_unregister(&pdev->dev);
snd_soc_unregister_component(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
return 0;
}
diff --git a/sound/soc/stm/stm32_spdifrx.c b/sound/soc/stm/stm32_spdifrx.c
index e53fb4bd6..1bfa3b2ba 100644
index 9fc2a1767eb1d..1bfa3b2ba9744 100644
--- a/sound/soc/stm/stm32_spdifrx.c
+++ b/sound/soc/stm/stm32_spdifrx.c
@@ -353,6 +353,8 @@ static int stm32_spdifrx_start_sync(struct stm32_spdifrx_data *spdifrx)
@ -581,7 +1178,7 @@ index e53fb4bd6..1bfa3b2ba 100644
return PTR_ERR(spdifrx->regmap);
}
@@ -964,37 +1000,46 @@ static int stm32_spdifrx_probe(struct platform_device *pdev)
@@ -964,31 +1000,38 @@ static int stm32_spdifrx_probe(struct platform_device *pdev)
return ret;
}
@ -637,15 +1234,7 @@ index e53fb4bd6..1bfa3b2ba 100644
ret = regmap_read(spdifrx->regmap, STM32_SPDIFRX_IDR, &idr);
if (ret)
goto error;
if (idr == SPDIFRX_IPIDR_NUMBER) {
ret = regmap_read(spdifrx->regmap, STM32_SPDIFRX_VERR, &ver);
+ if (ret)
+ goto error;
dev_dbg(&pdev->dev, "SPDIFRX version: %lu.%lu registered\n",
FIELD_GET(SPDIFRX_VERR_MAJ_MASK, ver),
@@ -1004,27 +1049,11 @@ static int stm32_spdifrx_probe(struct platform_device *pdev)
@@ -1006,27 +1049,11 @@ static int stm32_spdifrx_probe(struct platform_device *pdev)
return ret;
error:

1943
recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0019-ARM-stm32mp1-r2-MISC-CPUIDLE-MM.patch Normal file
View File

File diff suppressed because it is too large Load Diff

1732
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0020-ARM-stm32mp1-r1-DEVICETREE.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0020-ARM-stm32mp1-r2-DEVICETREE.patch
View File

File diff suppressed because it is too large Load Diff

42
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0021-ARM-stm32mp1-r1-CONFIG.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0021-ARM-stm32mp1-r2-CONFIG.patch
View File

@ -1,22 +1,22 @@
From c85af400114b9a862a0e9df538d00e1eb42d0028 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Fri, 10 Apr 2020 14:50:29 +0200
Subject: [PATCH 21/23] ARM-stm32mp1-r1-CONFIG
From 850ec78d02a21c585da6ede580eaff5fbe3db61b Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:55 +0200
Subject: [PATCH 21/22] ARM-stm32mp1-r2-rc8-CONFIG
---
.../fragment-01-multiv7_cleanup.config | 152 +++++++
.../configs/fragment-02-multiv7_addons.config | 420 ++++++++++++++++++
.../fragment-01-multiv7_cleanup.config | 148 ++++++
.../configs/fragment-02-multiv7_addons.config | 434 ++++++++++++++++++
arch/arm/configs/multi_v7_defconfig | 1 +
3 files changed, 573 insertions(+)
3 files changed, 583 insertions(+)
create mode 100644 arch/arm/configs/fragment-01-multiv7_cleanup.config
create mode 100644 arch/arm/configs/fragment-02-multiv7_addons.config
diff --git a/arch/arm/configs/fragment-01-multiv7_cleanup.config b/arch/arm/configs/fragment-01-multiv7_cleanup.config
new file mode 100644
index 000000000..76dd83cf0
index 0000000000000..3c43593d5665f
--- /dev/null
+++ b/arch/arm/configs/fragment-01-multiv7_cleanup.config
@@ -0,0 +1,152 @@
@@ -0,0 +1,148 @@
+#
+# CPU Core family selection
+#
@ -107,10 +107,6 @@ index 000000000..76dd83cf0
+# CONFIG_EFI is not set
+
+#
+# CPU Idle
+#
+# CONFIG_CPU_IDLE is not set
+#
+# CAN SPI interfaces
+#
+# CONFIG_CAN_MCP251X is not set
@ -171,10 +167,10 @@ index 000000000..76dd83cf0
+# CONFIG_SCHED_DEBUG is not set
diff --git a/arch/arm/configs/fragment-02-multiv7_addons.config b/arch/arm/configs/fragment-02-multiv7_addons.config
new file mode 100644
index 000000000..62c0de302
index 0000000000000..5fd995006583f
--- /dev/null
+++ b/arch/arm/configs/fragment-02-multiv7_addons.config
@@ -0,0 +1,420 @@
@@ -0,0 +1,434 @@
+#
+# General setup
+#
@ -567,6 +563,7 @@ index 000000000..62c0de302
+CONFIG_PWM_STM32_LP=y
+CONFIG_IIO_STM32_LPTIMER_TRIGGER=y
+CONFIG_STM32_LPTIMER_CNT=y
+CONFIG_CLKSRC_STM32_LP=y
+
+#
+# STM32 ADC
@ -595,8 +592,21 @@ index 000000000..62c0de302
+# TTY
+#
+CONFIG_LEGACY_PTY_COUNT=8
+
+#
+# FMC EBI
+#
+CONFIG_MEMORY=y
+CONFIG_STM32_FMC2_EBI=y
+
+#
+# STM32 CPUIDLE
+#
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_STM32_CPUIDLE=y
+CONFIG_ARM_CPUIDLE=n
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index e4c8def9a..4231ad37e 100644
index e4c8def9a0a57..4231ad37ea3bc 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -1038,6 +1038,7 @@ CONFIG_TI_PIPE3=y

16
recipes-kernel/linux/linux-stm32mp/5.4/5.4.31/0023-ARM-stm32mp1-r1-PERF.patch → recipes-kernel/linux/linux-stm32mp/5.4/5.4.56/0022-ARM-stm32mp1-r2-PERF.patch
View File

@ -1,7 +1,7 @@
From cc23b579a850b77f33f331fe854a4d52910ed0d1 Mon Sep 17 00:00:00 2001
From: Christophe Priouzeau <christophe.priouzeau@st.com>
Date: Tue, 9 Jun 2020 13:06:44 +0200
Subject: [PATCH 23/23] ARM-stm32mp1-r1-PERF
From 38993f1a9ca823da25a15d8c8b1bc839a0165c0a Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Mon, 5 Oct 2020 13:19:56 +0200
Subject: [PATCH 22/22] ARM-stm32mp1-r2-rc8-PERF
---
Documentation/perf/stm32-ddr-pmu.txt | 41 +++
@ -14,7 +14,7 @@ Subject: [PATCH 23/23] ARM-stm32mp1-r1-PERF
diff --git a/Documentation/perf/stm32-ddr-pmu.txt b/Documentation/perf/stm32-ddr-pmu.txt
new file mode 100644
index 000000000..d5b35b326
index 0000000000000..d5b35b3261bdb
--- /dev/null
+++ b/Documentation/perf/stm32-ddr-pmu.txt
@@ -0,0 +1,41 @@
@ -60,7 +60,7 @@ index 000000000..d5b35b326
+ $ cat /sys/bus/event_source/devices/ddrperfm/bandwidth
+ Read = 403, Write = 239, Read & Write = 642 (MB/s)
diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig
index 09ae8a970..2c5041314 100644
index 09ae8a970880f..2c50413145ab1 100644
--- a/drivers/perf/Kconfig
+++ b/drivers/perf/Kconfig
@@ -105,6 +105,12 @@ config QCOM_L3_PMU
@ -77,7 +77,7 @@ index 09ae8a970..2c5041314 100644
tristate "Cavium ThunderX2 SoC PMU UNCORE"
depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA
diff --git a/drivers/perf/Makefile b/drivers/perf/Makefile
index 2ebb4de17..fd3368c1b 100644
index 2ebb4de178151..fd3368c1b4549 100644
--- a/drivers/perf/Makefile
+++ b/drivers/perf/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_FSL_IMX8_DDR_PMU) += fsl_imx8_ddr_perf.o
@ -90,7 +90,7 @@ index 2ebb4de17..fd3368c1b 100644
obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o
diff --git a/drivers/perf/stm32_ddr_pmu.c b/drivers/perf/stm32_ddr_pmu.c
new file mode 100644
index 000000000..4f30f6f8b
index 0000000000000..4f30f6f8be964
--- /dev/null
+++ b/drivers/perf/stm32_ddr_pmu.c
@@ -0,0 +1,505 @@

51
recipes-kernel/linux/linux-stm32mp_5.4.bb
View File

@ -6,34 +6,33 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
include linux-stm32mp.inc
LINUX_VERSION = "5.4"
LINUX_SUBVERSION = "31"
LINUX_SUBVERSION = "56"
SRC_URI = "https://cdn.kernel.org/pub/linux/kernel/v5.x/linux-${LINUX_VERSION}.${LINUX_SUBVERSION}.tar.xz;name=kernel"
SRC_URI[kernel.sha256sum] = "a11083f8f809887f6a0f8d4467532385b99418f17998fe6e837807491c276eeb"
SRC_URI[kernel.sha256sum] = "318390b98480ec5663ed8403fca764b07924c5d2d6411de62c4241b4d9c57cad"
SRC_URI += " \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0001-ARM-stm32mp1-r1-MACHINE.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0002-ARM-stm32mp1-r1-CPUFREQ.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0003-ARM-stm32mp1-r1-CRYPTO.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0004-ARM-stm32mp1-r1-RNG-DEBUG-NVMEM.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0005-ARM-stm32mp1-r1-CLOCK.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0006-ARM-stm32mp1-r1-DMA.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0007-ARM-stm32mp1-r1-DRM.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0008-ARM-stm32mp1-r1-HWSPINLOCK.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0009-ARM-stm32mp1-r1-I2C-IIO-IRQCHIP.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0010-ARM-stm32mp1-r1-MAILBOX-REMOTEPROC-RPMSG.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0011-ARM-stm32mp1-r1-RESET-RTC-WATCHDOG.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0012-ARM-stm32mp1-r1-MEDIA-SOC-THERMAL.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0013-ARM-stm32mp1-r1-MFD.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0014-ARM-stm32mp1-r1-MMC-NAND.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0015-ARM-stm32mp1-r1-NET-TTY.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0016-ARM-stm32mp1-r1-PHY-USB.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0017-ARM-stm32mp1-r1-PINCTRL-REGULATOR-SPI-PWM.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0018-ARM-stm32mp1-r1-SOUND.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0019-ARM-stm32mp1-r1-MISC.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0020-ARM-stm32mp1-r1-DEVICETREE.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0021-ARM-stm32mp1-r1-CONFIG.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0022-ARM-stm32mp1-r1-POWER.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0023-ARM-stm32mp1-r1-PERF.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0001-ARM-stm32mp1-r2-MACHINE.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0002-ARM-stm32mp1-r2-CPUFREQ.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0003-ARM-stm32mp1-r2-CRYPTO.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0004-ARM-stm32mp1-r2-RNG-DEBUG-NVMEM.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0005-ARM-stm32mp1-r2-CLOCK.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0006-ARM-stm32mp1-r2-DMA.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0007-ARM-stm32mp1-r2-DRM.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0008-ARM-stm32mp1-r2-HWSPINLOCK.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0009-ARM-stm32mp1-r2-I2C-IIO-IRQCHIP.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0010-ARM-stm32mp1-r2-MAILBOX-REMOTEPROC-RPMSG.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0011-ARM-stm32mp1-r2-RESET-RTC-WATCHDOG.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0012-ARM-stm32mp1-r2-MEDIA-SOC-THERMAL.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0013-ARM-stm32mp1-r2-MFD.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0014-ARM-stm32mp1-r2-MMC-NAND.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0015-ARM-stm32mp1-r2-NET-TTY.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0016-ARM-stm32mp1-r2-PHY-USB.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0017-ARM-stm32mp1-r2-PINCTRL-REGULATOR-SPI-PWM.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0018-ARM-stm32mp1-r2-SOUND.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0019-ARM-stm32mp1-r2-MISC-CPUIDLE-MM.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0020-ARM-stm32mp1-r2-DEVICETREE.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0021-ARM-stm32mp1-r2-CONFIG.patch \
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0022-ARM-stm32mp1-r2-PERF.patch \
"
PV = "${LINUX_VERSION}.${LINUX_SUBVERSION}"
@ -46,7 +45,7 @@ S = "${WORKDIR}/linux-${LINUX_VERSION}.${LINUX_SUBVERSION}"
BBCLASSEXTEND = "devupstream:target"
SRC_URI_class-devupstream = "git://github.com/STMicroelectronics/linux.git;protocol=https;branch=v${LINUX_VERSION}-stm32mp"
SRCREV_class-devupstream = "b8663f5fdb5cfd6f243b72c9fac82c24b2594294"
SRCREV_class-devupstream = "a56628a8ab25734a771086664cc80c215a198438"
# ---------------------------------
# Configure default preference to manage dynamic selection between tarball and github