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KERNEL: bump to 4.19.94 

Change-Id: I479ccb35e1bda9109376a682c141b176af802b46
Signed-off-by: Priouzeau Christophe <christophe.priouzeau@st.com>
This commit is contained in:
Priouzeau Christophe 2020-02-03 15:03:57 +01:00 committed by Christophe Priouzeau
parent 5488a7bae3
commit 15ed5233ef
36 changed files with 7953 additions and 3998 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
recipes-kernel/linux/linux-stm32mp.inc
View File

@ -4,9 +4,9 @@ inherit kernel
DEPENDS += "openssl-native util-linux-native"
B = "${WORKDIR}/linux-${MACHINE}-standard-build"
B = "${WORKDIR}/build"
# Configure build dir for externalsrc class usage through devtool
EXTERNALSRC_BUILD_pn-${PN} = "${WORKDIR}/linux-${MACHINE}-standard-build"
EXTERNALSRC_BUILD_pn-${PN} = "${WORKDIR}/build"
# To share config fragments between layers
FILESEXTRAPATHS_prepend := "${THISDIR}:"

6
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0001-ARM-stm32mp1-r2-MACHINE.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0001-ARM-stm32mp1-r3-MACHINE.patch
View File

@ -1,7 +1,7 @@
From 747a93a65dc5e3761539c365a272186f0b7fca08 Mon Sep 17 00:00:00 2001
From 72d1b59c3ca272dd153ebd350ef9e403dac3db59 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:11:59 +0200
Subject: [PATCH 01/30] ARM stm32mp1 r2 MACHINE
Date: Fri, 8 Nov 2019 16:52:38 +0100
Subject: [PATCH 01/31] ARM stm32mp1 r3 MACHINE
---
arch/arm/mach-integrator/integrator_cp.c | 2 --

163
recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0002-ARM-stm32mp1-r3-CPUFREQ.patch Normal file
View File

@ -0,0 +1,163 @@
From 704a13efcc696fa4d151b741e0882f4c42eef870 Mon Sep 17 00:00:00 2001
From: Romuald JEANNE <romuald.jeanne@st.com>
Date: Thu, 30 Jan 2020 15:28:05 +0100
Subject: [PATCH 02/31] ARM stm32mp1 r3 CPUFREQ
---
drivers/cpufreq/Kconfig.arm | 7 +++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
drivers/cpufreq/stm32-cpufreq.c | 99 ++++++++++++++++++++++++++++++++++++
4 files changed, 108 insertions(+)
create mode 100644 drivers/cpufreq/stm32-cpufreq.c
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 0cd8eb7..b950d5a 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -255,6 +255,13 @@ config ARM_STI_CPUFREQ
this config option if you wish to add CPUFreq support for STi based
SoCs.
+config ARM_STM32_CPUFREQ
+ tristate "STM32 CPUFreq support"
+ depends on MACH_STM32MP157
+ default y
+ help
+ This adds the CPUFreq driver support for STM32 MPU SOCs.
+
config ARM_TANGO_CPUFREQ
bool
depends on CPUFREQ_DT && ARCH_TANGO
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index c1ffeab..c15b4f7 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -79,6 +79,7 @@ obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o
obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o
obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o
obj-$(CONFIG_ARM_STI_CPUFREQ) += sti-cpufreq.o
+obj-$(CONFIG_ARM_STM32_CPUFREQ) += stm32-cpufreq.o
obj-$(CONFIG_ARM_TANGO_CPUFREQ) += tango-cpufreq.o
obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o
obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index fe14c57..d61a02a 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -121,6 +121,7 @@ static const struct of_device_id blacklist[] __initconst = {
{ .compatible = "st,stih407", },
{ .compatible = "st,stih410", },
+ { .compatible = "st,stm32mp157", },
{ .compatible = "sigma,tango4", },
diff --git a/drivers/cpufreq/stm32-cpufreq.c b/drivers/cpufreq/stm32-cpufreq.c
new file mode 100644
index 0000000..f4a41e0
--- /dev/null
+++ b/drivers/cpufreq/stm32-cpufreq.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
+ * Authors: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
+ */
+
+#include <linux/cpu.h>
+#include <linux/cpufreq.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/nvmem-consumer.h>
+#include <linux/of_platform.h>
+#include <linux/pm_opp.h>
+
+struct stm32_cpufreq_priv {
+ struct opp_table *opps;
+ struct platform_device *cpufreq_dt_pdev;
+};
+
+static int stm32_cpufreq_probe(struct platform_device *pdev)
+{
+ struct stm32_cpufreq_priv *priv;
+ struct device_node *opp_node;
+ struct device *cpu_dev;
+ u8 part_number;
+ u32 supported_hw;
+ int ret;
+
+ cpu_dev = get_cpu_device(0);
+ if (!cpu_dev) {
+ dev_err(&pdev->dev, "failed to get cpu0 device\n");
+ return -ENODEV;
+ }
+ opp_node = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
+ if (!opp_node) {
+ dev_err(&pdev->dev, "OPP-v2 not supported\n");
+ return -ENODEV;
+ }
+
+ /* Get chip info */
+ ret = nvmem_cell_read_u8(cpu_dev, "part_number", &part_number);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to get chip info: %d\n", ret);
+ return ret;
+ }
+
+ supported_hw = BIT((part_number & 0x80) >> 7);
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->opps = dev_pm_opp_set_supported_hw(cpu_dev, &supported_hw, 1);
+ if (IS_ERR(priv->opps)) {
+ ret = PTR_ERR(priv->opps);
+ dev_err(&pdev->dev, "Failed to set supported opp: %d\n", ret);
+ return ret;
+ }
+
+ of_node_put(opp_node);
+ priv->cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt",
+ -1, NULL, 0);
+
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+}
+
+static int stm32_cpufreq_remove(struct platform_device *pdev)
+{
+ struct stm32_cpufreq_priv *priv = platform_get_drvdata(pdev);
+
+ platform_device_unregister(priv->cpufreq_dt_pdev);
+ dev_pm_opp_put_supported_hw(priv->opps);
+
+ return 0;
+}
+
+static int stm32_cpufreq_init(void)
+{
+ platform_device_register_simple("stm32-cpufreq", -1, NULL, 0);
+
+ return 0;
+}
+module_init(stm32_cpufreq_init);
+
+static struct platform_driver stm32_cpufreq_platdrv = {
+ .driver = {
+ .name = "stm32-cpufreq",
+ },
+ .probe = stm32_cpufreq_probe,
+ .remove = stm32_cpufreq_remove,
+};
+module_platform_driver(stm32_cpufreq_platdrv);
+
+MODULE_DESCRIPTION("STM32 CPU freq driver");
+MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
+MODULE_LICENSE("GPL v2");
--
2.7.4

23
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0002-ARM-stm32mp1-r2-CRYPTO.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0003-ARM-stm32mp1-r3-CRYPTO.patch
View File

@ -1,7 +1,7 @@
From 6a4b2788be21d13d65a726973003dc48405da004 Mon Sep 17 00:00:00 2001
From ba1e344b74257a65d21b7b82f99df31dcf3f5a7c Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:11:59 +0200
Subject: [PATCH 02/30] ARM stm32mp1 r2 CRYPTO
Date: Fri, 8 Nov 2019 16:52:38 +0100
Subject: [PATCH 03/31] ARM stm32mp1 r3 CRYPTO
---
crypto/testmgr.c | 7 +
@ -9,14 +9,14 @@ Subject: [PATCH 02/30] ARM stm32mp1 r2 CRYPTO
drivers/crypto/stm32/Makefile | 2 +-
drivers/crypto/stm32/stm32-crc32.c | 441 +++++++++++++++++++++++++++++++++++++
drivers/crypto/stm32/stm32-cryp.c | 72 ++++--
drivers/crypto/stm32/stm32-hash.c | 8 +-
drivers/crypto/stm32/stm32-hash.c | 6 +-
drivers/crypto/stm32/stm32_crc32.c | 387 --------------------------------
7 files changed, 503 insertions(+), 415 deletions(-)
7 files changed, 502 insertions(+), 414 deletions(-)
create mode 100644 drivers/crypto/stm32/stm32-crc32.c
delete mode 100644 drivers/crypto/stm32/stm32_crc32.c
diff --git a/crypto/testmgr.c b/crypto/testmgr.c
index 3664c26..7d0d6b4 100644
index 13cb2ea..35a4ac5 100644
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -1918,6 +1918,13 @@ static int alg_test_crc32c(const struct alg_test_desc *desc,
@ -679,18 +679,9 @@ index 23b0b7b..cd8c439 100644
cryp->regs = devm_ioremap_resource(dev, res);
if (IS_ERR(cryp->regs))
diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c
index 590d735..990bbbf 100644
index 641b110..990bbbf 100644
--- a/drivers/crypto/stm32/stm32-hash.c
+++ b/drivers/crypto/stm32/stm32-hash.c
@@ -365,7 +365,7 @@ static int stm32_hash_xmit_cpu(struct stm32_hash_dev *hdev,
return -ETIMEDOUT;
if ((hdev->flags & HASH_FLAGS_HMAC) &&
- (hdev->flags & ~HASH_FLAGS_HMAC_KEY)) {
+ (!(hdev->flags & HASH_FLAGS_HMAC_KEY))) {
hdev->flags |= HASH_FLAGS_HMAC_KEY;
stm32_hash_write_key(hdev);
if (stm32_hash_wait_busy(hdev))
@@ -463,8 +463,8 @@ static int stm32_hash_xmit_dma(struct stm32_hash_dev *hdev,
dma_async_issue_pending(hdev->dma_lch);

38
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0003-ARM-stm32mp1-r2-BLUETOOTH-CHAR.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0004-ARM-stm32mp1-r3-BLUETOOTH-CHAR.patch
View File

@ -1,18 +1,18 @@
From 613535e3904f7615aff655384c65cd897312e3b0 Mon Sep 17 00:00:00 2001
From bcd539392e9bc23b9b47250eacf84907dd993089 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:11:59 +0200
Subject: [PATCH 03/30] ARM stm32mp1 r2 BLUETOOTH CHAR
Date: Fri, 8 Nov 2019 16:52:39 +0100
Subject: [PATCH 04/31] ARM stm32mp1 r3 BLUETOOTH CHAR
---
drivers/bluetooth/hci_bcm.c | 3 ++-
drivers/char/hw_random/stm32-rng.c | 9 +++++++++
2 files changed, 11 insertions(+), 1 deletion(-)
drivers/char/hw_random/stm32-rng.c | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c
index 8001323..31da580 100644
index 59e5fc5..c553235 100644
--- a/drivers/bluetooth/hci_bcm.c
+++ b/drivers/bluetooth/hci_bcm.c
@@ -1299,7 +1299,8 @@ static int bcm_serdev_probe(struct serdev_device *serdev)
@@ -1324,7 +1324,8 @@ static int bcm_serdev_probe(struct serdev_device *serdev)
if (!bcmdev->shutdown) {
dev_warn(&serdev->dev,
"No reset resource, using default baud rate\n");
@ -23,7 +23,7 @@ index 8001323..31da580 100644
err = bcm_gpio_set_power(bcmdev, false);
diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c
index 042860d..0ef5b6a 100644
index 37b338a..0ef5b6a 100644
--- a/drivers/char/hw_random/stm32-rng.c
+++ b/drivers/char/hw_random/stm32-rng.c
@@ -161,6 +161,7 @@ static int stm32_rng_probe(struct platform_device *ofdev)
@ -34,28 +34,6 @@ index 042860d..0ef5b6a 100644
pm_runtime_set_autosuspend_delay(dev, 100);
pm_runtime_use_autosuspend(dev);
@@ -169,6 +170,13 @@ static int stm32_rng_probe(struct platform_device *ofdev)
return devm_hwrng_register(dev, &priv->rng);
}
+static int stm32_rng_remove(struct platform_device *ofdev)
+{
+ pm_runtime_disable(&ofdev->dev);
+
+ return 0;
+}
+
#ifdef CONFIG_PM
static int stm32_rng_runtime_suspend(struct device *dev)
{
@@ -210,6 +218,7 @@ static struct platform_driver stm32_rng_driver = {
.of_match_table = stm32_rng_match,
},
.probe = stm32_rng_probe,
+ .remove = stm32_rng_remove,
};
module_platform_driver(stm32_rng_driver);
--
2.7.4

380
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0004-ARM-stm32mp1-r2-CLOCK.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0005-ARM-stm32mp1-r3-CLOCK.patch
View File

@ -1,17 +1,17 @@
From 787309b96cc3eb1ed824dff1a9814d88a437bebb Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:11:59 +0200
Subject: [PATCH 04/30] ARM stm32mp1 r2 CLOCK
From 035fdb208f6ba7b3c84fddbb476ab7be33866cb4 Mon Sep 17 00:00:00 2001
From: Romuald JEANNE <romuald.jeanne@st.com>
Date: Mon, 20 Jan 2020 18:07:02 +0100
Subject: [PATCH 05/31] ARM stm32mp1 r3 CLOCK
---
drivers/clk/clk-stm32mp1.c | 1061 ++++++++++++++++++++++++++---
drivers/clk/clk.c | 24 +-
drivers/clk/clk-stm32mp1.c | 1124 +++++++++++++++++++++++++++--
drivers/clk/clk.c | 6 +
include/dt-bindings/clock/stm32mp1-clks.h | 3 -
include/linux/clk.h | 1 +
4 files changed, 1004 insertions(+), 85 deletions(-)
include/linux/clk-provider.h | 1 +
4 files changed, 1061 insertions(+), 73 deletions(-)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index a907555..fba9626 100644
index bf3b6a4..95ed875 100644
--- a/drivers/clk/clk-stm32mp1.c
+++ b/drivers/clk/clk-stm32mp1.c
@@ -5,15 +5,22 @@
@ -56,48 +56,6 @@ index a907555..fba9626 100644
#define RCC_CLR 0x4
@@ -121,7 +133,7 @@ static const char * const cpu_src[] = {
};
static const char * const axi_src[] = {
- "ck_hsi", "ck_hse", "pll2_p", "pll3_p"
+ "ck_hsi", "ck_hse", "pll2_p"
};
static const char * const per_src[] = {
@@ -225,19 +237,19 @@ static const char * const usart6_src[] = {
};
static const char * const fdcan_src[] = {
- "ck_hse", "pll3_q", "pll4_q"
+ "ck_hse", "pll3_q", "pll4_q", "pll4_r"
};
static const char * const sai_src[] = {
- "pll4_q", "pll3_q", "i2s_ckin", "ck_per"
+ "pll4_q", "pll3_q", "i2s_ckin", "ck_per", "pll3_r"
};
static const char * const sai2_src[] = {
- "pll4_q", "pll3_q", "i2s_ckin", "ck_per", "spdif_ck_symb"
+ "pll4_q", "pll3_q", "i2s_ckin", "ck_per", "spdif_ck_symb", "pll3_r"
};
static const char * const adc12_src[] = {
- "pll4_q", "ck_per"
+ "pll4_r", "ck_per", "pll3_q"
};
static const char * const dsi_src[] = {
@@ -269,7 +281,7 @@ static const struct clk_div_table axi_div_table[] = {
static const struct clk_div_table mcu_div_table[] = {
{ 0, 1 }, { 1, 2 }, { 2, 4 }, { 3, 8 },
{ 4, 16 }, { 5, 32 }, { 6, 64 }, { 7, 128 },
- { 8, 512 }, { 9, 512 }, { 10, 512}, { 11, 512 },
+ { 8, 256 }, { 9, 512 }, { 10, 512}, { 11, 512 },
{ 12, 512 }, { 13, 512 }, { 14, 512}, { 15, 512 },
{ 0 },
};
@@ -356,17 +368,20 @@ struct stm32_gate_cfg {
struct gate_cfg *gate;
struct stm32_mgate *mgate;
@ -171,7 +129,60 @@ index a907555..fba9626 100644
}
}
@@ -1193,7 +1225,8 @@ _clk_stm32_register_composite(struct device *dev,
@@ -714,7 +746,7 @@ static int clk_mmux_set_parent(struct clk_hw *hw, u8 index)
for (n = 0; n < clk_mmux->mmux->nbr_clk; n++)
if (clk_mmux->mmux->hws[n] != hw)
- clk_hw_reparent(clk_mmux->mmux->hws[n], hwp);
+ clk_hw_set_parent(clk_mmux->mmux->hws[n], hwp);
return 0;
}
@@ -867,6 +899,7 @@ static struct clk_hw *clk_register_pll(struct device *dev, const char *name,
const char *parent_name,
void __iomem *reg,
unsigned long flags,
+ const struct clk_ops *ops,
spinlock_t *lock)
{
struct stm32_pll_obj *element;
@@ -879,7 +912,7 @@ static struct clk_hw *clk_register_pll(struct device *dev, const char *name,
return ERR_PTR(-ENOMEM);
init.name = name;
- init.ops = &pll_ops;
+ init.ops = ops;
init.flags = flags;
init.parent_names = &parent_name;
init.num_parents = 1;
@@ -1033,6 +1066,8 @@ static struct clk_hw *clk_register_cktim(struct device *dev, const char *name,
struct stm32_pll_cfg {
u32 offset;
+ const struct clk_ops *ops;
+ const struct clk_ops *ops_sec;
};
static struct clk_hw *_clk_register_pll(struct device *dev,
@@ -1043,7 +1078,8 @@ static struct clk_hw *_clk_register_pll(struct device *dev,
struct stm32_pll_cfg *stm_pll_cfg = cfg->cfg;
return clk_register_pll(dev, cfg->name, cfg->parent_name,
- base + stm_pll_cfg->offset, cfg->flags, lock);
+ base + stm_pll_cfg->offset, cfg->flags,
+ stm_pll_cfg->ops, lock);
}
struct stm32_cktim_cfg {
@@ -1161,6 +1197,7 @@ _clk_stm32_register_composite(struct device *dev,
.flags = _flags,\
.cfg = &(struct stm32_pll_cfg) {\
.offset = _offset,\
+ .ops = &pll_ops\
},\
.func = _clk_register_pll,\
}
@@ -1193,7 +1230,8 @@ _clk_stm32_register_composite(struct device *dev,
.func = _clk_stm32_register_gate,\
}
@ -181,7 +192,7 @@ index a907555..fba9626 100644
(&(struct stm32_gate_cfg) {\
&(struct gate_cfg) {\
.reg_off = _gate_offset,\
@@ -1202,6 +1235,7 @@ _clk_stm32_register_composite(struct device *dev,
@@ -1202,6 +1240,7 @@ _clk_stm32_register_composite(struct device *dev,
},\
.mgate = _mgate,\
.ops = _ops,\
@ -189,7 +200,7 @@ index a907555..fba9626 100644
})
#define _STM32_MGATE(_mgate)\
@@ -1209,11 +1243,11 @@ _clk_stm32_register_composite(struct device *dev,
@@ -1209,11 +1248,11 @@ _clk_stm32_register_composite(struct device *dev,
#define _GATE(_gate_offset, _gate_bit_idx, _gate_flags)\
_STM32_GATE(_gate_offset, _gate_bit_idx, _gate_flags,\
@ -203,7 +214,7 @@ index a907555..fba9626 100644
#define _MGATE_MP1(_mgate)\
.gate = &per_gate_cfg[_mgate]
@@ -1227,7 +1261,7 @@ _clk_stm32_register_composite(struct device *dev,
@@ -1227,7 +1266,7 @@ _clk_stm32_register_composite(struct device *dev,
_STM32_MGATE(_mgate))
#define _STM32_DIV(_div_offset, _div_shift, _div_width,\
@ -212,7 +223,7 @@ index a907555..fba9626 100644
.div = &(struct stm32_div_cfg) {\
&(struct div_cfg) {\
.reg_off = _div_offset,\
@@ -1237,13 +1271,14 @@ _clk_stm32_register_composite(struct device *dev,
@@ -1237,13 +1276,14 @@ _clk_stm32_register_composite(struct device *dev,
.table = _div_table,\
},\
.ops = _ops,\
@ -229,7 +240,7 @@ index a907555..fba9626 100644
.mux = &(struct stm32_mux_cfg) {\
&(struct mux_cfg) {\
.reg_off = _offset,\
@@ -1254,10 +1289,11 @@ _clk_stm32_register_composite(struct device *dev,
@@ -1254,10 +1294,11 @@ _clk_stm32_register_composite(struct device *dev,
},\
.mmux = _mmux,\
.ops = _ops,\
@ -242,19 +253,10 @@ index a907555..fba9626 100644
#define _MMUX(_mmux) .mux = &ker_mux_cfg[_mmux]
@@ -1286,10 +1322,513 @@ _clk_stm32_register_composite(struct device *dev,
MGATE_MP1(_id, _name, _parent, _flags, _mgate)
@@ -1292,6 +1333,581 @@ _clk_stm32_register_composite(struct device *dev,
_MMUX(_mmux),\
_NO_DIV)
#define KCLK(_id, _name, _parents, _flags, _mgate, _mmux)\
- COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE | _flags,\
- _MGATE_MP1(_mgate),\
- _MMUX(_mmux),\
- _NO_DIV)
+ COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE |\
+ CLK_SET_RATE_NO_REPARENT | _flags,\
+ _MGATE_MP1(_mgate),\
+ _MMUX(_mmux),\
+ _NO_DIV)
+/*
+ *
+ * Security management
@ -266,6 +268,10 @@ index a907555..fba9626 100644
+#define STM32_SET_BITS 0x2
+#define STM32_CLR_BITS 0x3
+
+#define STM32_SMC_RCC_OPP 0x82001009
+#define STM32_SMC_RCC_OPP_SET 0
+#define STM32_SMC_RCC_OPP_ROUND 1
+
+#define SMC(class, op, address, val)\
+ ({\
+ struct arm_smccc_res res;\
@ -519,6 +525,10 @@ index a907555..fba9626 100644
+ .set_rate = clk_sdivider_set_rate,
+};
+
+static const struct clk_ops clk_sdivider_pll1_p_ops = {
+ .recalc_rate = clk_sdivider_recalc_rate,
+};
+
+static struct clk_hw *
+clk_hw_register_sdivider_table(struct device *dev, const char *name,
+ const char *parent_name,
@ -600,6 +610,65 @@ index a907555..fba9626 100644
+ lock);
+}
+
+static long clk_pll1_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(STM32_SMC_RCC_OPP, STM32_SMC_RCC_OPP_ROUND, rate, 0, 0, 0,
+ 0, 0, &res);
+
+ return res.a1;
+}
+
+static int pll1_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ SMC(STM32_SMC_RCC_OPP, STM32_SMC_RCC_OPP_SET, rate, 0);
+
+ return 0;
+}
+
+static const struct clk_ops pll1_ops = {
+ .enable = pll_enable,
+ .disable = pll_disable,
+ .recalc_rate = pll_recalc_rate,
+ .round_rate = clk_pll1_round_rate,
+ .set_rate = pll1_set_rate,
+ .is_enabled = pll_is_enabled,
+};
+
+static struct clk_hw *_clk_sregister_pll(struct device *dev,
+ struct clk_hw_onecell_data *clk_data,
+ void __iomem *base, spinlock_t *lock,
+ const struct clock_config *cfg)
+{
+ struct stm32_pll_cfg *stm_pll_cfg = cfg->cfg;
+
+ if (!_is_soc_secured(base))
+ return clk_register_pll(dev, cfg->name, cfg->parent_name,
+ base + stm_pll_cfg->offset, cfg->flags,
+ stm_pll_cfg->ops, lock);
+ else
+ return clk_register_pll(dev, cfg->name, cfg->parent_name,
+ base + stm_pll_cfg->offset, cfg->flags,
+ stm_pll_cfg->ops_sec, lock);
+}
+
+#define PLL_1(_id, _name, _parent, _flags, _offset)\
+{\
+ .id = _id,\
+ .name = _name,\
+ .parent_name = _parent,\
+ .flags = _flags,\
+ .cfg = &(struct stm32_pll_cfg) {\
+ .offset = _offset,\
+ .ops = &pll_ops,\
+ .ops_sec = &pll1_ops,\
+ },\
+ .func = _clk_sregister_pll,\
+}
+
+static int mp1_sgate_clk_enable(struct clk_hw *hw)
+{
+ struct clk_gate *gate = to_clk_gate(hw);
@ -757,10 +826,16 @@ index a907555..fba9626 100644
+#define _S_MUX(_offset, _shift, _width, _mux_flags)\
+ _STM32_MUX(_offset, _shift, _width, _mux_flags,\
+ NULL, NULL, &clk_smux_ops)
+
+#define _S_PLL1_P_DIV(_div_offset, _div_shift, _div_width, _div_flags,\
+ _div_table)\
+ _STM32_DIV(_div_offset, _div_shift, _div_width,\
+ _div_flags, _div_table, NULL, &clk_sdivider_pll1_p_ops)
+
enum {
G_SAI1,
@@ -1401,6 +1940,7 @@ enum {
G_SAI2,
@@ -1402,6 +2018,7 @@ enum {
G_CRYP1,
G_HASH1,
G_BKPSRAM,
@ -768,7 +843,7 @@ index a907555..fba9626 100644
G_LAST
};
@@ -1408,7 +1948,7 @@ enum {
@@ -1409,7 +2026,7 @@ enum {
static struct stm32_mgate mp1_mgate[G_LAST];
#define _K_GATE(_id, _gate_offset, _gate_bit_idx, _gate_flags,\
@ -777,7 +852,7 @@ index a907555..fba9626 100644
[_id] = {\
&(struct gate_cfg) {\
.reg_off = _gate_offset,\
@@ -1417,15 +1957,24 @@ static struct stm32_mgate mp1_mgate[G_LAST];
@@ -1418,15 +2035,24 @@ static struct stm32_mgate mp1_mgate[G_LAST];
},\
.mgate = _mgate,\
.ops = _ops,\
@ -804,7 +879,7 @@ index a907555..fba9626 100644
/* Peripheral gates */
static struct stm32_gate_cfg per_gate_cfg[G_LAST] = {
@@ -1487,20 +2036,21 @@ static struct stm32_gate_cfg per_gate_cfg[G_LAST] = {
@@ -1488,20 +2114,21 @@ static struct stm32_gate_cfg per_gate_cfg[G_LAST] = {
K_GATE(G_STGENRO, RCC_APB4ENSETR, 20, 0),
K_MGATE(G_USBPHY, RCC_APB4ENSETR, 16, 0),
K_GATE(G_IWDG2, RCC_APB4ENSETR, 15, 0),
@ -837,7 +912,7 @@ index a907555..fba9626 100644
K_MGATE(G_SDMMC3, RCC_AHB2ENSETR, 16, 0),
K_MGATE(G_USBO, RCC_AHB2ENSETR, 8, 0),
@@ -1529,11 +2079,11 @@ static struct stm32_gate_cfg per_gate_cfg[G_LAST] = {
@@ -1530,11 +2157,11 @@ static struct stm32_gate_cfg per_gate_cfg[G_LAST] = {
K_GATE(G_GPIOB, RCC_AHB4ENSETR, 1, 0),
K_GATE(G_GPIOA, RCC_AHB4ENSETR, 0, 0),
@ -854,7 +929,7 @@ index a907555..fba9626 100644
K_GATE(G_USBH, RCC_AHB6ENSETR, 24, 0),
K_GATE(G_CRC1, RCC_AHB6ENSETR, 20, 0),
@@ -1541,12 +2091,15 @@ static struct stm32_gate_cfg per_gate_cfg[G_LAST] = {
@@ -1542,12 +2169,15 @@ static struct stm32_gate_cfg per_gate_cfg[G_LAST] = {
K_MGATE(G_SDMMC1, RCC_AHB6ENSETR, 16, 0),
K_MGATE(G_QSPI, RCC_AHB6ENSETR, 14, 0),
K_MGATE(G_FMC, RCC_AHB6ENSETR, 12, 0),
@ -870,7 +945,7 @@ index a907555..fba9626 100644
K_GATE(G_ETHSTP, RCC_AHB6LPENSETR, 11, 0),
};
@@ -1591,7 +2144,7 @@ enum {
@@ -1592,7 +2222,7 @@ enum {
static struct stm32_mmux ker_mux[M_LAST];
@ -879,7 +954,7 @@ index a907555..fba9626 100644
[_id] = {\
&(struct mux_cfg) {\
.reg_off = _offset,\
@@ -1602,15 +2155,24 @@ static struct stm32_mmux ker_mux[M_LAST];
@@ -1603,15 +2233,24 @@ static struct stm32_mmux ker_mux[M_LAST];
},\
.mmux = _mmux,\
.ops = _ops,\
@ -906,7 +981,7 @@ index a907555..fba9626 100644
static const struct stm32_mux_cfg ker_mux_cfg[M_LAST] = {
/* Kernel multi mux */
@@ -1626,7 +2188,7 @@ static const struct stm32_mux_cfg ker_mux_cfg[M_LAST] = {
@@ -1627,7 +2266,7 @@ static const struct stm32_mux_cfg ker_mux_cfg[M_LAST] = {
K_MMUX(M_UART78, RCC_UART78CKSELR, 0, 3, 0),
K_MMUX(M_SAI1, RCC_SAI1CKSELR, 0, 3, 0),
K_MMUX(M_ETHCK, RCC_ETHCKSELR, 0, 2, 0),
@ -915,7 +990,7 @@ index a907555..fba9626 100644
/* Kernel simple mux */
K_MUX(M_RNG2, RCC_RNG2CKSELR, 0, 2, 0),
@@ -1647,23 +2209,24 @@ static const struct stm32_mux_cfg ker_mux_cfg[M_LAST] = {
@@ -1648,10 +2287,10 @@ static const struct stm32_mux_cfg ker_mux_cfg[M_LAST] = {
K_MUX(M_ADC12, RCC_ADCCKSELR, 0, 2, 0),
K_MUX(M_DSI, RCC_DSICKSELR, 0, 1, 0),
K_MUX(M_CKPER, RCC_CPERCKSELR, 0, 2, 0),
@ -930,11 +1005,8 @@ index a907555..fba9626 100644
};
static const struct clock_config stm32mp1_clock_cfg[] = {
/* Oscillator divider */
- DIV(NO_ID, "clk-hsi-div", "clk-hsi", 0, RCC_HSICFGR, 0, 2,
- CLK_DIVIDER_READ_ONLY),
+ DIV(NO_ID, "clk-hsi-div", "clk-hsi", CLK_DIVIDER_POWER_OF_TWO,
+ RCC_HSICFGR, 0, 2, CLK_DIVIDER_READ_ONLY),
@@ -1660,11 +2299,12 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
RCC_HSICFGR, 0, 2, CLK_DIVIDER_READ_ONLY),
/* External / Internal Oscillators */
- GATE_MP1(CK_HSE, "ck_hse", "clk-hse", 0, RCC_OCENSETR, 8, 0),
@ -951,15 +1023,24 @@ index a907555..fba9626 100644
FIXED_FACTOR(CK_HSE_DIV2, "clk-hse-div2", "ck_hse", 0, 1, 2),
@@ -1685,24 +2248,24 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
@@ -1679,31 +2319,31 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
0, 2, CLK_MUX_READ_ONLY),
/* PLLs */
- PLL(PLL1, "pll1", "ref1", CLK_IGNORE_UNUSED, RCC_PLL1CR),
+ PLL_1(PLL1, "pll1", "ref1", CLK_IGNORE_UNUSED, RCC_PLL1CR),
PLL(PLL2, "pll2", "ref1", CLK_IGNORE_UNUSED, RCC_PLL2CR),
PLL(PLL3, "pll3", "ref3", CLK_IGNORE_UNUSED, RCC_PLL3CR),
PLL(PLL4, "pll4", "ref4", CLK_IGNORE_UNUSED, RCC_PLL4CR),
/* ODF */
COMPOSITE(PLL1_P, "pll1_p", PARENT("pll1"), 0,
- COMPOSITE(PLL1_P, "pll1_p", PARENT("pll1"), 0,
- _GATE(RCC_PLL1CR, 4, 0),
+ COMPOSITE(PLL1_P, "pll1_p", PARENT("pll1"), CLK_SET_RATE_PARENT,
+ _S_GATE(RCC_PLL1CR, 4, 0),
_NO_MUX,
- _DIV(RCC_PLL1CFGR2, 0, 7, 0, NULL)),
+ _S_DIV(RCC_PLL1CFGR2, 0, 7, 0, NULL)),
+ _S_PLL1_P_DIV(RCC_PLL1CFGR2, 0, 7, 0, NULL)),
COMPOSITE(PLL2_P, "pll2_p", PARENT("pll2"), 0,
- _GATE(RCC_PLL2CR, 4, 0),
@ -984,13 +1065,15 @@ index a907555..fba9626 100644
COMPOSITE(PLL3_P, "pll3_p", PARENT("pll3"), 0,
_GATE(RCC_PLL3CR, 4, 0),
@@ -1738,20 +2301,20 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
@@ -1739,20 +2379,21 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
MUX(CK_PER, "ck_per", per_src, CLK_OPS_PARENT_ENABLE,
RCC_CPERCKSELR, 0, 2, 0),
- MUX(CK_MPU, "ck_mpu", cpu_src, CLK_OPS_PARENT_ENABLE |
- CLK_IS_CRITICAL, RCC_MPCKSELR, 0, 2, 0),
+ SMUX(CK_MPU, "ck_mpu", cpu_src, CLK_OPS_PARENT_ENABLE |
CLK_IS_CRITICAL, RCC_MPCKSELR, 0, 2, 0),
+ CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
+ RCC_MPCKSELR, 0, 2, 0),
COMPOSITE(CK_AXI, "ck_axi", axi_src, CLK_IS_CRITICAL |
CLK_OPS_PARENT_ENABLE,
@ -1010,7 +1093,7 @@ index a907555..fba9626 100644
DIV_TABLE(NO_ID, "pclk1", "ck_mcu", CLK_IGNORE_UNUSED, RCC_APB1DIVR, 0,
3, CLK_DIVIDER_READ_ONLY, apb_div_table),
@@ -1896,6 +2459,7 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
@@ -1897,6 +2538,7 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
PCLK(CRC1, "crc1", "ck_axi", 0, G_CRC1),
PCLK(USBH, "usbh", "ck_axi", 0, G_USBH),
PCLK(ETHSTP, "ethstp", "ck_axi", 0, G_ETHSTP),
@ -1018,7 +1101,7 @@ index a907555..fba9626 100644
/* Kernel clocks */
KCLK(SDMMC1_K, "sdmmc1_k", sdmmc12_src, 0, G_SDMMC1, M_SDMMC12),
@@ -1906,7 +2470,7 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
@@ -1907,7 +2549,7 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
KCLK(RNG1_K, "rng1_k", rng_src, 0, G_RNG1, M_RNG1),
KCLK(RNG2_K, "rng2_k", rng_src, 0, G_RNG2, M_RNG2),
KCLK(USBPHY_K, "usbphy_k", usbphy_src, 0, G_USBPHY, M_USBPHY),
@ -1027,13 +1110,8 @@ index a907555..fba9626 100644
KCLK(SPDIF_K, "spdif_k", spdif_src, 0, G_SPDIF, M_SPDIF),
KCLK(SPI1_K, "spi1_k", spi123_src, 0, G_SPI1, M_SPI1),
KCLK(SPI2_K, "spi2_k", spi123_src, 0, G_SPI2, M_SPI23),
@@ -1952,19 +2516,19 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
MGATE_MP1(GPU_K, "gpu_k", "pll2_q", 0, G_GPU),
MGATE_MP1(DAC12_K, "dac12_k", "ck_lsi", 0, G_DAC12),
- COMPOSITE(ETHPTP_K, "ethptp_k", eth_src, CLK_OPS_PARENT_ENABLE,
+ COMPOSITE(ETHPTP_K, "ethptp_k", eth_src, CLK_OPS_PARENT_ENABLE |
+ CLK_SET_RATE_NO_REPARENT,
@@ -1957,16 +2599,15 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
CLK_SET_RATE_NO_REPARENT,
_NO_GATE,
_MMUX(M_ETHCK),
- _DIV(RCC_ETHCKSELR, 4, 4, CLK_DIVIDER_ALLOW_ZERO, NULL)),
@ -1053,7 +1131,7 @@ index a907555..fba9626 100644
_NO_DIV),
/* MCO clocks */
@@ -2082,21 +2646,364 @@ static int stm32_rcc_init(struct device_node *np,
@@ -2084,21 +2725,364 @@ static int stm32_rcc_init(struct device_node *np,
return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
}
@ -1425,84 +1503,22 @@ index a907555..fba9626 100644
+ return 0;
+}
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 5413ffa..25a4af5 100644
index 5413ffa..4290d9e 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -2204,7 +2204,8 @@ bool clk_has_parent(struct clk *clk, struct clk *parent)
EXPORT_SYMBOL_GPL(clk_has_parent);
static int clk_core_set_parent_nolock(struct clk_core *core,
- struct clk_core *parent)
+ struct clk_core *parent,
+ bool force)
{
int ret = 0;
int p_index = 0;
@@ -2215,7 +2216,7 @@ static int clk_core_set_parent_nolock(struct clk_core *core,
if (!core)
return 0;
- if (core->parent == parent)
+ if (core->parent == parent && !force)
return 0;
/* verify ops for for multi-parent clks */
@@ -2272,6 +2273,7 @@ static int clk_core_set_parent_nolock(struct clk_core *core,
* clk_set_parent - switch the parent of a mux clk
* @clk: the mux clk whose input we are switching
* @parent: the new input to clk
+ * @force: don't test if parent is already set
*
* Re-parent clk to use parent as its new input source. If clk is in
* prepared state, the clk will get enabled for the duration of this call. If
@@ -2285,7 +2287,7 @@ static int clk_core_set_parent_nolock(struct clk_core *core,
*
* Returns 0 on success, -EERROR otherwise.
*/
-int clk_set_parent(struct clk *clk, struct clk *parent)
+int _clk_set_parent(struct clk *clk, struct clk *parent, bool force)
{
int ret;
@@ -2298,7 +2300,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
clk_core_rate_unprotect(clk->core);
ret = clk_core_set_parent_nolock(clk->core,
- parent ? parent->core : NULL);
+ parent ? parent->core : NULL,
+ force);
if (clk->exclusive_count)
clk_core_rate_protect(clk->core);
@@ -2307,8 +2310,19 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
@@ -2268,6 +2268,12 @@ static int clk_core_set_parent_nolock(struct clk_core *core,
return ret;
}
+
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ return _clk_set_parent(clk, parent, 0);
+}
EXPORT_SYMBOL_GPL(clk_set_parent);
+int clk_set_parent_force(struct clk *clk, struct clk *parent)
+int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent)
+{
+ return _clk_set_parent(clk, parent, 1);
+ return clk_core_set_parent_nolock(hw->core, parent->core);
+}
+EXPORT_SYMBOL_GPL(clk_set_parent_force);
+EXPORT_SYMBOL_GPL(clk_hw_set_parent);
+
static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
{
int ret = -EINVAL;
@@ -3350,7 +3364,7 @@ void clk_unregister(struct clk *clk)
/* Reparent all children to the orphan list. */
hlist_for_each_entry_safe(child, t, &clk->core->children,
child_node)
- clk_core_set_parent_nolock(child, NULL);
+ clk_core_set_parent_nolock(child, NULL, 0);
}
hlist_del_init(&clk->core->child_node);
/**
* clk_set_parent - switch the parent of a mux clk
* @clk: the mux clk whose input we are switching
diff --git a/include/dt-bindings/clock/stm32mp1-clks.h b/include/dt-bindings/clock/stm32mp1-clks.h
index 90ec780..4cdaf13 100644
--- a/include/dt-bindings/clock/stm32mp1-clks.h
@ -1515,18 +1531,18 @@ index 90ec780..4cdaf13 100644
-#define ETHMAC_K ETHCK_K
-
#endif /* _DT_BINDINGS_STM32MP1_CLKS_H_ */
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 4f750c4..ffbae16 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -602,6 +602,7 @@ int clk_set_max_rate(struct clk *clk, unsigned long rate);
* Returns success (0) or negative errno.
*/
int clk_set_parent(struct clk *clk, struct clk *parent);
+int clk_set_parent_force(struct clk *clk, struct clk *parent);
/**
* clk_get_parent - get the parent clock source for this clock
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index d1b6d2c..ec4c906 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -778,6 +778,7 @@ unsigned int clk_hw_get_num_parents(const struct clk_hw *hw);
struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw);
struct clk_hw *clk_hw_get_parent_by_index(const struct clk_hw *hw,
unsigned int index);
+int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *new_parent);
unsigned int __clk_get_enable_count(struct clk *clk);
unsigned long clk_hw_get_rate(const struct clk_hw *hw);
unsigned long __clk_get_flags(struct clk *clk);
--
2.7.4

337
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0005-ARM-stm32mp1-r2-DMA.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0006-ARM-stm32mp1-r3-DMA.patch
View File

@ -1,16 +1,71 @@
From d13371d49b7675f62cdd16b4937eac738d862acd Mon Sep 17 00:00:00 2001
From ba9b118a08bddb954d75f84134705c9c28673128 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:00 +0200
Subject: [PATCH 05/30] ARM stm32mp1 r2 DMA
Date: Fri, 8 Nov 2019 16:52:39 +0100
Subject: [PATCH 06/31] ARM stm32mp1 r3 DMA
---
drivers/dma/stm32-dma.c | 1142 +++++++++++++++++++++++++++++++++++++-------
drivers/dma/dmaengine.c | 35 ++
drivers/dma/stm32-dma.c | 1164 ++++++++++++++++++++++++++++++++++++++------
drivers/dma/stm32-dmamux.c | 110 ++++-
drivers/dma/stm32-mdma.c | 232 ++++++++-
3 files changed, 1285 insertions(+), 199 deletions(-)
drivers/dma/stm32-mdma.c | 234 ++++++++-
include/linux/dmaengine.h | 11 +
5 files changed, 1358 insertions(+), 196 deletions(-)
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index f1a441ab..48483ab 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -737,6 +737,34 @@ struct dma_chan *dma_request_chan(struct device *dev, const char *name)
EXPORT_SYMBOL_GPL(dma_request_chan);
/**
+ * dma_request_chan_linked - try to allocate an exclusive slave channel
+ * @dev: pointer to client device structure
+ * @name: slave channel name
+ *
+ * Returns pointer to appropriate DMA channel on success or an error pointer.
+ * Create device link between DMA channel provider and client device consumer.
+ */
+struct dma_chan *dma_request_chan_linked(struct device *dev, const char *name)
+{
+ struct dma_chan *ch = dma_request_chan(dev, name);
+ struct device *provider_dev = ch->device->dev;
+ struct device_link *link;
+
+ if (!IS_ERR_OR_NULL(ch)) {
+ link = device_link_add(dev, provider_dev, DL_FLAG_STATELESS);
+ if (!link) {
+ dev_err(provider_dev,
+ "failed to add dev link with %s\n",
+ dev_name(dev));
+ return ERR_PTR(-EINVAL);
+ }
+ }
+
+ return ch;
+}
+EXPORT_SYMBOL_GPL(dma_request_chan_linked);
+
+/**
* dma_request_slave_channel - try to allocate an exclusive slave channel
* @dev: pointer to client device structure
* @name: slave channel name
@@ -794,6 +822,13 @@ void dma_release_channel(struct dma_chan *chan)
}
EXPORT_SYMBOL_GPL(dma_release_channel);
+void dma_release_chan_linked(struct device *dev, struct dma_chan *chan)
+{
+ device_link_remove(dev, chan->device->dev);
+ dma_release_channel(chan);
+}
+EXPORT_SYMBOL_GPL(dma_release_chan_linked);
+
/**
* dmaengine_get - register interest in dma_channels
*/
diff --git a/drivers/dma/stm32-dma.c b/drivers/dma/stm32-dma.c
index 379e8d5..87db5a7 100644
index 4903a40..810420a 100644
--- a/drivers/dma/stm32-dma.c
+++ b/drivers/dma/stm32-dma.c
@@ -15,14 +15,18 @@
@ -32,15 +87,18 @@ index 379e8d5..87db5a7 100644
#include <linux/reset.h>
#include <linux/sched.h>
#include <linux/slab.h>
@@ -118,6 +122,7 @@
@@ -116,8 +120,10 @@
#define STM32_DMA_FIFO_THRESHOLD_HALFFULL 0x01
#define STM32_DMA_FIFO_THRESHOLD_3QUARTERSFULL 0x02
#define STM32_DMA_FIFO_THRESHOLD_FULL 0x03
+#define STM32_DMA_FIFO_THRESHOLD_NONE 0x04
#define STM32_DMA_MAX_DATA_ITEMS 0xffff
+#define STM32_DMA_SRAM_GRANULARITY PAGE_SIZE
/*
* Valid transfer starts from @0 to @0xFFFE leading to unaligned scatter
* gather at boundary. Thus it's safer to round down this value on FIFO
@@ -135,6 +140,12 @@
@@ -135,6 +141,15 @@
/* DMA Features */
#define STM32_DMA_THRESHOLD_FTR_MASK GENMASK(1, 0)
#define STM32_DMA_THRESHOLD_FTR_GET(n) ((n) & STM32_DMA_THRESHOLD_FTR_MASK)
@ -50,10 +108,13 @@ index 379e8d5..87db5a7 100644
+#define STM32_DMA_MDMA_SRAM_SIZE_MASK GENMASK(4, 3)
+#define STM32_DMA_MDMA_SRAM_SIZE_GET(n) (((n) & STM32_DMA_MDMA_SRAM_SIZE_MASK) \
+ >> 3)
+#define STM32_DMA_DIRECT_MODE_MASK BIT(5)
+#define STM32_DMA_DIRECT_MODE_GET(n) (((n) & STM32_DMA_DIRECT_MODE_MASK) \
+ >> 5)
enum stm32_dma_width {
STM32_DMA_BYTE,
@@ -176,15 +187,32 @@ struct stm32_dma_chan_reg {
@@ -176,15 +191,32 @@ struct stm32_dma_chan_reg {
u32 dma_sfcr;
};
@ -87,7 +148,7 @@ index 379e8d5..87db5a7 100644
struct stm32_dma_sg_req sg_req[];
};
@@ -201,6 +229,10 @@ struct stm32_dma_chan {
@@ -201,6 +233,10 @@ struct stm32_dma_chan {
u32 threshold;
u32 mem_burst;
u32 mem_width;
@ -98,7 +159,7 @@ index 379e8d5..87db5a7 100644
};
struct stm32_dma_device {
@@ -210,6 +242,7 @@ struct stm32_dma_device {
@@ -210,6 +246,7 @@ struct stm32_dma_device {
struct reset_control *rst;
bool mem2mem;
struct stm32_dma_chan chan[STM32_DMA_MAX_CHANNELS];
@ -106,34 +167,28 @@ index 379e8d5..87db5a7 100644
};
static struct stm32_dma_device *stm32_dma_get_dev(struct stm32_dma_chan *chan)
@@ -308,20 +341,12 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
@@ -287,6 +324,9 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
{
u32 remaining;
+ if (threshold == STM32_DMA_FIFO_THRESHOLD_NONE)
+ return false;
+
if (width != DMA_SLAVE_BUSWIDTH_UNDEFINED) {
if (burst != 0) {
/*
@@ -308,6 +348,10 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
static bool stm32_dma_is_burst_possible(u32 buf_len, u32 threshold)
{
- switch (threshold) {
- case STM32_DMA_FIFO_THRESHOLD_FULL:
- if (buf_len >= STM32_DMA_MAX_BURST)
- return true;
- else
- return false;
- case STM32_DMA_FIFO_THRESHOLD_HALFFULL:
- if (buf_len >= STM32_DMA_MAX_BURST / 2)
- return true;
- else
- return false;
- default:
- return false;
- }
+ /*
+ * Buffer or period length has to be aligned on FIFO depth.
+ * Otherwise bytes may be stuck within FIFO at buffer or period
+ * length.
+ */
+ return ((buf_len % ((threshold + 1) * 4)) == 0);
}
static u32 stm32_dma_get_best_burst(u32 buf_len, u32 max_burst, u32 threshold,
@@ -436,7 +461,6 @@ static void stm32_dma_irq_clear(struct stm32_dma_chan *chan, u32 flags)
+ /* If FIFO direct mode, burst is not possible */
+ if (threshold == STM32_DMA_FIFO_THRESHOLD_NONE)
+ return false;
+
/*
* Buffer or period length has to be aligned on FIFO depth.
* Otherwise bytes may be stuck within FIFO at buffer or period
@@ -428,7 +472,6 @@ static void stm32_dma_irq_clear(struct stm32_dma_chan *chan, u32 flags)
static int stm32_dma_disable_chan(struct stm32_dma_chan *chan)
{
struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
@ -141,7 +196,7 @@ index 379e8d5..87db5a7 100644
u32 dma_scr, id;
id = chan->id;
@@ -446,19 +470,10 @@ static int stm32_dma_disable_chan(struct stm32_dma_chan *chan)
@@ -438,19 +481,10 @@ static int stm32_dma_disable_chan(struct stm32_dma_chan *chan)
dma_scr &= ~STM32_DMA_SCR_EN;
stm32_dma_write(dmadev, STM32_DMA_SCR(id), dma_scr);
@ -165,7 +220,7 @@ index 379e8d5..87db5a7 100644
}
return 0;
@@ -497,13 +512,23 @@ static void stm32_dma_stop(struct stm32_dma_chan *chan)
@@ -489,13 +523,23 @@ static void stm32_dma_stop(struct stm32_dma_chan *chan)
static int stm32_dma_terminate_all(struct dma_chan *c)
{
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
@ -192,7 +247,7 @@ index 379e8d5..87db5a7 100644
chan->desc = NULL;
}
@@ -514,9 +539,96 @@ static int stm32_dma_terminate_all(struct dma_chan *c)
@@ -506,9 +550,96 @@ static int stm32_dma_terminate_all(struct dma_chan *c)
return 0;
}
@ -289,7 +344,7 @@ index 379e8d5..87db5a7 100644
vchan_synchronize(&chan->vchan);
}
@@ -539,62 +651,205 @@ static void stm32_dma_dump_reg(struct stm32_dma_chan *chan)
@@ -531,62 +662,205 @@ static void stm32_dma_dump_reg(struct stm32_dma_chan *chan)
dev_dbg(chan2dev(chan), "SFCR: 0x%08x\n", sfcr);
}
@ -533,7 +588,7 @@ index 379e8d5..87db5a7 100644
}
static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
@@ -626,35 +881,147 @@ static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
@@ -618,35 +892,147 @@ static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
}
}
@ -693,7 +748,7 @@ index 379e8d5..87db5a7 100644
if (status & STM32_DMA_TCI) {
stm32_dma_irq_clear(chan, STM32_DMA_TCI);
@@ -669,10 +1036,12 @@ static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
@@ -661,10 +1047,19 @@ static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
if (status & STM32_DMA_FEI) {
stm32_dma_irq_clear(chan, STM32_DMA_FEI);
status &= ~STM32_DMA_FEI;
@ -706,11 +761,18 @@ index 379e8d5..87db5a7 100644
+ dev_err(chan2dev(chan), "FIFO Error\n");
+ else
+ dev_dbg(chan2dev(chan), "FIFO over/underrun\n");
+ }
+ }
+ if (status & STM32_DMA_DMEI) {
+ stm32_dma_irq_clear(chan, STM32_DMA_DMEI);
+ status &= ~STM32_DMA_DMEI;
+ if (sfcr & STM32_DMA_SCR_DMEIE) {
+ dev_dbg(chan2dev(chan), "Direct mode overrun\n");
+ }
}
if (status) {
stm32_dma_irq_clear(chan, status);
@@ -691,12 +1060,17 @@ static void stm32_dma_issue_pending(struct dma_chan *c)
@@ -683,12 +1078,17 @@ static void stm32_dma_issue_pending(struct dma_chan *c)
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
unsigned long flags;
@ -730,7 +792,97 @@ index 379e8d5..87db5a7 100644
spin_unlock_irqrestore(&chan->vchan.lock, flags);
}
@@ -836,16 +1210,169 @@ static void stm32_dma_clear_reg(struct stm32_dma_chan_reg *regs)
@@ -701,13 +1101,13 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
int src_bus_width, dst_bus_width;
int src_burst_size, dst_burst_size;
u32 src_maxburst, dst_maxburst, src_best_burst, dst_best_burst;
- u32 dma_scr, threshold;
+ u32 dma_scr, fifoth;
src_addr_width = chan->dma_sconfig.src_addr_width;
dst_addr_width = chan->dma_sconfig.dst_addr_width;
src_maxburst = chan->dma_sconfig.src_maxburst;
dst_maxburst = chan->dma_sconfig.dst_maxburst;
- threshold = chan->threshold;
+ fifoth = chan->threshold;
switch (direction) {
case DMA_MEM_TO_DEV:
@@ -719,7 +1119,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
/* Set device burst size */
dst_best_burst = stm32_dma_get_best_burst(buf_len,
dst_maxburst,
- threshold,
+ fifoth,
dst_addr_width);
dst_burst_size = stm32_dma_get_burst(chan, dst_best_burst);
@@ -727,7 +1127,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
return dst_burst_size;
/* Set memory data size */
- src_addr_width = stm32_dma_get_max_width(buf_len, threshold);
+ src_addr_width = stm32_dma_get_max_width(buf_len, fifoth);
chan->mem_width = src_addr_width;
src_bus_width = stm32_dma_get_width(chan, src_addr_width);
if (src_bus_width < 0)
@@ -737,7 +1137,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
src_maxburst = STM32_DMA_MAX_BURST;
src_best_burst = stm32_dma_get_best_burst(buf_len,
src_maxburst,
- threshold,
+ fifoth,
src_addr_width);
src_burst_size = stm32_dma_get_burst(chan, src_best_burst);
if (src_burst_size < 0)
@@ -751,7 +1151,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
/* Set FIFO threshold */
chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_FTH_MASK;
- chan->chan_reg.dma_sfcr |= STM32_DMA_SFCR_FTH(threshold);
+ if (fifoth != STM32_DMA_FIFO_THRESHOLD_NONE)
+ chan->chan_reg.dma_sfcr |= STM32_DMA_SFCR_FTH(fifoth);
/* Set peripheral address */
chan->chan_reg.dma_spar = chan->dma_sconfig.dst_addr;
@@ -767,7 +1168,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
/* Set device burst size */
src_best_burst = stm32_dma_get_best_burst(buf_len,
src_maxburst,
- threshold,
+ fifoth,
src_addr_width);
chan->mem_burst = src_best_burst;
src_burst_size = stm32_dma_get_burst(chan, src_best_burst);
@@ -775,7 +1176,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
return src_burst_size;
/* Set memory data size */
- dst_addr_width = stm32_dma_get_max_width(buf_len, threshold);
+ dst_addr_width = stm32_dma_get_max_width(buf_len, fifoth);
chan->mem_width = dst_addr_width;
dst_bus_width = stm32_dma_get_width(chan, dst_addr_width);
if (dst_bus_width < 0)
@@ -785,7 +1186,7 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
dst_maxburst = STM32_DMA_MAX_BURST;
dst_best_burst = stm32_dma_get_best_burst(buf_len,
dst_maxburst,
- threshold,
+ fifoth,
dst_addr_width);
chan->mem_burst = dst_best_burst;
dst_burst_size = stm32_dma_get_burst(chan, dst_best_burst);
@@ -800,7 +1201,8 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
/* Set FIFO threshold */
chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_FTH_MASK;
- chan->chan_reg.dma_sfcr |= STM32_DMA_SFCR_FTH(threshold);
+ if (fifoth != STM32_DMA_FIFO_THRESHOLD_NONE)
+ chan->chan_reg.dma_sfcr |= STM32_DMA_SFCR_FTH(fifoth);
/* Set peripheral address */
chan->chan_reg.dma_spar = chan->dma_sconfig.src_addr;
@@ -828,16 +1230,169 @@ static void stm32_dma_clear_reg(struct stm32_dma_chan_reg *regs)
memset(regs, 0, sizeof(struct stm32_dma_chan_reg));
}
@ -903,7 +1055,7 @@ index 379e8d5..87db5a7 100644
int i, ret;
if (!chan->config_init) {
@@ -868,48 +1395,141 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
@@ -860,48 +1415,141 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
else
chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL;
@ -912,12 +1064,12 @@ index 379e8d5..87db5a7 100644
- sg_dma_len(sg));
- if (ret < 0)
- goto err;
-
- desc->sg_req[i].len = sg_dma_len(sg);
+ if (chan->use_mdma) {
+ struct sg_table new_sgt;
+ struct scatterlist *s, *_sgl;
- desc->sg_req[i].len = sg_dma_len(sg);
-
- nb_data_items = desc->sg_req[i].len / buswidth;
- if (nb_data_items > STM32_DMA_ALIGNED_MAX_DATA_ITEMS) {
- dev_err(chan2dev(chan), "nb items not supported\n");
@ -1065,7 +1217,7 @@ index 379e8d5..87db5a7 100644
int i, ret;
if (!buf_len || !period_len) {
@@ -957,28 +1577,49 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
@@ -949,28 +1597,49 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
/* Clear periph ctrl if client set it */
chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL;
@ -1083,10 +1235,10 @@ index 379e8d5..87db5a7 100644
- desc->sg_req[i].len = period_len;
+ desc->num_sgs = num_periods;
+ desc->cyclic = true;
+
+ if (chan->use_mdma) {
+ chan->mchan.dir = direction;
+
+ ret = stm32_dma_mdma_prep_dma_cyclic(chan, buf_addr, buf_len,
+ period_len, desc);
+ if (ret < 0)
@ -1127,7 +1279,7 @@ index 379e8d5..87db5a7 100644
return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
}
@@ -1019,13 +1660,13 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
@@ -1011,13 +1680,13 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
STM32_DMA_SCR_PINC |
STM32_DMA_SCR_TCIE |
STM32_DMA_SCR_TEIE;
@ -1143,7 +1295,7 @@ index 379e8d5..87db5a7 100644
}
desc->num_sgs = num_sgs;
@@ -1034,16 +1675,28 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
@@ -1026,16 +1695,28 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
}
@ -1178,7 +1330,7 @@ index 379e8d5..87db5a7 100644
}
static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
@@ -1051,28 +1704,52 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
@@ -1043,28 +1724,52 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
u32 next_sg)
{
u32 modulo, burst_size;
@ -1244,7 +1396,7 @@ index 379e8d5..87db5a7 100644
if (!chan->mem_burst)
return residue;
@@ -1089,11 +1766,23 @@ static enum dma_status stm32_dma_tx_status(struct dma_chan *c,
@@ -1081,11 +1786,23 @@ static enum dma_status stm32_dma_tx_status(struct dma_chan *c,
struct dma_tx_state *state)
{
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
@ -1268,7 +1420,7 @@ index 379e8d5..87db5a7 100644
status = dma_cookie_status(c, cookie, state);
if (status == DMA_COMPLETE || !state)
return status;
@@ -1120,15 +1809,14 @@ static int stm32_dma_alloc_chan_resources(struct dma_chan *c)
@@ -1112,15 +1829,14 @@ static int stm32_dma_alloc_chan_resources(struct dma_chan *c)
int ret;
chan->config_init = false;
@ -1288,7 +1440,7 @@ index 379e8d5..87db5a7 100644
return ret;
}
@@ -1148,28 +1836,48 @@ static void stm32_dma_free_chan_resources(struct dma_chan *c)
@@ -1140,28 +1856,50 @@ static void stm32_dma_free_chan_resources(struct dma_chan *c)
spin_unlock_irqrestore(&chan->vchan.lock, flags);
}
@ -1340,10 +1492,12 @@ index 379e8d5..87db5a7 100644
+ chan->use_mdma = STM32_DMA_MDMA_CHAIN_FTR_GET(cfg->features);
+ chan->sram_size = (1 << STM32_DMA_MDMA_SRAM_SIZE_GET(cfg->features)) *
+ STM32_DMA_SRAM_GRANULARITY;
+ if (STM32_DMA_DIRECT_MODE_GET(cfg->features))
+ chan->threshold = STM32_DMA_FIFO_THRESHOLD_NONE;
}
static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
@@ -1207,6 +1915,9 @@ static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
@@ -1199,6 +1937,9 @@ static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
stm32_dma_set_config(chan, &cfg);
@ -1353,7 +1507,7 @@ index 379e8d5..87db5a7 100644
return c;
}
@@ -1219,10 +1930,12 @@ MODULE_DEVICE_TABLE(of, stm32_dma_of_match);
@@ -1211,10 +1952,12 @@ MODULE_DEVICE_TABLE(of, stm32_dma_of_match);
static int stm32_dma_probe(struct platform_device *pdev)
{
struct stm32_dma_chan *chan;
@ -1366,7 +1520,7 @@ index 379e8d5..87db5a7 100644
int i, ret;
match = of_match_device(stm32_dma_of_match, &pdev->dev);
@@ -1248,6 +1961,12 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1240,6 +1983,12 @@ static int stm32_dma_probe(struct platform_device *pdev)
return PTR_ERR(dmadev->clk);
}
@ -1379,7 +1533,7 @@ index 379e8d5..87db5a7 100644
dmadev->mem2mem = of_property_read_bool(pdev->dev.of_node,
"st,mem2mem");
@@ -1258,6 +1977,15 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1250,6 +1999,15 @@ static int stm32_dma_probe(struct platform_device *pdev)
reset_control_deassert(dmadev->rst);
}
@ -1395,7 +1549,7 @@ index 379e8d5..87db5a7 100644
dma_cap_set(DMA_SLAVE, dd->cap_mask);
dma_cap_set(DMA_PRIVATE, dd->cap_mask);
dma_cap_set(DMA_CYCLIC, dd->cap_mask);
@@ -1278,7 +2006,9 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1270,7 +2028,9 @@ static int stm32_dma_probe(struct platform_device *pdev)
BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
dd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
dd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
@ -1405,7 +1559,7 @@ index 379e8d5..87db5a7 100644
dd->dev = &pdev->dev;
INIT_LIST_HEAD(&dd->channels);
@@ -1293,21 +2023,34 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1285,21 +2045,34 @@ static int stm32_dma_probe(struct platform_device *pdev)
chan->id = i;
chan->vchan.desc_free = stm32_dma_desc_free;
vchan_init(&chan->vchan, dd);
@ -1446,7 +1600,7 @@ index 379e8d5..87db5a7 100644
ret = devm_request_irq(&pdev->dev, chan->irq,
stm32_dma_chan_irq, 0,
dev_name(chan2dev(chan)), chan);
@@ -1329,20 +2072,95 @@ static int stm32_dma_probe(struct platform_device *pdev)
@@ -1321,20 +2094,95 @@ static int stm32_dma_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, dmadev);
@ -1542,7 +1696,7 @@ index 379e8d5..87db5a7 100644
},
};
@@ -1350,4 +2168,4 @@ static int __init stm32_dma_init(void)
@@ -1342,4 +2190,4 @@ static int __init stm32_dma_init(void)
{
return platform_driver_probe(&stm32_dma_driver, stm32_dma_probe);
}
@ -1728,7 +1882,7 @@ index b922db9..a878b7c 100644
};
diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
index 06dd172..fb4a7e3 100644
index 8c3c3e5..759d0ab 100644
--- a/drivers/dma/stm32-mdma.c
+++ b/drivers/dma/stm32-mdma.c
@@ -37,6 +37,7 @@
@ -1739,15 +1893,17 @@ index 06dd172..fb4a7e3 100644
#include <linux/reset.h>
#include <linux/slab.h>
@@ -211,6 +212,8 @@
@@ -209,7 +210,9 @@
#define STM32_MDMA_MAX_CHANNELS 63
#define STM32_MDMA_MAX_REQUESTS 256
#define STM32_MDMA_MAX_BURST 128
#define STM32_MDMA_VERY_HIGH_PRIORITY 0x11
+#define STM32_DMA_SRAM_GRANULARITY PAGE_SIZE
-#define STM32_MDMA_VERY_HIGH_PRIORITY 0x11
+#define STM32_MDMA_VERY_HIGH_PRIORITY 0x3
+
+#define STM32_DMA_SRAM_GRANULARITY PAGE_SIZE
enum stm32_mdma_trigger_mode {
STM32_MDMA_BUFFER,
STM32_MDMA_BLOCK,
@@ -237,6 +240,7 @@ struct stm32_mdma_chan_config {
u32 transfer_config;
u32 mask_addr;
@ -2221,6 +2377,45 @@ index 06dd172..fb4a7e3 100644
},
};
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 0647f43..942c707 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -1318,9 +1318,11 @@ struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name);
struct dma_chan *dma_request_chan(struct device *dev, const char *name);
+struct dma_chan *dma_request_chan_linked(struct device *dev, const char *name);
struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask);
void dma_release_channel(struct dma_chan *chan);
+void dma_release_chan_linked(struct device *dev, struct dma_chan *chan);
int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps);
#else
static inline struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
@@ -1353,6 +1355,11 @@ static inline struct dma_chan *dma_request_chan(struct device *dev,
{
return ERR_PTR(-ENODEV);
}
+static inline struct dma_chan *dma_request_chan_linked(struct device *dev,
+ const char *name)
+{
+ return ERR_PTR(-ENODEV);
+}
static inline struct dma_chan *dma_request_chan_by_mask(
const dma_cap_mask_t *mask)
{
@@ -1361,6 +1368,10 @@ static inline struct dma_chan *dma_request_chan_by_mask(
static inline void dma_release_channel(struct dma_chan *chan)
{
}
+static inline void dma_release_chan_linked(struct device *dev,
+ struct dma_chan *chan)
+{
+}
static inline int dma_get_slave_caps(struct dma_chan *chan,
struct dma_slave_caps *caps)
{
--
2.7.4

651
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0006-ARM-stm32mp1-r2-DRM.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0007-ARM-stm32mp1-r3-DRM.patch
View File

File diff suppressed because it is too large Load Diff

31
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0007-ARM-stm32mp1-r2-GPIO.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0008-ARM-stm32mp1-r3-GPIO.patch
View File

@ -1,7 +1,7 @@
From fc0e7f3b161868a6ab3e40938cb820ef23d223f6 Mon Sep 17 00:00:00 2001
From: Romuald JEANNE <romuald.jeanne@st.com>
Date: Tue, 17 Sep 2019 14:27:05 +0200
Subject: [PATCH 07/30] ARM stm32mp1 r2 GPIO
From 7aa67bec68104aebb6a182e12cbfd62dfa81a5d3 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Fri, 8 Nov 2019 16:52:40 +0100
Subject: [PATCH 08/31] ARM stm32mp1 r3 GPIO
---
drivers/gpio/gpiolib-of.c | 5 +++++
@ -29,10 +29,10 @@ index e0f149b..a8cba78 100644
}
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index fd713326..af5d0e6 100644
index a24f13d..aa750f9 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -2519,6 +2519,14 @@ EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
@@ -2537,6 +2537,14 @@ EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
* rely on gpio_request() having been called beforehand.
*/
@ -47,7 +47,7 @@ index fd713326..af5d0e6 100644
/**
* gpiod_direction_input - set the GPIO direction to input
* @desc: GPIO to set to input
@@ -2547,20 +2555,19 @@ int gpiod_direction_input(struct gpio_desc *desc)
@@ -2573,20 +2581,19 @@ int gpiod_direction_input(struct gpio_desc *desc)
if (status == 0)
clear_bit(FLAG_IS_OUT, &desc->flags);
@ -75,7 +75,7 @@ index fd713326..af5d0e6 100644
static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
{
struct gpio_chip *gc = desc->gdev->chip;
@@ -2634,8 +2641,8 @@ int gpiod_direction_output(struct gpio_desc *desc, int value)
@@ -2672,8 +2679,8 @@ int gpiod_direction_output(struct gpio_desc *desc, int value)
gc = desc->gdev->chip;
if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
/* First see if we can enable open drain in hardware */
@ -86,8 +86,8 @@ index fd713326..af5d0e6 100644
if (!ret)
goto set_output_value;
/* Emulate open drain by not actively driving the line high */
@@ -2643,16 +2650,16 @@ int gpiod_direction_output(struct gpio_desc *desc, int value)
return gpiod_direction_input(desc);
@@ -2683,8 +2690,8 @@ int gpiod_direction_output(struct gpio_desc *desc, int value)
}
}
else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
- ret = gpio_set_drive_single_ended(gc, gpio_chip_hwgpio(desc),
@ -97,8 +97,9 @@ index fd713326..af5d0e6 100644
if (!ret)
goto set_output_value;
/* Emulate open source by not actively driving the line low */
if (!value)
return gpiod_direction_input(desc);
@@ -2693,8 +2700,8 @@ int gpiod_direction_output(struct gpio_desc *desc, int value)
goto set_output_flag;
}
} else {
- gpio_set_drive_single_ended(gc, gpio_chip_hwgpio(desc),
- PIN_CONFIG_DRIVE_PUSH_PULL);
@ -107,7 +108,7 @@ index fd713326..af5d0e6 100644
}
set_output_value:
@@ -2684,7 +2691,7 @@ int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
@@ -2737,7 +2744,7 @@ int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
}
config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
@ -116,7 +117,7 @@ index fd713326..af5d0e6 100644
}
EXPORT_SYMBOL_GPL(gpiod_set_debounce);
@@ -2721,7 +2728,7 @@ int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
@@ -2774,7 +2781,7 @@ int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
!transitory);
gpio = gpio_chip_hwgpio(desc);
@ -125,7 +126,7 @@ index fd713326..af5d0e6 100644
if (rc == -ENOTSUPP) {
dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
gpio);
@@ -3858,6 +3865,17 @@ int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
@@ -3908,6 +3915,17 @@ int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
if (lflags & GPIO_OPEN_SOURCE)
set_bit(FLAG_OPEN_SOURCE, &desc->flags);

6
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0008-ARM-stm32mp1-r2-HWSPINLOCK.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0009-ARM-stm32mp1-r3-HWSPINLOCK.patch
View File

@ -1,7 +1,7 @@
From 7f9a7065bc23ee2da17c45ff4097cdbc9b70065d Mon Sep 17 00:00:00 2001
From da8d8b897bc61f58b87237394c4a9ff4f89e906d Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:00 +0200
Subject: [PATCH 08/30] ARM stm32mp1 r2 HWSPINLOCK
Date: Fri, 8 Nov 2019 16:52:40 +0100
Subject: [PATCH 09/31] ARM stm32mp1 r3 HWSPINLOCK
---
drivers/hwspinlock/Kconfig | 9 ++

825
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0009-ARM-stm32mp1-r2-HWTRACING-I2C.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0010-ARM-stm32mp1-r3-HWTRACING-I2C.patch
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File diff suppressed because it is too large Load Diff

1194
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0010-ARM-stm32mp1-r2-IIO.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0011-ARM-stm32mp1-r3-IIO.patch
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File diff suppressed because it is too large Load Diff

465
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0011-ARM-stm32mp1-r2-INPUT-IRQ-Mailbox.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0012-ARM-stm32mp1-r3-INPUT-IRQ-Mailbox.patch
View File

@ -1,18 +1,20 @@
From a7a3aa42479bf82ba9ed31d2960ad299a5bb214b Mon Sep 17 00:00:00 2001
From b9a72771779e960b3ddf14d372ed6484cba99cbc Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:01 +0200
Subject: [PATCH 11/30] ARM stm32mp1 r2 INPUT IRQ Mailbox
Date: Fri, 8 Nov 2019 16:52:41 +0100
Subject: [PATCH 12/31] ARM stm32mp1 r3 INPUT IRQ Mailbox
---
drivers/input/misc/Kconfig | 11 ++
drivers/input/misc/Makefile | 2 +
drivers/input/misc/stpmic1_onkey.c | 197 +++++++++++++++++++
drivers/input/touchscreen/edt-ft5x06.c | 8 +-
drivers/input/touchscreen/goodix.c | 9 +
drivers/input/misc/stpmic1_onkey.c | 198 +++++++++++++++++++
drivers/input/touchscreen/edt-ft5x06.c | 24 ++-
drivers/input/touchscreen/goodix.c | 24 +++
drivers/irqchip/irq-stm32-exti.c | 339 +++++++++++++++++++++++++++------
drivers/mailbox/mailbox-test.c | 26 +--
drivers/mailbox/stm32-ipcc.c | 54 ++++--
8 files changed, 555 insertions(+), 91 deletions(-)
drivers/mailbox/mailbox-test.c | 12 +-
drivers/mailbox/stm32-ipcc.c | 4 +-
kernel/irq/internals.h | 4 -
kernel/irq/manage.c | 75 ++------
10 files changed, 563 insertions(+), 130 deletions(-)
create mode 100644 drivers/input/misc/stpmic1_onkey.c
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
@ -54,10 +56,10 @@ index 9d0f9d1..1b44202 100644
+
diff --git a/drivers/input/misc/stpmic1_onkey.c b/drivers/input/misc/stpmic1_onkey.c
new file mode 100644
index 0000000..6a7f08b
index 0000000..7b49c99
--- /dev/null
+++ b/drivers/input/misc/stpmic1_onkey.c
@@ -0,0 +1,197 @@
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) STMicroelectronics 2018
+// Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
@ -135,7 +137,7 @@ index 0000000..6a7f08b
+ }
+
+ if (!device_property_read_u32(dev, "power-off-time-sec", &val)) {
+ if ((val > 0) && (val <= 16)) {
+ if (val > 0 && val <= 16) {
+ dev_dbg(dev, "power-off-time=%d seconds\n", val);
+ reg |= PONKEY_PWR_OFF;
+ reg |= ((16 - val) & PONKEY_TURNOFF_TIMER_MASK);
@ -160,7 +162,8 @@ index 0000000..6a7f08b
+ PONKEY_PU_INACTIVE,
+ PONKEY_PU_INACTIVE);
+ if (error) {
+ dev_err(dev, "ONKEY Pads configuration failed: %d\n", error);
+ dev_err(dev, "ONKEY Pads configuration failed: %d\n",
+ error);
+ return error;
+ }
+ }
@ -256,10 +259,28 @@ index 0000000..6a7f08b
+MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/edt-ft5x06.c b/drivers/input/touchscreen/edt-ft5x06.c
index 1e18ca0..c1c6f2a 100644
index 1e18ca0..745da4c 100644
--- a/drivers/input/touchscreen/edt-ft5x06.c
+++ b/drivers/input/touchscreen/edt-ft5x06.c
@@ -1033,7 +1033,7 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
@@ -39,6 +39,8 @@
#include <linux/input/mt.h>
#include <linux/input/touchscreen.h>
#include <linux/of_device.h>
+#include <drm/drm_mipi_dsi.h>
+
#define WORK_REGISTER_THRESHOLD 0x00
#define WORK_REGISTER_REPORT_RATE 0x08
@@ -968,6 +970,8 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
{
const struct edt_i2c_chip_data *chip_data;
struct edt_ft5x06_ts_data *tsdata;
+ struct mipi_dsi_device *panel;
+ struct device_node *np;
struct input_dev *input;
unsigned long irq_flags;
int error;
@@ -1033,7 +1037,7 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
error = edt_ft5x06_ts_identify(client, tsdata, fw_version);
if (error) {
@ -268,7 +289,26 @@ index 1e18ca0..c1c6f2a 100644
return error;
}
@@ -1152,11 +1152,16 @@ static const struct edt_i2c_chip_data edt_ft6236_data = {
@@ -1105,6 +1109,18 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client,
tsdata->wake_gpio ? desc_to_gpio(tsdata->wake_gpio) : -1,
tsdata->reset_gpio ? desc_to_gpio(tsdata->reset_gpio) : -1);
+ np = of_parse_phandle(client->dev.of_node, "panel", 0);
+ if (np) {
+ panel = of_find_mipi_dsi_device_by_node(np);
+ of_node_put(np);
+ if (!panel)
+ return -ENOENT;
+
+ device_link_add(&client->dev, &panel->dev, DL_FLAG_STATELESS |
+ DL_FLAG_AUTOREMOVE_SUPPLIER);
+ put_device(&panel->dev);
+ }
+
return 0;
}
@@ -1152,11 +1168,16 @@ static const struct edt_i2c_chip_data edt_ft6236_data = {
.max_support_points = 2,
};
@ -285,7 +325,7 @@ index 1e18ca0..c1c6f2a 100644
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(i2c, edt_ft5x06_ts_id);
@@ -1169,6 +1174,7 @@ static const struct of_device_id edt_ft5x06_of_match[] = {
@@ -1169,6 +1190,7 @@ static const struct of_device_id edt_ft5x06_of_match[] = {
{ .compatible = "edt,edt-ft5506", .data = &edt_ft5506_data },
/* Note focaltech vendor prefix for compatibility with ft6236.c */
{ .compatible = "focaltech,ft6236", .data = &edt_ft6236_data },
@ -294,18 +334,21 @@ index 1e18ca0..c1c6f2a 100644
};
MODULE_DEVICE_TABLE(of, edt_ft5x06_of_match);
diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c
index f2d9c2c..9ce8db4 100644
index b20ba65..c196423 100644
--- a/drivers/input/touchscreen/goodix.c
+++ b/drivers/input/touchscreen/goodix.c
@@ -27,6 +27,7 @@
@@ -25,8 +25,10 @@
#include <linux/input/touchscreen.h>
#include <linux/module.h>
#include <linux/delay.h>
+#include <drm/drm_mipi_dsi.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
+#include <linux/gpio.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/of.h>
@@ -357,6 +358,13 @@ static void goodix_free_irq(struct goodix_ts_data *ts)
@@ -366,6 +368,13 @@ static void goodix_free_irq(struct goodix_ts_data *ts)
static int goodix_request_irq(struct goodix_ts_data *ts)
{
@ -319,7 +362,42 @@ index f2d9c2c..9ce8db4 100644
return devm_request_threaded_irq(&ts->client->dev, ts->client->irq,
NULL, goodix_ts_irq_handler,
ts->irq_flags, ts->client->name, ts);
@@ -949,6 +957,7 @@ static const struct of_device_id goodix_of_match[] = {
@@ -774,6 +783,8 @@ static int goodix_ts_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct goodix_ts_data *ts;
+ struct mipi_dsi_device *panel;
+ struct device_node *np;
int error;
dev_dbg(&client->dev, "I2C Address: 0x%02x\n", client->addr);
@@ -842,6 +853,17 @@ static int goodix_ts_probe(struct i2c_client *client,
return error;
}
+ np = of_parse_phandle(client->dev.of_node, "panel", 0);
+ if (np) {
+ panel = of_find_mipi_dsi_device_by_node(np);
+ of_node_put(np);
+ if (!panel)
+ return -ENOENT;
+ device_link_add(&client->dev, &panel->dev, DL_FLAG_STATELESS |
+ DL_FLAG_AUTOREMOVE_SUPPLIER);
+ put_device(&panel->dev);
+ }
+
return 0;
}
@@ -896,6 +918,7 @@ static int __maybe_unused goodix_suspend(struct device *dev)
* sooner, delay 58ms here.
*/
msleep(58);
+
return 0;
}
@@ -958,6 +981,7 @@ static const struct of_device_id goodix_of_match[] = {
{ .compatible = "goodix,gt9271" },
{ .compatible = "goodix,gt928" },
{ .compatible = "goodix,gt967" },
@ -856,7 +934,7 @@ index 97b27f3..8e5a31b 100644
-
-IRQCHIP_DECLARE(stm32mp1_exti, "st,stm32mp1-exti", stm32mp1_exti_of_init);
diff --git a/drivers/mailbox/mailbox-test.c b/drivers/mailbox/mailbox-test.c
index 58bfafc..4e4ac4b 100644
index 129b365..4e4ac4b 100644
--- a/drivers/mailbox/mailbox-test.c
+++ b/drivers/mailbox/mailbox-test.c
@@ -31,7 +31,6 @@
@ -896,38 +974,7 @@ index 58bfafc..4e4ac4b 100644
tdev, &mbox_test_signal_ops);
return 0;
@@ -363,22 +363,24 @@ static int mbox_test_probe(struct platform_device *pdev)
/* It's okay for MMIO to be NULL */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- size = resource_size(res);
tdev->tx_mmio = devm_ioremap_resource(&pdev->dev, res);
- if (PTR_ERR(tdev->tx_mmio) == -EBUSY)
+ if (PTR_ERR(tdev->tx_mmio) == -EBUSY) {
/* if reserved area in SRAM, try just ioremap */
+ size = resource_size(res);
tdev->tx_mmio = devm_ioremap(&pdev->dev, res->start, size);
- else if (IS_ERR(tdev->tx_mmio))
+ } else if (IS_ERR(tdev->tx_mmio)) {
tdev->tx_mmio = NULL;
+ }
/* If specified, second reg entry is Rx MMIO */
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- size = resource_size(res);
tdev->rx_mmio = devm_ioremap_resource(&pdev->dev, res);
- if (PTR_ERR(tdev->rx_mmio) == -EBUSY)
+ if (PTR_ERR(tdev->rx_mmio) == -EBUSY) {
+ size = resource_size(res);
tdev->rx_mmio = devm_ioremap(&pdev->dev, res->start, size);
- else if (IS_ERR(tdev->rx_mmio))
+ } else if (IS_ERR(tdev->rx_mmio)) {
tdev->rx_mmio = tdev->tx_mmio;
+ }
tdev->tx_channel = mbox_test_request_channel(pdev, "tx");
tdev->rx_channel = mbox_test_request_channel(pdev, "rx");
@@ -416,7 +418,7 @@ static int mbox_test_remove(struct platform_device *pdev)
@@ -418,7 +418,7 @@ static int mbox_test_remove(struct platform_device *pdev)
{
struct mbox_test_device *tdev = platform_get_drvdata(pdev);
@ -937,153 +984,10 @@ index 58bfafc..4e4ac4b 100644
if (tdev->tx_channel)
mbox_free_channel(tdev->tx_channel);
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32-ipcc.c
index 533b0da..eaf4ea4 100644
index e313222..eaf4ea4 100644
--- a/drivers/mailbox/stm32-ipcc.c
+++ b/drivers/mailbox/stm32-ipcc.c
@@ -8,9 +8,9 @@
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
#include <linux/mailbox_controller.h>
#include <linux/module.h>
-#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/pm_wakeirq.h>
@@ -50,6 +50,7 @@ struct stm32_ipcc {
void __iomem *reg_base;
void __iomem *reg_proc;
struct clk *clk;
+ spinlock_t lock; /* protect access to IPCC registers */
int irqs[IPCC_IRQ_NUM];
int wkp;
u32 proc_id;
@@ -58,14 +59,24 @@ struct stm32_ipcc {
u32 xmr;
};
-static inline void stm32_ipcc_set_bits(void __iomem *reg, u32 mask)
+static inline void stm32_ipcc_set_bits(spinlock_t *lock, void __iomem *reg,
+ u32 mask)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(lock, flags);
writel_relaxed(readl_relaxed(reg) | mask, reg);
+ spin_unlock_irqrestore(lock, flags);
}
-static inline void stm32_ipcc_clr_bits(void __iomem *reg, u32 mask)
+static inline void stm32_ipcc_clr_bits(spinlock_t *lock, void __iomem *reg,
+ u32 mask)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(lock, flags);
writel_relaxed(readl_relaxed(reg) & ~mask, reg);
+ spin_unlock_irqrestore(lock, flags);
}
static irqreturn_t stm32_ipcc_rx_irq(int irq, void *data)
@@ -92,7 +103,7 @@ static irqreturn_t stm32_ipcc_rx_irq(int irq, void *data)
mbox_chan_received_data(&ipcc->controller.chans[chan], NULL);
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XSCR,
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR,
RX_BIT_CHAN(chan));
ret = IRQ_HANDLED;
@@ -121,7 +132,7 @@ static irqreturn_t stm32_ipcc_tx_irq(int irq, void *data)
dev_dbg(dev, "%s: chan:%d tx\n", __func__, chan);
/* mask 'tx channel free' interrupt */
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XMR,
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
TX_BIT_CHAN(chan));
mbox_chan_txdone(&ipcc->controller.chans[chan], 0);
@@ -141,10 +152,12 @@ static int stm32_ipcc_send_data(struct mbox_chan *link, void *data)
dev_dbg(ipcc->controller.dev, "%s: chan:%d\n", __func__, chan);
/* set channel n occupied */
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XSCR, TX_BIT_CHAN(chan));
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR,
+ TX_BIT_CHAN(chan));
/* unmask 'tx channel free' interrupt */
- stm32_ipcc_clr_bits(ipcc->reg_proc + IPCC_XMR, TX_BIT_CHAN(chan));
+ stm32_ipcc_clr_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
+ TX_BIT_CHAN(chan));
return 0;
}
@@ -163,7 +176,8 @@ static int stm32_ipcc_startup(struct mbox_chan *link)
}
/* unmask 'rx channel occupied' interrupt */
- stm32_ipcc_clr_bits(ipcc->reg_proc + IPCC_XMR, RX_BIT_CHAN(chan));
+ stm32_ipcc_clr_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
+ RX_BIT_CHAN(chan));
return 0;
}
@@ -175,7 +189,7 @@ static void stm32_ipcc_shutdown(struct mbox_chan *link)
controller);
/* mask rx/tx interrupt */
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XMR,
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
RX_BIT_CHAN(chan) | TX_BIT_CHAN(chan));
clk_disable_unprepare(ipcc->clk);
@@ -208,6 +222,8 @@ static int stm32_ipcc_probe(struct platform_device *pdev)
if (!ipcc)
return -ENOMEM;
+ spin_lock_init(&ipcc->lock);
+
/* proc_id */
if (of_property_read_u32(np, "st,proc-id", &ipcc->proc_id)) {
dev_err(dev, "Missing st,proc-id\n");
@@ -240,9 +256,11 @@ static int stm32_ipcc_probe(struct platform_device *pdev)
/* irq */
for (i = 0; i < IPCC_IRQ_NUM; i++) {
- ipcc->irqs[i] = of_irq_get_byname(dev->of_node, irq_name[i]);
+ ipcc->irqs[i] = platform_get_irq_byname(pdev, irq_name[i]);
if (ipcc->irqs[i] < 0) {
- dev_err(dev, "no IRQ specified %s\n", irq_name[i]);
+ if (ipcc->irqs[i] != -EPROBE_DEFER)
+ dev_err(dev, "no IRQ specified %s\n",
+ irq_name[i]);
ret = ipcc->irqs[i];
goto err_clk;
}
@@ -257,15 +275,17 @@ static int stm32_ipcc_probe(struct platform_device *pdev)
}
/* mask and enable rx/tx irq */
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XMR,
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR,
RX_BIT_MASK | TX_BIT_MASK);
- stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XCR, XCR_RXOIE | XCR_TXOIE);
+ stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XCR,
+ XCR_RXOIE | XCR_TXOIE);
/* wakeup */
if (of_property_read_bool(np, "wakeup-source")) {
- ipcc->wkp = of_irq_get_byname(dev->of_node, "wakeup");
+ ipcc->wkp = platform_get_irq_byname(pdev, "wakeup");
if (ipcc->wkp < 0) {
- dev_err(dev, "could not get wakeup IRQ\n");
+ if (ipcc->wkp != -EPROBE_DEFER)
+ dev_err(dev, "could not get wakeup IRQ\n");
ret = ipcc->wkp;
goto err_clk;
}
@@ -276,8 +296,8 @@ static int stm32_ipcc_probe(struct platform_device *pdev)
@@ -296,8 +296,8 @@ static int stm32_ipcc_probe(struct platform_device *pdev)
dev_err(dev, "Failed to set wake up irq\n");
goto err_init_wkp;
}
@ -1094,6 +998,169 @@ index 533b0da..eaf4ea4 100644
}
/* mailbox controller */
diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
index ea57f3d..c119aa1 100644
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -95,10 +95,6 @@ static inline void irq_mark_irq(unsigned int irq) { }
extern void irq_mark_irq(unsigned int irq);
#endif
-extern int __irq_get_irqchip_state(struct irq_data *data,
- enum irqchip_irq_state which,
- bool *state);
-
extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr);
irqreturn_t __handle_irq_event_percpu(struct irq_desc *desc, unsigned int *flags);
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 23bcfa7..f8214bb 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -35,9 +35,8 @@ static int __init setup_forced_irqthreads(char *arg)
early_param("threadirqs", setup_forced_irqthreads);
#endif
-static void __synchronize_hardirq(struct irq_desc *desc, bool sync_chip)
+static void __synchronize_hardirq(struct irq_desc *desc)
{
- struct irq_data *irqd = irq_desc_get_irq_data(desc);
bool inprogress;
do {
@@ -53,20 +52,6 @@ static void __synchronize_hardirq(struct irq_desc *desc, bool sync_chip)
/* Ok, that indicated we're done: double-check carefully. */
raw_spin_lock_irqsave(&desc->lock, flags);
inprogress = irqd_irq_inprogress(&desc->irq_data);
-
- /*
- * If requested and supported, check at the chip whether it
- * is in flight at the hardware level, i.e. already pending
- * in a CPU and waiting for service and acknowledge.
- */
- if (!inprogress && sync_chip) {
- /*
- * Ignore the return code. inprogress is only updated
- * when the chip supports it.
- */
- __irq_get_irqchip_state(irqd, IRQCHIP_STATE_ACTIVE,
- &inprogress);
- }
raw_spin_unlock_irqrestore(&desc->lock, flags);
/* Oops, that failed? */
@@ -89,18 +74,13 @@ static void __synchronize_hardirq(struct irq_desc *desc, bool sync_chip)
* Returns: false if a threaded handler is active.
*
* This function may be called - with care - from IRQ context.
- *
- * It does not check whether there is an interrupt in flight at the
- * hardware level, but not serviced yet, as this might deadlock when
- * called with interrupts disabled and the target CPU of the interrupt
- * is the current CPU.
*/
bool synchronize_hardirq(unsigned int irq)
{
struct irq_desc *desc = irq_to_desc(irq);
if (desc) {
- __synchronize_hardirq(desc, false);
+ __synchronize_hardirq(desc);
return !atomic_read(&desc->threads_active);
}
@@ -118,17 +98,13 @@ EXPORT_SYMBOL(synchronize_hardirq);
*
* Can only be called from preemptible code as it might sleep when
* an interrupt thread is associated to @irq.
- *
- * It optionally makes sure (when the irq chip supports that method)
- * that the interrupt is not pending in any CPU and waiting for
- * service.
*/
void synchronize_irq(unsigned int irq)
{
struct irq_desc *desc = irq_to_desc(irq);
if (desc) {
- __synchronize_hardirq(desc, true);
+ __synchronize_hardirq(desc);
/*
* We made sure that no hardirq handler is
* running. Now verify that no threaded handlers are
@@ -1674,12 +1650,8 @@ static struct irqaction *__free_irq(struct irq_desc *desc, void *dev_id)
unregister_handler_proc(irq, action);
- /*
- * Make sure it's not being used on another CPU and if the chip
- * supports it also make sure that there is no (not yet serviced)
- * interrupt in flight at the hardware level.
- */
- __synchronize_hardirq(desc, true);
+ /* Make sure it's not being used on another CPU: */
+ synchronize_hardirq(irq);
#ifdef CONFIG_DEBUG_SHIRQ
/*
@@ -2212,28 +2184,6 @@ int __request_percpu_irq(unsigned int irq, irq_handler_t handler,
}
EXPORT_SYMBOL_GPL(__request_percpu_irq);
-int __irq_get_irqchip_state(struct irq_data *data, enum irqchip_irq_state which,
- bool *state)
-{
- struct irq_chip *chip;
- int err = -EINVAL;
-
- do {
- chip = irq_data_get_irq_chip(data);
- if (chip->irq_get_irqchip_state)
- break;
-#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
- data = data->parent_data;
-#else
- data = NULL;
-#endif
- } while (data);
-
- if (data)
- err = chip->irq_get_irqchip_state(data, which, state);
- return err;
-}
-
/**
* irq_get_irqchip_state - returns the irqchip state of a interrupt.
* @irq: Interrupt line that is forwarded to a VM
@@ -2252,6 +2202,7 @@ int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
{
struct irq_desc *desc;
struct irq_data *data;
+ struct irq_chip *chip;
unsigned long flags;
int err = -EINVAL;
@@ -2261,7 +2212,19 @@ int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
data = irq_desc_get_irq_data(desc);
- err = __irq_get_irqchip_state(data, which, state);
+ do {
+ chip = irq_data_get_irq_chip(data);
+ if (chip->irq_get_irqchip_state)
+ break;
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+ data = data->parent_data;
+#else
+ data = NULL;
+#endif
+ } while (data);
+
+ if (data)
+ err = chip->irq_get_irqchip_state(data, which, state);
irq_put_desc_busunlock(desc, flags);
return err;
--
2.7.4

2223
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0012-ARM-stm32mp1-r2-MEDIA.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0013-ARM-stm32mp1-r3-MEDIA.patch
View File

File diff suppressed because it is too large Load Diff

984
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0013-ARM-stm32mp1-r2-MFD.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0014-ARM-stm32mp1-r3-MFD.patch
View File

File diff suppressed because it is too large Load Diff

246
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0014-ARM-stm32mp1-r2-MMC-MTD.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0015-ARM-stm32mp1-r3-MMC-MTD.patch
View File

@ -1,22 +1,22 @@
From ae70b2603fb4622389c5b26d5214a2f6879714e9 Mon Sep 17 00:00:00 2001
From 1549511bd55cdcfccdaded1d1e1b0e7e68adc8bb Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:02 +0200
Subject: [PATCH 14/30] ARM stm32mp1 r2 MMC MTD
Date: Fri, 8 Nov 2019 16:52:42 +0100
Subject: [PATCH 15/31] ARM stm32mp1 r3 MMC MTD
---
drivers/mmc/host/Kconfig | 10 +
drivers/mmc/host/Makefile | 1 +
drivers/mmc/host/mmci.c | 900 ++++++++++----
drivers/mmc/host/mmci.h | 195 +++-
drivers/mmc/host/mmci.c | 862 ++++++++++----
drivers/mmc/host/mmci.h | 189 ++-
drivers/mmc/host/mmci_qcom_dml.c | 17 +-
drivers/mmc/host/mmci_stm32_sdmmc.c | 429 +++++++
drivers/mtd/nand/raw/Kconfig | 9 +
drivers/mtd/nand/raw/Makefile | 1 +
drivers/mtd/nand/raw/stm32_fmc2_nand.c | 2005 ++++++++++++++++++++++++++++++++
drivers/mtd/nand/raw/stm32_fmc2_nand.c | 2041 ++++++++++++++++++++++++++++++++
drivers/mtd/spi-nor/Kconfig | 7 -
drivers/mtd/spi-nor/Makefile | 1 -
drivers/mtd/spi-nor/stm32-quadspi.c | 720 ------------
12 files changed, 3277 insertions(+), 1018 deletions(-)
drivers/mtd/spi-nor/stm32-quadspi.c | 720 -----------
12 files changed, 3285 insertions(+), 1002 deletions(-)
create mode 100644 drivers/mmc/host/mmci_stm32_sdmmc.c
create mode 100644 drivers/mtd/nand/raw/stm32_fmc2_nand.c
delete mode 100644 drivers/mtd/spi-nor/stm32-quadspi.c
@ -55,7 +55,7 @@ index ce8398e..f14410f 100644
obj-$(CONFIG_MMC_MXC) += mxcmmc.o
obj-$(CONFIG_MMC_MXS) += mxs-mmc.o
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 1841d250..0b7b607 100644
index fa6268c..1c6b5d0 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -14,6 +14,7 @@
@ -619,17 +619,17 @@ index 1841d250..0b7b607 100644
{
const char *rxname, *txname;
+ struct mmci_dmae_priv *dmae;
- host->dma_rx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "rx");
- host->dma_tx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "tx");
+
+ dmae = devm_kzalloc(mmc_dev(host->mmc), sizeof(*dmae), GFP_KERNEL);
+ if (!dmae)
+ return -ENOMEM;
- host->dma_rx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "rx");
- host->dma_tx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "tx");
+ host->dma_priv = dmae;
- /* initialize pre request cookie */
- host->next_data.cookie = 1;
+ host->dma_priv = dmae;
+
+ dmae->rx_channel = dma_request_slave_channel(mmc_dev(host->mmc),
+ "rx");
+ dmae->tx_channel = dma_request_slave_channel(mmc_dev(host->mmc),
@ -740,7 +740,7 @@ index 1841d250..0b7b607 100644
-static void mmci_dma_finalize(struct mmci_host *host, struct mmc_data *data)
+void mmci_dmae_error(struct mmci_host *host)
+{
{
+ struct mmci_dmae_priv *dmae = host->dma_priv;
+
+ if (!dma_inprogress(host))
@ -757,7 +757,7 @@ index 1841d250..0b7b607 100644
+}
+
+void mmci_dmae_finalize(struct mmci_host *host, struct mmc_data *data)
{
+{
+ struct mmci_dmae_priv *dmae = host->dma_priv;
u32 status;
int i;
@ -844,20 +844,20 @@ index 1841d250..0b7b607 100644
/* No job were prepared thus do it now. */
- return __mmci_dma_prep_data(host, data, &host->dma_current,
- &host->dma_desc_current);
-}
-
-static inline int mmci_dma_prep_next(struct mmci_host *host,
- struct mmc_data *data)
-{
- struct mmci_host_next *nd = &host->next_data;
- return __mmci_dma_prep_data(host, data, &nd->dma_chan, &nd->dma_desc);
+ return _mmci_dmae_prep_data(host, data, &dmae->cur,
+ &dmae->desc_current);
}
-static int mmci_dma_start_data(struct mmci_host *host, unsigned int datactrl)
-static inline int mmci_dma_prep_next(struct mmci_host *host,
- struct mmc_data *data)
+int mmci_dmae_start(struct mmci_host *host, unsigned int *datactrl)
{
- struct mmci_host_next *nd = &host->next_data;
- return __mmci_dma_prep_data(host, data, &nd->dma_chan, &nd->dma_desc);
-}
-
-static int mmci_dma_start_data(struct mmci_host *host, unsigned int datactrl)
-{
- int ret;
+ struct mmci_dmae_priv *dmae = host->dma_priv;
struct mmc_data *data = host->data;
@ -1149,25 +1149,7 @@ index 1841d250..0b7b607 100644
if (/*interrupt*/0)
c |= MCI_CPSM_INTERRUPT;
@@ -895,21 +1215,22 @@ static void
mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
unsigned int status)
{
+ unsigned int status_err;
+
/* Make sure we have data to handle */
if (!data)
return;
/* First check for errors */
- if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT |
- host->variant->start_err |
- MCI_TXUNDERRUN | MCI_RXOVERRUN)) {
+ status_err = status & (host->variant->start_err |
+ MCI_DATACRCFAIL | MCI_DATATIMEOUT |
+ MCI_TXUNDERRUN | MCI_RXOVERRUN);
+
+ if (status_err) {
@@ -910,10 +1230,7 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
u32 remain, success;
/* Terminate the DMA transfer */
@ -1179,7 +1161,7 @@ index 1841d250..0b7b607 100644
/*
* Calculate how far we are into the transfer. Note that
@@ -918,22 +1239,26 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
@@ -922,8 +1239,12 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
* can be as much as a FIFO-worth of data ahead. This
* matters for FIFO overruns only.
*/
@ -1193,28 +1175,8 @@ index 1841d250..0b7b607 100644
+ }
dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n",
- status, success);
- if (status & MCI_DATACRCFAIL) {
+ status_err, success);
+ if (status_err & MCI_DATACRCFAIL) {
/* Last block was not successful */
success -= 1;
data->error = -EILSEQ;
- } else if (status & MCI_DATATIMEOUT) {
+ } else if (status_err & MCI_DATATIMEOUT) {
data->error = -ETIMEDOUT;
- } else if (status & MCI_STARTBITERR) {
+ } else if (status_err & MCI_STARTBITERR) {
data->error = -ECOMM;
- } else if (status & MCI_TXUNDERRUN) {
+ } else if (status_err & MCI_TXUNDERRUN) {
data->error = -EIO;
- } else if (status & MCI_RXOVERRUN) {
+ } else if (status_err & MCI_RXOVERRUN) {
if (success > host->variant->fifosize)
success -= host->variant->fifosize;
else
@@ -947,19 +1272,18 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
status_err, success);
@@ -951,19 +1272,18 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n");
if (status & MCI_DATAEND || data->error) {
@ -1238,7 +1200,7 @@ index 1841d250..0b7b607 100644
}
}
@@ -968,11 +1292,13 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
@@ -972,11 +1292,13 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
unsigned int status)
{
void __iomem *base = host->base;
@ -1253,7 +1215,7 @@ index 1841d250..0b7b607 100644
sbc = (cmd == host->mrq->sbc);
/*
@@ -980,18 +1306,21 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
@@ -984,18 +1306,21 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
* handling. Note that we tag on any latent IRQs postponed
* due to waiting for busy status.
*/
@ -1279,7 +1241,7 @@ index 1841d250..0b7b607 100644
(status & host->variant->busy_detect_flag))
return;
@@ -1001,9 +1330,9 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
@@ -1005,9 +1330,9 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
* that the special busy status bit is still set before
* proceeding.
*/
@ -1292,7 +1254,7 @@ index 1841d250..0b7b607 100644
/* Clear the busy start IRQ */
writel(host->variant->busy_detect_mask,
@@ -1045,6 +1374,9 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
@@ -1049,6 +1374,9 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
cmd->error = -ETIMEDOUT;
} else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
cmd->error = -EILSEQ;
@ -1302,7 +1264,7 @@ index 1841d250..0b7b607 100644
} else {
cmd->resp[0] = readl(base + MMCIRESPONSE0);
cmd->resp[1] = readl(base + MMCIRESPONSE1);
@@ -1055,16 +1387,15 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
@@ -1059,16 +1387,15 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
if ((!sbc && !cmd->data) || cmd->error) {
if (host->data) {
/* Terminate the DMA transfer */
@ -1323,22 +1285,7 @@ index 1841d250..0b7b607 100644
mmci_start_data(host, cmd->data);
}
}
@@ -1252,11 +1583,14 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
static irqreturn_t mmci_irq(int irq, void *dev_id)
{
struct mmci_host *host = dev_id;
+ bool busy_resp;
u32 status;
int ret = 0;
spin_lock(&host->lock);
+ busy_resp = host->cmd ? !!(host->cmd->flags & MMC_RSP_BUSY) : false;
+
do {
status = readl(host->base + MMCISTATUS);
@@ -1264,7 +1598,7 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
@@ -1268,7 +1595,7 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
if (status & host->mask1_reg)
mmci_pio_irq(irq, dev_id);
@ -1347,7 +1294,7 @@ index 1841d250..0b7b607 100644
}
/*
@@ -1277,7 +1611,8 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
@@ -1281,7 +1608,8 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
* to make sure that both start and end interrupts are always
* cleared one after the other.
*/
@ -1357,26 +1304,7 @@ index 1841d250..0b7b607 100644
if (host->variant->busy_detect)
writel(status & ~host->variant->busy_detect_mask,
host->base + MMCICLEAR);
@@ -1295,12 +1630,16 @@ static irqreturn_t mmci_irq(int irq, void *dev_id)
}
/*
- * Don't poll for busy completion in irq context.
+ * Don't poll for:
+ * -busy completion in irq context.
+ * -cmd without busy response check like cmd11
*/
- if (host->variant->busy_detect && host->busy_status)
+ if (host->variant->busy_detect &&
+ (!busy_resp || host->busy_status))
status &= ~host->variant->busy_detect_flag;
ret = 1;
+
} while (status);
spin_unlock(&host->lock);
@@ -1328,7 +1667,8 @@ static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
@@ -1333,7 +1661,8 @@ static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
if (mrq->data)
mmci_get_next_data(host, mrq->data);
@ -1386,7 +1314,7 @@ index 1841d250..0b7b607 100644
mmci_start_data(host, mrq->data);
if (mrq->sbc)
@@ -1438,8 +1778,16 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
@@ -1443,8 +1772,16 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
spin_lock_irqsave(&host->lock, flags);
@ -1405,7 +1333,7 @@ index 1841d250..0b7b607 100644
mmci_reg_delay(host);
spin_unlock_irqrestore(&host->lock, flags);
@@ -1462,6 +1810,8 @@ static int mmci_get_cd(struct mmc_host *mmc)
@@ -1467,6 +1804,8 @@ static int mmci_get_cd(struct mmc_host *mmc)
static int mmci_sig_volt_switch(struct mmc_host *mmc, struct mmc_ios *ios)
{
@ -1414,7 +1342,7 @@ index 1841d250..0b7b607 100644
int ret = 0;
if (!IS_ERR(mmc->supply.vqmmc)) {
@@ -1474,6 +1824,28 @@ static int mmci_sig_volt_switch(struct mmc_host *mmc, struct mmc_ios *ios)
@@ -1479,6 +1818,28 @@ static int mmci_sig_volt_switch(struct mmc_host *mmc, struct mmc_ios *ios)
case MMC_SIGNAL_VOLTAGE_180:
ret = regulator_set_voltage(mmc->supply.vqmmc,
1700000, 1950000);
@ -1443,7 +1371,7 @@ index 1841d250..0b7b607 100644
break;
case MMC_SIGNAL_VOLTAGE_120:
ret = regulator_set_voltage(mmc->supply.vqmmc,
@@ -1488,6 +1860,16 @@ static int mmci_sig_volt_switch(struct mmc_host *mmc, struct mmc_ios *ios)
@@ -1493,6 +1854,16 @@ static int mmci_sig_volt_switch(struct mmc_host *mmc, struct mmc_ios *ios)
return ret;
}
@ -1460,7 +1388,7 @@ index 1841d250..0b7b607 100644
static struct mmc_host_ops mmci_ops = {
.request = mmci_request,
.pre_req = mmci_pre_request,
@@ -1496,6 +1878,7 @@ static struct mmc_host_ops mmci_ops = {
@@ -1501,6 +1872,7 @@ static struct mmc_host_ops mmci_ops = {
.get_ro = mmc_gpio_get_ro,
.get_cd = mmci_get_cd,
.start_signal_voltage_switch = mmci_sig_volt_switch,
@ -1468,7 +1396,7 @@ index 1841d250..0b7b607 100644
};
static int mmci_of_parse(struct device_node *np, struct mmc_host *mmc)
@@ -1518,6 +1901,12 @@ static int mmci_of_parse(struct device_node *np, struct mmc_host *mmc)
@@ -1523,6 +1895,12 @@ static int mmci_of_parse(struct device_node *np, struct mmc_host *mmc)
host->pwr_reg_add |= MCI_ST_CMDDIREN;
if (of_get_property(np, "st,sig-pin-fbclk", NULL))
host->pwr_reg_add |= MCI_ST_FBCLKEN;
@ -1481,7 +1409,7 @@ index 1841d250..0b7b607 100644
if (of_get_property(np, "mmc-cap-mmc-highspeed", NULL))
mmc->caps |= MMC_CAP_MMC_HIGHSPEED;
@@ -1644,6 +2033,8 @@ static int mmci_probe(struct amba_device *dev,
@@ -1649,6 +2027,8 @@ static int mmci_probe(struct amba_device *dev,
*/
if (variant->st_clkdiv)
mmc->f_min = DIV_ROUND_UP(host->mclk, 257);
@ -1490,7 +1418,7 @@ index 1841d250..0b7b607 100644
else if (variant->explicit_mclk_control)
mmc->f_min = clk_round_rate(host->clk, 100000);
else
@@ -1665,6 +2056,12 @@ static int mmci_probe(struct amba_device *dev,
@@ -1670,6 +2050,12 @@ static int mmci_probe(struct amba_device *dev,
dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
@ -1503,7 +1431,7 @@ index 1841d250..0b7b607 100644
/* Get regulators and the supported OCR mask */
ret = mmc_regulator_get_supply(mmc);
if (ret)
@@ -1675,12 +2072,7 @@ static int mmci_probe(struct amba_device *dev,
@@ -1680,12 +2066,7 @@ static int mmci_probe(struct amba_device *dev,
else if (plat->ocr_mask)
dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n");
@ -1517,7 +1445,7 @@ index 1841d250..0b7b607 100644
/* We support these capabilities. */
mmc->caps |= MMC_CAP_CMD23;
@@ -1689,6 +2081,8 @@ static int mmci_probe(struct amba_device *dev,
@@ -1694,6 +2075,8 @@ static int mmci_probe(struct amba_device *dev,
* Enable busy detection.
*/
if (variant->busy_detect) {
@ -1526,7 +1454,7 @@ index 1841d250..0b7b607 100644
mmci_ops.card_busy = mmci_card_busy;
/*
* Not all variants have a flag to enable busy detection
@@ -1698,7 +2092,18 @@ static int mmci_probe(struct amba_device *dev,
@@ -1703,7 +2086,18 @@ static int mmci_probe(struct amba_device *dev,
mmci_write_datactrlreg(host,
host->variant->busy_dpsm_flag);
mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
@ -1546,7 +1474,7 @@ index 1841d250..0b7b607 100644
}
mmc->ops = &mmci_ops;
@@ -1727,13 +2132,13 @@ static int mmci_probe(struct amba_device *dev,
@@ -1732,13 +2126,13 @@ static int mmci_probe(struct amba_device *dev,
/*
* Block size can be up to 2048 bytes, but must be a power of two.
*/
@ -1562,7 +1490,7 @@ index 1841d250..0b7b607 100644
spin_lock_init(&host->lock);
@@ -1749,30 +2154,16 @@ static int mmci_probe(struct amba_device *dev,
@@ -1754,30 +2148,16 @@ static int mmci_probe(struct amba_device *dev,
* - not using DT but using a descriptor table, or
* - using a table of descriptors ALONGSIDE DT, or
* look up these descriptors named "cd" and "wp" right here, fail
@ -1598,26 +1526,7 @@ index 1841d250..0b7b607 100644
}
ret = devm_request_irq(&dev->dev, dev->irq[0], mmci_irq, IRQF_SHARED,
@@ -1789,7 +2180,7 @@ static int mmci_probe(struct amba_device *dev,
goto clk_disable;
}
- writel(MCI_IRQENABLE, host->base + MMCIMASK0);
+ writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0);
amba_set_drvdata(dev, mmc);
@@ -1876,7 +2267,8 @@ static void mmci_restore(struct mmci_host *host)
writel(host->datactrl_reg, host->base + MMCIDATACTRL);
writel(host->pwr_reg, host->base + MMCIPOWER);
}
- writel(MCI_IRQENABLE, host->base + MMCIMASK0);
+ writel(MCI_IRQENABLE | host->variant->start_err,
+ host->base + MMCIMASK0);
mmci_reg_delay(host);
spin_unlock_irqrestore(&host->lock, flags);
@@ -1971,6 +2363,16 @@ static const struct amba_id mmci_ids[] = {
@@ -1977,6 +2357,16 @@ static const struct amba_id mmci_ids[] = {
.mask = 0x00ffffff,
.data = &variant_stm32,
},
@ -1635,7 +1544,7 @@ index 1841d250..0b7b607 100644
{
.id = 0x00051180,
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index 517591d..e10093e 100644
index 613d37a..e10093e 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -23,6 +23,14 @@
@ -1745,12 +1654,9 @@ index 517591d..e10093e 100644
+#define MMCI_STM32_IDMABAR 0x68
+
#define MCI_IRQENABLE \
- (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \
- MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \
- MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_STARTBITERRMASK)
+ (MCI_CMDCRCFAILMASK | MCI_DATACRCFAILMASK | MCI_CMDTIMEOUTMASK | \
+ MCI_DATATIMEOUTMASK | MCI_TXUNDERRUNMASK | MCI_RXOVERRUNMASK | \
+ MCI_CMDRESPENDMASK | MCI_CMDSENTMASK)
(MCI_CMDCRCFAILMASK | MCI_DATACRCFAILMASK | MCI_CMDTIMEOUTMASK | \
MCI_DATATIMEOUTMASK | MCI_TXUNDERRUNMASK | MCI_RXOVERRUNMASK | \
MCI_CMDRESPENDMASK | MCI_CMDSENTMASK)
/* These interrupts are directed to IRQ1 when two IRQ lines are available */
-#define MCI_IRQ1MASK \
@ -2486,10 +2392,10 @@ index d5a5f98..4ef7559 100644
nand-objs += nand_amd.o
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
new file mode 100644
index 0000000..aaaad34
index 0000000..ce1a15a
--- /dev/null
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -0,0 +1,2005 @@
@@ -0,0 +1,2041 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) STMicroelectronics 2018
@ -2543,6 +2449,8 @@ index 0000000..aaaad34
+#define FMC2_PMEM 0x88
+#define FMC2_PATT 0x8c
+#define FMC2_HECCR 0x94
+#define FMC2_ISR 0x184
+#define FMC2_ICR 0x188
+#define FMC2_CSQCR 0x200
+#define FMC2_CSQCFGR1 0x204
+#define FMC2_CSQCFGR2 0x208
@ -2608,6 +2516,12 @@ index 0000000..aaaad34
+#define FMC2_PATT_ATTHIZ(x) (((x) & 0xff) << 24)
+#define FMC2_PATT_DEFAULT 0x0a0a0a0a
+
+/* Register: FMC2_ISR */
+#define FMC2_ISR_IHLF BIT(1)
+
+/* Register: FMC2_ICR */
+#define FMC2_ICR_CIHLF BIT(1)
+
+/* Register: FMC2_CSQCR */
+#define FMC2_CSQCR_CSQSTART BIT(0)
+
@ -3653,6 +3567,34 @@ index 0000000..aaaad34
+ stm32_fmc2_set_buswidth_16(fmc2, true);
+}
+
+static int stm32_fmc2_waitrdy(struct nand_chip *chip, unsigned long timeout_ms)
+{
+ struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+ const struct nand_sdr_timings *timings;
+ int ret;
+ u32 isr, sr;
+
+ /* Check if there is no pending requests to the NAND flash */
+ ret = readl_relaxed_poll_timeout(fmc2->io_base + FMC2_SR,
+ sr, sr & FMC2_SR_NWRF, 1, 1000);
+ if (ret) {
+ dev_err(fmc2->dev, "Waitrdy timeout\n");
+ return ret;
+ }
+
+ /* Wait tWB before R/B# signal is low */
+ timings = nand_get_sdr_timings(&chip->data_interface);
+ ndelay(PSEC_TO_NSEC(timings->tWB_max));
+
+ /* R/B# signal is low, clear high level flag */
+ writel_relaxed(FMC2_ICR_CIHLF, fmc2->io_base + FMC2_ICR);
+
+ /* Wait R/B# signal is high */
+ return readl_relaxed_poll_timeout(fmc2->io_base + FMC2_ISR,
+ isr, isr & FMC2_ISR_IHLF,
+ 1, 1000 * timeout_ms);
+}
+
+static int stm32_fmc2_exec_op(struct nand_chip *chip,
+ const struct nand_operation *op,
+ bool check_only)
@ -3693,8 +3635,8 @@ index 0000000..aaaad34
+ break;
+
+ case NAND_OP_WAITRDY_INSTR:
+ ret = nand_soft_waitrdy(chip,
+ instr->ctx.waitrdy.timeout_ms);
+ ret = stm32_fmc2_waitrdy(chip,
+ instr->ctx.waitrdy.timeout_ms);
+ break;
+ }
+ }

57
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0015-ARM-stm32mp1-r2-NET.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0016-ARM-stm32mp1-r3-NET.patch
View File

@ -1,20 +1,34 @@
From edca8bc73b6a7e2057b821cc41e68fe3d7c0bb03 Mon Sep 17 00:00:00 2001
From 61b384e5eaed6c1ef9342e7216ffd2376e0f611d Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:02 +0200
Subject: [PATCH 15/30] ARM stm32mp1 r2 NET
Date: Fri, 8 Nov 2019 16:52:43 +0100
Subject: [PATCH 16/31] ARM stm32mp1 r3 NET
---
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 166 +++++++++++++++++----
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 167 +++++++++++++++++----
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 45 +++++-
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +
.../wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c | 6 +
.../net/wireless/broadcom/brcm80211/brcmfmac/pno.c | 5 +
.../net/wireless/broadcom/brcm80211/brcmutil/d11.c | 3 -
7 files changed, 189 insertions(+), 41 deletions(-)
8 files changed, 191 insertions(+), 42 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index b069b3a..272b9ca6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -261,7 +261,7 @@ struct stmmac_safety_stats {
#define STMMAC_COAL_TX_TIMER 1000
#define STMMAC_MAX_COAL_TX_TICK 100000
#define STMMAC_TX_MAX_FRAMES 256
-#define STMMAC_TX_FRAMES 1
+#define STMMAC_TX_FRAMES 25
/* Packets types */
enum packets_types {
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
index 7e2e79d..6e260e9 100644
index 7e2e79d..dd45026 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -25,9 +25,24 @@
@ -178,13 +192,13 @@ index 7e2e79d..6e260e9 100644
return regmap_update_bits(dwmac->regmap, reg,
dwmac->ops->syscfg_eth_mask, val);
}
@@ -232,35 +304,64 @@ static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
@@ -232,35 +304,65 @@ static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
static int stm32mp1_parse_data(struct stm32_dwmac *dwmac,
struct device *dev)
{
+ struct platform_device *pdev = to_platform_device(dev);
struct device_node *np = dev->of_node;
+ int err = 0;
+ int err;
- dwmac->int_phyclk = of_property_read_bool(np, "st,int-phyclk");
+ /* Gigabit Ethernet 125MHz clock selection. */
@ -231,6 +245,7 @@ index 7e2e79d..6e260e9 100644
}
- return 0;
+ err = 0;
+ /* Get IRQ information early to have an ability to ask for deferred
+ * probe if needed before we went too far with resource allocation.
+ */
@ -257,7 +272,7 @@ index 7e2e79d..6e260e9 100644
}
static int stm32_dwmac_probe(struct platform_device *pdev)
@@ -326,9 +427,15 @@ static int stm32_dwmac_remove(struct platform_device *pdev)
@@ -326,9 +428,15 @@ static int stm32_dwmac_remove(struct platform_device *pdev)
struct net_device *ndev = platform_get_drvdata(pdev);
struct stmmac_priv *priv = netdev_priv(ndev);
int ret = stmmac_dvr_remove(&pdev->dev);
@ -273,7 +288,7 @@ index 7e2e79d..6e260e9 100644
return ret;
}
@@ -341,8 +448,9 @@ static int stm32mp1_suspend(struct stm32_dwmac *dwmac)
@@ -341,8 +449,9 @@ static int stm32mp1_suspend(struct stm32_dwmac *dwmac)
return ret;
clk_disable_unprepare(dwmac->clk_tx);
@ -299,7 +314,7 @@ index 49f5687..5b35071 100644
if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
break;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 50c0082..1df9027 100644
index 014fe93..ccb512f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -2713,6 +2713,8 @@ static int stmmac_release(struct net_device *dev)
@ -320,7 +335,7 @@ index 50c0082..1df9027 100644
for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
del_timer_sync(&priv->tx_queue[chan].txtimer);
@@ -4485,14 +4485,13 @@ int stmmac_suspend(struct device *dev)
@@ -4501,14 +4501,13 @@ int stmmac_suspend(struct device *dev)
if (!ndev || !netif_running(ndev))
return 0;
@ -337,7 +352,7 @@ index 50c0082..1df9027 100644
stmmac_disable_all_queues(priv);
/* Stop TX/RX DMA */
@@ -4514,6 +4513,10 @@ int stmmac_suspend(struct device *dev)
@@ -4532,6 +4531,10 @@ int stmmac_suspend(struct device *dev)
priv->oldlink = false;
priv->speed = SPEED_UNKNOWN;
priv->oldduplex = DUPLEX_UNKNOWN;
@ -348,7 +363,7 @@ index 50c0082..1df9027 100644
return 0;
}
EXPORT_SYMBOL_GPL(stmmac_suspend);
@@ -4554,6 +4557,7 @@ int stmmac_resume(struct device *dev)
@@ -4572,6 +4575,7 @@ int stmmac_resume(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
struct stmmac_priv *priv = netdev_priv(ndev);
@ -356,7 +371,14 @@ index 50c0082..1df9027 100644
if (!netif_running(ndev))
return 0;
@@ -4585,7 +4589,28 @@ int stmmac_resume(struct device *dev)
@@ -4601,11 +4605,32 @@ int stmmac_resume(struct device *dev)
netif_device_attach(ndev);
+ if (ndev->phydev)
+ phy_start(ndev->phydev);
+
mutex_lock(&priv->lock);
stmmac_reset_queues_param(priv);
@ -380,13 +402,10 @@ index 50c0082..1df9027 100644
+ __func__);
+ goto init_error;
+ }
+
+ if (ndev->phydev)
+ phy_start(ndev->phydev);
stmmac_hw_setup(ndev, false);
stmmac_init_tx_coalesce(priv);
@@ -4597,10 +4622,14 @@ int stmmac_resume(struct device *dev)
@@ -4617,10 +4642,14 @@ int stmmac_resume(struct device *dev)
mutex_unlock(&priv->lock);

66
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0016-ARM-stm32mp1-r2-NVMEM.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0017-ARM-stm32mp1-r3-NVMEM.patch
View File

@ -1,15 +1,15 @@
From 7a1e0bedb3066a32ff522e25daacd490d306ea40 Mon Sep 17 00:00:00 2001
From a658fa1ee69e4b233cde37442c25523238b0d001 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:03 +0200
Subject: [PATCH 16/30] ARM stm32mp1 r2 NVMEM
Date: Fri, 8 Nov 2019 16:52:43 +0100
Subject: [PATCH 17/31] ARM stm32mp1 r3 NVMEM
---
drivers/nvmem/Kconfig | 10 ++
drivers/nvmem/Makefile | 2 +
drivers/nvmem/core.c | 37 ++++++++
drivers/nvmem/core.c | 74 +++++++++++++++
drivers/nvmem/stm32-romem.c | 203 +++++++++++++++++++++++++++++++++++++++++
include/linux/nvmem-consumer.h | 7 ++
5 files changed, 259 insertions(+)
include/linux/nvmem-consumer.h | 14 +++
5 files changed, 303 insertions(+)
create mode 100644 drivers/nvmem/stm32-romem.c
diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
@ -47,10 +47,10 @@ index 4e8c616..e85c946 100644
obj-$(CONFIG_UNIPHIER_EFUSE) += nvmem-uniphier-efuse.o
nvmem-uniphier-efuse-y := uniphier-efuse.o
diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index 7c530c8..60dacd7 100644
index 30c0407..e5808b8f 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -1234,6 +1234,43 @@ int nvmem_cell_read_u32(struct device *dev, const char *cell_id, u32 *val)
@@ -1246,6 +1246,80 @@ int nvmem_cell_read_u32(struct device *dev, const char *cell_id, u32 *val)
EXPORT_SYMBOL_GPL(nvmem_cell_read_u32);
/**
@ -90,6 +90,43 @@ index 7c530c8..60dacd7 100644
+}
+EXPORT_SYMBOL_GPL(nvmem_cell_read_u16);
+
+/**
+ * nvmem_cell_read_u8() - Read a cell value as an u8
+ *
+ * @dev: Device that requests the nvmem cell.
+ * @cell_id: Name of nvmem cell to read.
+ * @val: pointer to output value.
+ *
+ * Return: 0 on success or negative errno.
+ */
+int nvmem_cell_read_u8(struct device *dev, const char *cell_id, u8 *val)
+{
+ struct nvmem_cell *cell;
+ void *buf;
+ size_t len;
+
+ cell = nvmem_cell_get(dev, cell_id);
+ if (IS_ERR(cell))
+ return PTR_ERR(cell);
+
+ buf = nvmem_cell_read(cell, &len);
+ if (IS_ERR(buf)) {
+ nvmem_cell_put(cell);
+ return PTR_ERR(buf);
+ }
+ if (len != sizeof(*val)) {
+ kfree(buf);
+ nvmem_cell_put(cell);
+ return -EINVAL;
+ }
+ memcpy(val, buf, sizeof(*val));
+ kfree(buf);
+ nvmem_cell_put(cell);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(nvmem_cell_read_u8);
+
+/**
* nvmem_device_cell_read() - Read a given nvmem device and cell
*
@ -304,18 +341,19 @@ index 0000000..34b388c
+MODULE_ALIAS("platform:nvmem-stm32-romem");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/nvmem-consumer.h b/include/linux/nvmem-consumer.h
index 4e85447..f303008 100644
index 4e85447..c97f1e9 100644
--- a/include/linux/nvmem-consumer.h
+++ b/include/linux/nvmem-consumer.h
@@ -39,6 +39,7 @@ void devm_nvmem_cell_put(struct device *dev, struct nvmem_cell *cell);
@@ -39,6 +39,8 @@ void devm_nvmem_cell_put(struct device *dev, struct nvmem_cell *cell);
void *nvmem_cell_read(struct nvmem_cell *cell, size_t *len);
int nvmem_cell_write(struct nvmem_cell *cell, void *buf, size_t len);
int nvmem_cell_read_u32(struct device *dev, const char *cell_id, u32 *val);
+int nvmem_cell_read_u16(struct device *dev, const char *cell_id, u16 *val);
+int nvmem_cell_read_u8(struct device *dev, const char *cell_id, u8 *val);
/* direct nvmem device read/write interface */
struct nvmem_device *nvmem_device_get(struct device *dev, const char *name);
@@ -95,6 +96,12 @@ static inline int nvmem_cell_read_u32(struct device *dev,
@@ -95,6 +97,18 @@ static inline int nvmem_cell_read_u32(struct device *dev,
return -ENOSYS;
}
@ -324,6 +362,12 @@ index 4e85447..f303008 100644
+{
+ return -ENOSYS;
+}
+
+static inline int nvmem_cell_read_u8(struct device *dev,
+ const char *cell_id, u8 *val)
+{
+ return -EOPNOTSUPP;
+}
+
static inline struct nvmem_device *nvmem_device_get(struct device *dev,
const char *name)

8
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0017-ARM-stm32mp1-r2-PERF.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0018-ARM-stm32mp1-r3-PERF.patch
View File

@ -1,7 +1,7 @@
From 34f2e1a678f0017522aeba5633b3729590b2f811 Mon Sep 17 00:00:00 2001
From: Romuald JEANNE <romuald.jeanne@st.com>
Date: Tue, 17 Sep 2019 14:27:10 +0200
Subject: [PATCH 17/30] ARM stm32mp1 r2 PERF
From 6b4eeb6fe243c0c077a9b9ce4f631a5310f7b058 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Fri, 8 Nov 2019 16:52:43 +0100
Subject: [PATCH 18/31] ARM stm32mp1 r3 PERF
---
Documentation/perf/stm32-ddr-pmu.txt | 41 +++

305
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0018-ARM-stm32mp1-r2-PHY-PINCTRL-PWM.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0019-ARM-stm32mp1-r3-PHY-PINCTRL-PWM.patch
View File

@ -1,23 +1,23 @@
From 6c5c0debff2505c77c0d9545da09ac4b311619d4 Mon Sep 17 00:00:00 2001
From 65b46b4c2bf2b5d86f210f337e1ca8471034019c Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:03 +0200
Subject: [PATCH 18/30] ARM stm32mp1 r2 PHY PINCTRL PWM
Date: Fri, 8 Nov 2019 16:52:44 +0100
Subject: [PATCH 19/31] ARM stm32mp1 r3 PHY PINCTRL PWM
---
drivers/phy/st/phy-stm32-usbphyc.c | 451 +++++++++--
drivers/pinctrl/Kconfig | 12 +
drivers/pinctrl/Kconfig | 14 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/core.c | 28 +-
drivers/pinctrl/pinctrl-stmfx.c | 832 ++++++++++++++++++++
drivers/pinctrl/stm32/pinctrl-stm32.c | 452 +++++++++--
drivers/pinctrl/stm32/pinctrl-stm32.h | 52 +-
drivers/pinctrl/pinctrl-stmfx.c | 858 +++++++++++++++++++++
drivers/pinctrl/stm32/pinctrl-stm32.c | 435 +++++++++--
drivers/pinctrl/stm32/pinctrl-stm32.h | 53 +-
drivers/pinctrl/stm32/pinctrl-stm32mp157.c | 1095 ++++++++++++++++-----------
drivers/pwm/pwm-stm32-lp.c | 44 ++
drivers/pwm/pwm-stm32-lp.c | 38 +
drivers/pwm/pwm-stm32.c | 105 ++-
drivers/pwm/sysfs.c | 12 +-
include/dt-bindings/pinctrl/stm32-pinfunc.h | 6 +
drivers/pwm/sysfs.c | 11 +
include/dt-bindings/pinctrl/stm32-pinfunc.h | 7 +
include/linux/pinctrl/pinctrl.h | 7 +
13 files changed, 2481 insertions(+), 616 deletions(-)
13 files changed, 2498 insertions(+), 605 deletions(-)
create mode 100644 drivers/pinctrl/pinctrl-stmfx.c
diff --git a/drivers/phy/st/phy-stm32-usbphyc.c b/drivers/phy/st/phy-stm32-usbphyc.c
@ -636,15 +636,17 @@ index 1255cd1..c9c3c3e 100644
};
module_platform_driver(stm32_usbphyc_driver);
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index e86752b..bbd3908 100644
index e86752b..70ea304 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -244,6 +244,18 @@ config PINCTRL_ST
@@ -244,6 +244,20 @@ config PINCTRL_ST
select PINCONF
select GPIOLIB_IRQCHIP
+config PINCTRL_STMFX
+ tristate "STMicroelectronics STMFX GPIO expander pinctrl driver"
+ depends on I2C
+ depends on OF_GPIO
+ select GENERIC_PINCONF
+ select GPIOLIB_IRQCHIP
+ select MFD_STMFX
@ -735,15 +737,15 @@ index c6ff4d5..7e747ac 100644
mutex_unlock(&pinctrldev_list_mutex);
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
new file mode 100644
index 0000000..327c00d
index 0000000..b4c232a
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -0,0 +1,832 @@
@@ -0,0 +1,858 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
+ *
+ * Copyright (C) 2018 STMicroelectronics
+ * Copyright (C) 2019 STMicroelectronics
+ * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
+ */
+#include <linux/gpio/driver.h>
@ -759,30 +761,27 @@ index 0000000..327c00d
+
+/* GPIOs expander */
+/* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
+#define STMFX_REG_GPIO_STATE 0x10 /* R */
+#define STMFX_REG_GPIO_STATE STMFX_REG_GPIO_STATE1 /* R */
+/* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
+#define STMFX_REG_GPIO_DIR 0x60 /* RW */
+#define STMFX_REG_GPIO_DIR STMFX_REG_GPIO_DIR1 /* RW */
+/* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
+#define STMFX_REG_GPIO_TYPE 0x64 /* RW */
+#define STMFX_REG_GPIO_TYPE STMFX_REG_GPIO_TYPE1 /* RW */
+/* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
+#define STMFX_REG_GPIO_PUPD 0x68 /* RW */
+#define STMFX_REG_GPIO_PUPD STMFX_REG_GPIO_PUPD1 /* RW */
+/* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
+#define STMFX_REG_GPO_SET 0x6C /* RW */
+#define STMFX_REG_GPO_SET STMFX_REG_GPO_SET1 /* RW */
+/* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
+#define STMFX_REG_GPO_CLR 0x70 /* RW */
+#define STMFX_REG_GPO_CLR STMFX_REG_GPO_CLR1 /* RW */
+/* IRQ_GPI_SRC1 0x48, IRQ_GPI_SRC2 0x49, IRQ_GPI_SRC3 0x4A */
+#define STMFX_REG_IRQ_GPI_SRC 0x48 /* RW */
+#define STMFX_REG_IRQ_GPI_SRC STMFX_REG_IRQ_GPI_SRC1 /* RW */
+/* IRQ_GPI_EVT1 0x4C, IRQ_GPI_EVT2 0x4D, IRQ_GPI_EVT3 0x4E */
+#define STMFX_REG_IRQ_GPI_EVT 0x4C /* RW */
+#define STMFX_REG_IRQ_GPI_EVT STMFX_REG_IRQ_GPI_EVT1 /* RW */
+/* IRQ_GPI_TYPE1 0x50, IRQ_GPI_TYPE2 0x51, IRQ_GPI_TYPE3 0x52 */
+#define STMFX_REG_IRQ_GPI_TYPE 0x50 /* RW */
+#define STMFX_REG_IRQ_GPI_TYPE STMFX_REG_IRQ_GPI_TYPE1 /* RW */
+/* IRQ_GPI_PENDING1 0x0C, IRQ_GPI_PENDING2 0x0D, IRQ_GPI_PENDING3 0x0E*/
+#define STMFX_REG_IRQ_GPI_PENDING 0x0C /* R */
+#define STMFX_REG_IRQ_GPI_PENDING STMFX_REG_IRQ_GPI_PENDING1 /* R */
+/* IRQ_GPI_ACK1 0x54, IRQ_GPI_ACK2 0x55, IRQ_GPI_ACK3 0x56 */
+#define STMFX_REG_IRQ_GPI_ACK 0x54 /* RW */
+
+/* STMFX_REG_IRQ_PENDING bitfields */
+#define STMFX_REG_IRQ_PENDING_GPIO BIT(0)
+#define STMFX_REG_IRQ_GPI_ACK STMFX_REG_IRQ_GPI_ACK1 /* RW */
+
+#define NR_GPIO_REGS 3
+#define NR_GPIOS_PER_REG 8
@ -957,9 +956,8 @@ index 0000000..327c00d
+ struct stmfx_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+ u32 param = pinconf_to_config_param(*config);
+ struct pinctrl_gpio_range *range;
+ int dir, type, pupd;
+ u32 arg = 0;
+ int ret;
+ int ret, dir, type, pupd;
+
+ range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin);
+ if (!range)
@ -1182,7 +1180,7 @@ index 0000000..327c00d
+ u32 reg = get_reg(data->hwirq);
+ u32 mask = get_mask(data->hwirq);
+
+ if (type & IRQ_TYPE_NONE)
+ if (type == IRQ_TYPE_NONE)
+ return -EINVAL;
+
+ if (type & IRQ_TYPE_EDGE_BOTH) {
@ -1250,6 +1248,34 @@ index 0000000..327c00d
+ mutex_unlock(&pctl->lock);
+}
+
+static int stmfx_gpio_irq_request_resources(struct irq_data *data)
+{
+ struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
+ int ret;
+
+ ret = stmfx_gpio_direction_input(&pctl->gpio_chip, data->hwirq);
+ if (ret)
+ return ret;
+
+ ret = gpiochip_lock_as_irq(&pctl->gpio_chip, data->hwirq);
+ if (ret) {
+ dev_err(pctl->dev, "Unable to lock gpio %lu as IRQ: %d\n",
+ data->hwirq, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void stmfx_gpio_irq_release_resources(struct irq_data *data)
+{
+ struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
+
+ gpiochip_unlock_as_irq(&pctl->gpio_chip, data->hwirq);
+}
+
+static void stmfx_pinctrl_irq_toggle_trigger(struct stmfx_pinctrl *pctl,
+ unsigned int offset)
+{
@ -1332,7 +1358,7 @@ index 0000000..327c00d
+
+static int stmfx_pinctrl_probe(struct platform_device *pdev)
+{
+ struct stmfx *stmfx = dev_get_platdata(&pdev->dev);
+ struct stmfx *stmfx = dev_get_drvdata(pdev->dev.parent);
+ struct device_node *np = pdev->dev.of_node;
+ struct stmfx_pinctrl *pctl;
+ u32 n;
@ -1421,6 +1447,8 @@ index 0000000..327c00d
+ pctl->irq_chip.irq_set_type = stmfx_pinctrl_irq_set_type;
+ pctl->irq_chip.irq_bus_lock = stmfx_pinctrl_irq_bus_lock;
+ pctl->irq_chip.irq_bus_sync_unlock = stmfx_pinctrl_irq_bus_sync_unlock;
+ pctl->irq_chip.irq_request_resources = stmfx_gpio_irq_request_resources;
+ pctl->irq_chip.irq_release_resources = stmfx_gpio_irq_release_resources;
+ for_each_clear_bit(n, &pctl->gpio_valid_mask, pctl->gpio_chip.ngpio)
+ clear_bit(n, pctl->gpio_chip.valid_mask);
+
@ -1450,7 +1478,7 @@ index 0000000..327c00d
+
+static int stmfx_pinctrl_remove(struct platform_device *pdev)
+{
+ struct stmfx *stmfx = dev_get_platdata(&pdev->dev);
+ struct stmfx *stmfx = dev_get_drvdata(pdev->dev.parent);
+
+ return stmfx_function_disable(stmfx,
+ STMFX_FUNC_GPIO |
@ -1572,7 +1600,7 @@ index 0000000..327c00d
+MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index a9bec6e..5b71c97 100644
index 14dfbbd..4f2676b 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -7,7 +7,9 @@
@ -1622,7 +1650,15 @@ index a9bec6e..5b71c97 100644
static const char * const stm32_gpio_functions[] = {
"gpio", "af0", "af1",
"af2", "af3", "af4",
@@ -76,6 +94,9 @@ struct stm32_gpio_bank {
@@ -58,6 +76,7 @@ static const char * const stm32_gpio_functions[] = {
"af8", "af9", "af10",
"af11", "af12", "af13",
"af14", "af15", "analog",
+ "reserved",
};
struct stm32_pinctrl_group {
@@ -76,6 +95,9 @@ struct stm32_gpio_bank {
struct irq_domain *domain;
u32 bank_nr;
u32 bank_ioport_nr;
@ -1632,7 +1668,7 @@ index a9bec6e..5b71c97 100644
};
struct stm32_pinctrl {
@@ -91,6 +112,13 @@ struct stm32_pinctrl {
@@ -91,6 +113,13 @@ struct stm32_pinctrl {
struct irq_domain *domain;
struct regmap *regmap;
struct regmap_field *irqmux[STM32_GPIO_PINS_PER_BANK];
@ -1646,7 +1682,7 @@ index a9bec6e..5b71c97 100644
};
static inline int stm32_gpio_pin(int gpio)
@@ -126,11 +154,33 @@ static inline u32 stm32_gpio_get_alt(u32 function)
@@ -126,11 +155,33 @@ static inline u32 stm32_gpio_get_alt(u32 function)
return 0;
}
@ -1680,7 +1716,7 @@ index a9bec6e..5b71c97 100644
if (!value)
offset += STM32_GPIO_PINS_PER_BANK;
@@ -300,9 +350,40 @@ static int stm32_gpio_domain_activate(struct irq_domain *d,
@@ -300,9 +351,40 @@ static int stm32_gpio_domain_activate(struct irq_domain *d,
{
struct stm32_gpio_bank *bank = d->host_data;
struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
@ -1722,7 +1758,7 @@ index a9bec6e..5b71c97 100644
}
static int stm32_gpio_domain_alloc(struct irq_domain *d,
@@ -331,6 +412,7 @@ static const struct irq_domain_ops stm32_gpio_domain_ops = {
@@ -331,6 +413,7 @@ static const struct irq_domain_ops stm32_gpio_domain_ops = {
.alloc = stm32_gpio_domain_alloc,
.free = irq_domain_free_irqs_common,
.activate = stm32_gpio_domain_activate,
@ -1730,7 +1766,7 @@ index a9bec6e..5b71c97 100644
};
/* Pinctrl functions */
@@ -352,16 +434,16 @@ stm32_pctrl_find_group_by_pin(struct stm32_pinctrl *pctl, u32 pin)
@@ -352,16 +435,19 @@ stm32_pctrl_find_group_by_pin(struct stm32_pinctrl *pctl, u32 pin)
static bool stm32_pctrl_is_function_valid(struct stm32_pinctrl *pctl,
u32 pin_num, u32 fnum)
{
@ -1747,89 +1783,14 @@ index a9bec6e..5b71c97 100644
continue;
- while (func && func->name) {
+ if (fnum == STM32_PIN_RSVD)
+ return true;
+
+ for (k = 0; k < STM32_CONFIG_NUM; k++) {
if (func->num == fnum)
return true;
func++;
@@ -410,7 +492,7 @@ static int stm32_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
unsigned int num_configs;
bool has_config = 0;
unsigned reserve = 0;
- int num_pins, num_funcs, maps_per_pin, i, err;
+ int num_pins, num_funcs, maps_per_pin, i, err = 0;
pctl = pinctrl_dev_get_drvdata(pctldev);
@@ -437,41 +519,45 @@ static int stm32_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
if (has_config && num_pins >= 1)
maps_per_pin++;
- if (!num_pins || !maps_per_pin)
- return -EINVAL;
+ if (!num_pins || !maps_per_pin) {
+ err = -EINVAL;
+ goto exit;
+ }
reserve = num_pins * maps_per_pin;
err = pinctrl_utils_reserve_map(pctldev, map,
reserved_maps, num_maps, reserve);
if (err)
- return err;
+ goto exit;
for (i = 0; i < num_pins; i++) {
err = of_property_read_u32_index(node, "pinmux",
i, &pinfunc);
if (err)
- return err;
+ goto exit;
pin = STM32_GET_PIN_NO(pinfunc);
func = STM32_GET_PIN_FUNC(pinfunc);
if (!stm32_pctrl_is_function_valid(pctl, pin, func)) {
dev_err(pctl->dev, "invalid function.\n");
- return -EINVAL;
+ err = -EINVAL;
+ goto exit;
}
grp = stm32_pctrl_find_group_by_pin(pctl, pin);
if (!grp) {
dev_err(pctl->dev, "unable to match pin %d to group\n",
pin);
- return -EINVAL;
+ err = -EINVAL;
+ goto exit;
}
err = stm32_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map,
reserved_maps, num_maps);
if (err)
- return err;
+ goto exit;
if (has_config) {
err = pinctrl_utils_add_map_configs(pctldev, map,
@@ -479,11 +565,13 @@ static int stm32_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
configs, num_configs,
PIN_MAP_TYPE_CONFIGS_GROUP);
if (err)
- return err;
+ goto exit;
}
}
- return 0;
+exit:
+ kfree(configs);
+ return err;
}
static int stm32_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
@@ -573,17 +661,27 @@ static int stm32_pmx_get_func_groups(struct pinctrl_dev *pctldev,
@@ -579,17 +665,27 @@ static int stm32_pmx_get_func_groups(struct pinctrl_dev *pctldev,
return 0;
}
@ -1859,7 +1820,7 @@ index a9bec6e..5b71c97 100644
val = readl_relaxed(bank->base + alt_offset);
val &= ~GENMASK(alt_shift + 3, alt_shift);
val |= (alt << alt_shift);
@@ -594,8 +692,15 @@ static void stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
@@ -600,8 +696,15 @@ static void stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
val |= mode << (pin * 2);
writel_relaxed(val, bank->base + STM32_GPIO_MODER);
@ -1875,7 +1836,18 @@ index a9bec6e..5b71c97 100644
}
void stm32_pmx_get_mode(struct stm32_gpio_bank *bank, int pin, u32 *mode,
@@ -652,9 +757,7 @@ static int stm32_pmx_set_mux(struct pinctrl_dev *pctldev,
@@ -652,15 +755,18 @@ static int stm32_pmx_set_mux(struct pinctrl_dev *pctldev,
return -EINVAL;
}
+ if (function == STM32_PIN_RSVD) {
+ dev_dbg(pctl->dev, "Reserved pins, skipping HW update.\n");
+ return 0;
+ }
+
bank = gpiochip_get_data(range->gc);
pin = stm32_gpio_pin(g->pin);
mode = stm32_gpio_get_mode(function);
alt = stm32_gpio_get_alt(function);
@ -1886,7 +1858,7 @@ index a9bec6e..5b71c97 100644
}
static int stm32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
@@ -664,9 +767,7 @@ static int stm32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
@@ -670,9 +776,7 @@ static int stm32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
struct stm32_gpio_bank *bank = gpiochip_get_data(range->gc);
int pin = stm32_gpio_pin(gpio);
@ -1897,7 +1869,7 @@ index a9bec6e..5b71c97 100644
}
static const struct pinmux_ops stm32_pmx_ops = {
@@ -680,22 +781,39 @@ static const struct pinmux_ops stm32_pmx_ops = {
@@ -686,22 +790,39 @@ static const struct pinmux_ops stm32_pmx_ops = {
/* Pinconf functions */
@ -1939,7 +1911,7 @@ index a9bec6e..5b71c97 100644
}
static u32 stm32_pconf_get_driving(struct stm32_gpio_bank *bank,
@@ -716,22 +834,39 @@ static u32 stm32_pconf_get_driving(struct stm32_gpio_bank *bank,
@@ -722,22 +843,39 @@ static u32 stm32_pconf_get_driving(struct stm32_gpio_bank *bank,
return (val >> offset);
}
@ -1981,7 +1953,7 @@ index a9bec6e..5b71c97 100644
}
static u32 stm32_pconf_get_speed(struct stm32_gpio_bank *bank,
@@ -752,22 +887,39 @@ static u32 stm32_pconf_get_speed(struct stm32_gpio_bank *bank,
@@ -758,22 +896,39 @@ static u32 stm32_pconf_get_speed(struct stm32_gpio_bank *bank,
return (val >> (offset * 2));
}
@ -2023,7 +1995,7 @@ index a9bec6e..5b71c97 100644
}
static u32 stm32_pconf_get_bias(struct stm32_gpio_bank *bank,
@@ -830,22 +982,22 @@ static int stm32_pconf_parse_conf(struct pinctrl_dev *pctldev,
@@ -836,22 +991,22 @@ static int stm32_pconf_parse_conf(struct pinctrl_dev *pctldev,
switch (param) {
case PIN_CONFIG_DRIVE_PUSH_PULL:
@ -2052,7 +2024,7 @@ index a9bec6e..5b71c97 100644
break;
case PIN_CONFIG_OUTPUT:
__stm32_gpio_set(bank, offset, arg);
@@ -893,6 +1045,8 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
@@ -899,6 +1054,8 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
struct seq_file *s,
unsigned int pin)
{
@ -2061,7 +2033,7 @@ index a9bec6e..5b71c97 100644
struct pinctrl_gpio_range *range;
struct stm32_gpio_bank *bank;
int offset;
@@ -942,7 +1096,9 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
@@ -948,7 +1105,9 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
case 2:
drive = stm32_pconf_get_driving(bank, offset);
speed = stm32_pconf_get_speed(bank, offset);
@ -2072,7 +2044,7 @@ index a9bec6e..5b71c97 100644
drive ? "open drain" : "push pull",
biasing[bias],
speeds[speed], "speed");
@@ -1049,23 +1205,35 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
@@ -1055,23 +1214,35 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
return 0;
}
@ -2117,7 +2089,7 @@ index a9bec6e..5b71c97 100644
pctl->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
if (IS_ERR(pctl->regmap))
return PTR_ERR(pctl->regmap);
@@ -1105,7 +1273,7 @@ static int stm32_pctrl_build_state(struct platform_device *pdev)
@@ -1111,7 +1282,7 @@ static int stm32_pctrl_build_state(struct platform_device *pdev)
struct stm32_pinctrl *pctl = platform_get_drvdata(pdev);
int i;
@ -2126,7 +2098,7 @@ index a9bec6e..5b71c97 100644
/* Allocate groups */
pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups,
@@ -1119,19 +1287,51 @@ static int stm32_pctrl_build_state(struct platform_device *pdev)
@@ -1125,19 +1296,51 @@ static int stm32_pctrl_build_state(struct platform_device *pdev)
if (!pctl->grp_names)
return -ENOMEM;
@ -2181,7 +2153,7 @@ index a9bec6e..5b71c97 100644
int stm32_pctl_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -1140,7 +1340,7 @@ int stm32_pctl_probe(struct platform_device *pdev)
@@ -1146,7 +1349,7 @@ int stm32_pctl_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct stm32_pinctrl *pctl;
struct pinctrl_pin_desc *pins;
@ -2190,7 +2162,7 @@ index a9bec6e..5b71c97 100644
if (!np)
return -EINVAL;
@@ -1160,36 +1360,66 @@ int stm32_pctl_probe(struct platform_device *pdev)
@@ -1166,36 +1369,66 @@ int stm32_pctl_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, pctl);
@ -2262,7 +2234,7 @@ index a9bec6e..5b71c97 100644
pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc,
pctl);
@@ -1227,3 +1457,115 @@ int stm32_pctl_probe(struct platform_device *pdev)
@@ -1233,3 +1466,115 @@ int stm32_pctl_probe(struct platform_device *pdev)
return 0;
}
@ -2379,14 +2351,15 @@ index a9bec6e..5b71c97 100644
+}
+#endif /* CONFIG_PM */
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.h b/drivers/pinctrl/stm32/pinctrl-stm32.h
index 473a623..eb6ed85 100644
index 473a623..bc77a58 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.h
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.h
@@ -17,6 +17,15 @@
@@ -17,6 +17,16 @@
#define STM32_PIN_GPIO 0
#define STM32_PIN_AF(x) ((x) + 1)
#define STM32_PIN_ANALOG (STM32_PIN_AF(15) + 1)
+#define STM32_CONFIG_NUM 18
+#define STM32_PIN_RSVD (STM32_PIN_ANALOG + 1)
+#define STM32_CONFIG_NUM (STM32_PIN_RSVD + 1)
+
+/* package information */
+#define STM32MP157CAA BIT(0)
@ -2398,7 +2371,7 @@ index 473a623..eb6ed85 100644
struct stm32_desc_function {
const char *name;
@@ -25,7 +34,8 @@ struct stm32_desc_function {
@@ -25,7 +35,8 @@ struct stm32_desc_function {
struct stm32_desc_pin {
struct pinctrl_pin_desc pin;
@ -2408,7 +2381,7 @@ index 473a623..eb6ed85 100644
};
#define STM32_PIN(_pin, ...) \
@@ -35,8 +45,15 @@ struct stm32_desc_pin {
@@ -35,8 +46,15 @@ struct stm32_desc_pin {
__VA_ARGS__, { } }, \
}
@ -2425,7 +2398,7 @@ index 473a623..eb6ed85 100644
.num = _num, \
.name = _name, \
}
@@ -44,6 +61,7 @@ struct stm32_desc_pin {
@@ -44,6 +62,7 @@ struct stm32_desc_pin {
struct stm32_pinctrl_match_data {
const struct stm32_desc_pin *pins;
const unsigned int npins;
@ -2433,7 +2406,7 @@ index 473a623..eb6ed85 100644
};
struct stm32_gpio_bank;
@@ -51,5 +69,35 @@ struct stm32_gpio_bank;
@@ -51,5 +70,35 @@ struct stm32_gpio_bank;
int stm32_pctl_probe(struct platform_device *pdev);
void stm32_pmx_get_mode(struct stm32_gpio_bank *bank,
int pin, u32 *mode, u32 *alt);
@ -5199,7 +5172,7 @@ index 7c7d628..e1a8a89 100644
};
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index 0059b24c..322df1f 100644
index 28e1f64..b461412 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -13,6 +13,7 @@
@ -5219,20 +5192,7 @@ index 0059b24c..322df1f 100644
};
static inline struct stm32_pwm_lp *to_stm32_pwm_lp(struct pwm_chip *chip)
@@ -58,6 +61,12 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
/* Calculate the period and prescaler value */
div = (unsigned long long)clk_get_rate(priv->clk) * state->period;
do_div(div, NSEC_PER_SEC);
+ if (!div) {
+ /* Fall here in case source clock < period */
+ dev_err(priv->chip.dev, "Can't reach expected period\n");
+ return -EINVAL;
+ }
+
prd = div;
while (div > STM32_LPTIM_MAX_ARR) {
presc++;
@@ -223,6 +232,40 @@ static int stm32_pwm_lp_remove(struct platform_device *pdev)
@@ -229,6 +232,40 @@ static int stm32_pwm_lp_remove(struct platform_device *pdev)
return pwmchip_remove(&priv->chip);
}
@ -5273,7 +5233,7 @@ index 0059b24c..322df1f 100644
static const struct of_device_id stm32_pwm_lp_of_match[] = {
{ .compatible = "st,stm32-pwm-lp", },
{},
@@ -235,6 +278,7 @@ static struct platform_driver stm32_pwm_lp_driver = {
@@ -241,6 +278,7 @@ static struct platform_driver stm32_pwm_lp_driver = {
.driver = {
.name = "stm32-pwm-lp",
.of_match_table = of_match_ptr(stm32_pwm_lp_of_match),
@ -5471,7 +5431,7 @@ index 4f84255..4688425 100644
};
module_platform_driver(stm32_pwm_driver);
diff --git a/drivers/pwm/sysfs.c b/drivers/pwm/sysfs.c
index 7c71cdb..ceb233d 100644
index 72bdda4..13d9bd5 100644
--- a/drivers/pwm/sysfs.c
+++ b/drivers/pwm/sysfs.c
@@ -249,6 +249,7 @@ static void pwm_export_release(struct device *child)
@ -5482,15 +5442,7 @@ index 7c71cdb..ceb233d 100644
int ret;
if (test_and_set_bit(PWMF_EXPORTED, &pwm->flags))
@@ -263,7 +264,6 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
export->pwm = pwm;
mutex_init(&export->lock);
- export->child.class = parent->class;
export->child.release = pwm_export_release;
export->child.parent = parent;
export->child.devt = MKDEV(0, 0);
@@ -277,6 +277,10 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
@@ -276,6 +277,10 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
export = NULL;
return ret;
}
@ -5501,7 +5453,7 @@ index 7c71cdb..ceb233d 100644
return 0;
}
@@ -289,6 +293,7 @@ static int pwm_unexport_match(struct device *child, void *data)
@@ -288,6 +293,7 @@ static int pwm_unexport_match(struct device *child, void *data)
static int pwm_unexport_child(struct device *parent, struct pwm_device *pwm)
{
struct device *child;
@ -5509,7 +5461,7 @@ index 7c71cdb..ceb233d 100644
if (!test_and_clear_bit(PWMF_EXPORTED, &pwm->flags))
return -ENODEV;
@@ -297,6 +302,11 @@ static int pwm_unexport_child(struct device *parent, struct pwm_device *pwm)
@@ -296,6 +302,11 @@ static int pwm_unexport_child(struct device *parent, struct pwm_device *pwm)
if (!child)
return -ENODEV;
@ -5522,10 +5474,17 @@ index 7c71cdb..ceb233d 100644
put_device(child);
device_unregister(child);
diff --git a/include/dt-bindings/pinctrl/stm32-pinfunc.h b/include/dt-bindings/pinctrl/stm32-pinfunc.h
index b5a2174..e928aea 100644
index b5a2174..e3b45a8 100644
--- a/include/dt-bindings/pinctrl/stm32-pinfunc.h
+++ b/include/dt-bindings/pinctrl/stm32-pinfunc.h
@@ -32,5 +32,11 @@
@@ -26,11 +26,18 @@
#define AF14 0xf
#define AF15 0x10
#define ANALOG 0x11
+#define RSVD 0x12
/* define Pins number*/
#define PIN_NO(port, line) (((port) - 'A') * 0x10 + (line))
#define STM32_PINMUX(port, line, mode) (((PIN_NO(port, line)) << 8) | (mode))

357
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0019-ARM-stm32mp1-r2-REGULATOR.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0020-ARM-stm32mp1-r3-REGULATOR.patch
View File

@ -1,15 +1,17 @@
From c26270a4d76f20b3ee1af133269ac67e60185e8c Mon Sep 17 00:00:00 2001
From 099f59a43431770a338d464c59e26d9e4a2b30eb Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:03 +0200
Subject: [PATCH 19/30] ARM stm32mp1 r2 REGULATOR
Date: Fri, 8 Nov 2019 16:52:44 +0100
Subject: [PATCH 20/31] ARM stm32mp1 r3 REGULATOR
---
drivers/regulator/Kconfig | 19 +
drivers/regulator/Makefile | 2 +
drivers/regulator/core.c | 6 +
drivers/regulator/stm32-pwr.c | 245 +++++++++++++
drivers/regulator/stm32-vrefbuf.c | 123 ++++++-
drivers/regulator/stpmic1_regulator.c | 663 ++++++++++++++++++++++++++++++++++
5 files changed, 1045 insertions(+), 7 deletions(-)
drivers/regulator/stm32-vrefbuf.c | 126 ++++++-
drivers/regulator/stpmic1_regulator.c | 632 ++++++++++++++++++++++++++++++++++
include/linux/regulator/driver.h | 1 +
7 files changed, 1023 insertions(+), 8 deletions(-)
create mode 100644 drivers/regulator/stm32-pwr.c
create mode 100644 drivers/regulator/stpmic1_regulator.c
@ -44,7 +46,7 @@ index 329cdd3..9ecafba 100644
tristate "TI Adaptive Body Bias on-chip LDO"
depends on ARCH_OMAP
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 801d9a3..3506ec2 100644
index bba9c48..a818c5d 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -101,6 +101,8 @@ obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
@ -56,6 +58,23 @@ index 801d9a3..3506ec2 100644
obj-$(CONFIG_REGULATOR_STW481X_VMMC) += stw481x-vmmc.o
obj-$(CONFIG_REGULATOR_SY8106A) += sy8106a-regulator.o
obj-$(CONFIG_REGULATOR_TI_ABB) += ti-abb-regulator.o
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index f312764..1a40a4a 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -4605,6 +4605,12 @@ struct device *rdev_get_dev(struct regulator_dev *rdev)
}
EXPORT_SYMBOL_GPL(rdev_get_dev);
+struct regmap *rdev_get_regmap(struct regulator_dev *rdev)
+{
+ return rdev->regmap;
+}
+EXPORT_SYMBOL_GPL(rdev_get_regmap);
+
void *regulator_get_init_drvdata(struct regulator_init_data *reg_init_data)
{
return reg_init_data->driver_data;
diff --git a/drivers/regulator/stm32-pwr.c b/drivers/regulator/stm32-pwr.c
new file mode 100644
index 0000000..e6f41eb
@ -308,7 +327,7 @@ index 0000000..e6f41eb
+}
+subsys_initcall(stm32_pwr_regulator_init);
diff --git a/drivers/regulator/stm32-vrefbuf.c b/drivers/regulator/stm32-vrefbuf.c
index e0a9c44..29cca32 100644
index e0a9c44..a74dffe 100644
--- a/drivers/regulator/stm32-vrefbuf.c
+++ b/drivers/regulator/stm32-vrefbuf.c
@@ -15,6 +15,7 @@
@ -367,6 +386,7 @@ index e0a9c44..29cca32 100644
+ u32 val;
+ int ret;
- val = (val & ~STM32_ENVR) | STM32_HIZ;
+ ret = pm_runtime_get_sync(priv->dev);
+ if (ret < 0) {
+ pm_runtime_put_noidle(priv->dev);
@ -374,7 +394,7 @@ index e0a9c44..29cca32 100644
+ }
+
+ val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
val = (val & ~STM32_ENVR) | STM32_HIZ;
+ val &= ~STM32_ENVR;
writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
+ pm_runtime_mark_last_busy(priv->dev);
@ -451,7 +471,15 @@ index e0a9c44..29cca32 100644
}
static const struct regulator_ops stm32_vrefbuf_volt_ops = {
@@ -130,6 +191,7 @@ static int stm32_vrefbuf_probe(struct platform_device *pdev)
@@ -115,6 +176,7 @@ static const struct regulator_desc stm32_vrefbuf_regu = {
.volt_table = stm32_vrefbuf_voltages,
.n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages),
.ops = &stm32_vrefbuf_volt_ops,
+ .off_on_delay = 1000,
.type = REGULATOR_VOLTAGE,
.owner = THIS_MODULE,
};
@@ -130,6 +192,7 @@ static int stm32_vrefbuf_probe(struct platform_device *pdev)
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
@ -459,7 +487,7 @@ index e0a9c44..29cca32 100644
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
priv->base = devm_ioremap_resource(&pdev->dev, res);
@@ -140,10 +202,17 @@ static int stm32_vrefbuf_probe(struct platform_device *pdev)
@@ -140,10 +203,17 @@ static int stm32_vrefbuf_probe(struct platform_device *pdev)
if (IS_ERR(priv->clk))
return PTR_ERR(priv->clk);
@ -478,7 +506,7 @@ index e0a9c44..29cca32 100644
}
config.dev = &pdev->dev;
@@ -161,10 +230,17 @@ static int stm32_vrefbuf_probe(struct platform_device *pdev)
@@ -161,10 +231,17 @@ static int stm32_vrefbuf_probe(struct platform_device *pdev)
}
platform_set_drvdata(pdev, rdev);
@ -496,7 +524,7 @@ index e0a9c44..29cca32 100644
return ret;
}
@@ -174,12 +250,44 @@ static int stm32_vrefbuf_remove(struct platform_device *pdev)
@@ -174,12 +251,44 @@ static int stm32_vrefbuf_remove(struct platform_device *pdev)
struct regulator_dev *rdev = platform_get_drvdata(pdev);
struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
@ -541,7 +569,7 @@ index e0a9c44..29cca32 100644
static const struct of_device_id stm32_vrefbuf_of_match[] = {
{ .compatible = "st,stm32-vrefbuf", },
{},
@@ -192,6 +300,7 @@ static struct platform_driver stm32_vrefbuf_driver = {
@@ -192,6 +301,7 @@ static struct platform_driver stm32_vrefbuf_driver = {
.driver = {
.name = "stm32-vrefbuf",
.of_match_table = of_match_ptr(stm32_vrefbuf_of_match),
@ -551,10 +579,10 @@ index e0a9c44..29cca32 100644
module_platform_driver(stm32_vrefbuf_driver);
diff --git a/drivers/regulator/stpmic1_regulator.c b/drivers/regulator/stpmic1_regulator.c
new file mode 100644
index 0000000..31c960c
index 0000000..29f1584
--- /dev/null
+++ b/drivers/regulator/stpmic1_regulator.c
@@ -0,0 +1,663 @@
@@ -0,0 +1,632 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) STMicroelectronics 2018
+// Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
@ -569,8 +597,10 @@ index 0000000..31c960c
+#include <linux/regulator/machine.h>
+#include <linux/regulator/of_regulator.h>
+
+#include <dt-bindings/mfd/st,stpmic1.h>
+
+/**
+ * stpmic1 regulator description
+ * stpmic1 regulator description: this structure is used as driver data
+ * @desc: regulator framework description
+ * @mask_reset_reg: mask reset register address
+ * @mask_reset_mask: mask rank and mask reset register mask
@ -585,28 +615,9 @@ index 0000000..31c960c
+ u8 icc_mask;
+};
+
+/**
+ * stpmic1 regulator data: this structure is used as driver data
+ * @regul_id: regulator id
+ * @reg_node: DT node of regulator (unused on non-DT platforms)
+ * @cfg: stpmic specific regulator description
+ * @mask_reset: mask_reset bit value
+ * @irq_curlim: current limit interrupt number
+ * @regmap: point to parent regmap structure
+ */
+struct stpmic1_regulator {
+ unsigned int regul_id;
+ struct device_node *reg_node;
+ struct stpmic1_regulator_cfg *cfg;
+ u8 mask_reset;
+ int irq_curlim;
+ struct regmap *regmap;
+};
+
+static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode);
+static unsigned int stpmic1_get_mode(struct regulator_dev *rdev);
+static int stpmic1_set_icc(struct regulator_dev *rdev);
+static int stpmic1_regulator_parse_dt(void *driver_data);
+static unsigned int stpmic1_map_mode(unsigned int mode);
+
+enum {
@ -629,16 +640,13 @@ index 0000000..31c960c
+/* Enable time worst case is 5000mV/(2250uV/uS) */
+#define PMIC_ENABLE_TIME_US 2200
+
+#define STPMIC1_BUCK_MODE_NORMAL 0
+#define STPMIC1_BUCK_MODE_LP BUCK_HPLP_ENABLE_MASK
+
+struct regulator_linear_range buck1_ranges[] = {
+static const struct regulator_linear_range buck1_ranges[] = {
+ REGULATOR_LINEAR_RANGE(725000, 0, 4, 0),
+ REGULATOR_LINEAR_RANGE(725000, 5, 36, 25000),
+ REGULATOR_LINEAR_RANGE(1500000, 37, 63, 0),
+};
+
+struct regulator_linear_range buck2_ranges[] = {
+static const struct regulator_linear_range buck2_ranges[] = {
+ REGULATOR_LINEAR_RANGE(1000000, 0, 17, 0),
+ REGULATOR_LINEAR_RANGE(1050000, 18, 19, 0),
+ REGULATOR_LINEAR_RANGE(1100000, 20, 21, 0),
@ -652,7 +660,7 @@ index 0000000..31c960c
+ REGULATOR_LINEAR_RANGE(1500000, 36, 63, 0),
+};
+
+struct regulator_linear_range buck3_ranges[] = {
+static const struct regulator_linear_range buck3_ranges[] = {
+ REGULATOR_LINEAR_RANGE(1000000, 0, 19, 0),
+ REGULATOR_LINEAR_RANGE(1100000, 20, 23, 0),
+ REGULATOR_LINEAR_RANGE(1200000, 24, 27, 0),
@ -660,10 +668,9 @@ index 0000000..31c960c
+ REGULATOR_LINEAR_RANGE(1400000, 32, 35, 0),
+ REGULATOR_LINEAR_RANGE(1500000, 36, 55, 100000),
+ REGULATOR_LINEAR_RANGE(3400000, 56, 63, 0),
+
+};
+
+struct regulator_linear_range buck4_ranges[] = {
+static const struct regulator_linear_range buck4_ranges[] = {
+ REGULATOR_LINEAR_RANGE(600000, 0, 27, 25000),
+ REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0),
+ REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0),
@ -671,24 +678,21 @@ index 0000000..31c960c
+ REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0),
+ REGULATOR_LINEAR_RANGE(1500000, 36, 60, 100000),
+ REGULATOR_LINEAR_RANGE(3900000, 61, 63, 0),
+
+};
+
+struct regulator_linear_range ldo1_ranges[] = {
+static const struct regulator_linear_range ldo1_ranges[] = {
+ REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
+ REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
+ REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0),
+
+};
+
+struct regulator_linear_range ldo2_ranges[] = {
+static const struct regulator_linear_range ldo2_ranges[] = {
+ REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
+ REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
+ REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0),
+
+};
+
+struct regulator_linear_range ldo3_ranges[] = {
+static const struct regulator_linear_range ldo3_ranges[] = {
+ REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
+ REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
+ REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0),
@ -696,18 +700,18 @@ index 0000000..31c960c
+ REGULATOR_LINEAR_RANGE(500000, 31, 31, 0),
+};
+
+struct regulator_linear_range ldo5_ranges[] = {
+static const struct regulator_linear_range ldo5_ranges[] = {
+ REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
+ REGULATOR_LINEAR_RANGE(1700000, 8, 30, 100000),
+ REGULATOR_LINEAR_RANGE(3900000, 31, 31, 0),
+};
+
+struct regulator_linear_range ldo6_ranges[] = {
+static const struct regulator_linear_range ldo6_ranges[] = {
+ REGULATOR_LINEAR_RANGE(900000, 0, 24, 100000),
+ REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0),
+};
+
+static struct regulator_ops stpmic1_ldo_ops = {
+static const struct regulator_ops stpmic1_ldo_ops = {
+ .list_voltage = regulator_list_voltage_linear_range,
+ .map_voltage = regulator_map_voltage_linear_range,
+ .is_enabled = regulator_is_enabled_regmap,
@ -718,7 +722,7 @@ index 0000000..31c960c
+ .set_over_current_protection = stpmic1_set_icc,
+};
+
+static struct regulator_ops stpmic1_ldo3_ops = {
+static const struct regulator_ops stpmic1_ldo3_ops = {
+ .list_voltage = regulator_list_voltage_linear_range,
+ .map_voltage = regulator_map_voltage_iterate,
+ .is_enabled = regulator_is_enabled_regmap,
@ -731,14 +735,14 @@ index 0000000..31c960c
+ .set_over_current_protection = stpmic1_set_icc,
+};
+
+static struct regulator_ops stpmic1_ldo4_fixed_regul_ops = {
+static const struct regulator_ops stpmic1_ldo4_fixed_regul_ops = {
+ .is_enabled = regulator_is_enabled_regmap,
+ .enable = regulator_enable_regmap,
+ .disable = regulator_disable_regmap,
+ .set_over_current_protection = stpmic1_set_icc,
+};
+
+static struct regulator_ops stpmic1_buck_ops = {
+static const struct regulator_ops stpmic1_buck_ops = {
+ .list_voltage = regulator_list_voltage_linear_range,
+ .map_voltage = regulator_map_voltage_linear_range,
+ .is_enabled = regulator_is_enabled_regmap,
@ -752,19 +756,27 @@ index 0000000..31c960c
+ .set_over_current_protection = stpmic1_set_icc,
+};
+
+static struct regulator_ops stpmic1_vref_ddr_ops = {
+static const struct regulator_ops stpmic1_vref_ddr_ops = {
+ .is_enabled = regulator_is_enabled_regmap,
+ .enable = regulator_enable_regmap,
+ .disable = regulator_disable_regmap,
+};
+
+static struct regulator_ops stpmic1_switch_regul_ops = {
+static const struct regulator_ops stpmic1_boost_regul_ops = {
+ .is_enabled = regulator_is_enabled_regmap,
+ .enable = regulator_enable_regmap,
+ .disable = regulator_disable_regmap,
+ .set_over_current_protection = stpmic1_set_icc,
+};
+
+static const struct regulator_ops stpmic1_switch_regul_ops = {
+ .is_enabled = regulator_is_enabled_regmap,
+ .enable = regulator_enable_regmap,
+ .disable = regulator_disable_regmap,
+ .set_over_current_protection = stpmic1_set_icc,
+ .set_active_discharge = regulator_set_active_discharge_regmap,
+};
+
+#define REG_LDO(ids, base) { \
+ .name = #ids, \
+ .id = STPMIC1_##ids, \
@ -863,7 +875,24 @@ index 0000000..31c960c
+ .supply_name = #base, \
+}
+
+#define REG_SWITCH(ids, base, reg, mask, val) { \
+#define REG_BOOST(ids, base) { \
+ .name = #ids, \
+ .id = STPMIC1_##ids, \
+ .n_voltages = 1, \
+ .ops = &stpmic1_boost_regul_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .owner = THIS_MODULE, \
+ .min_uV = 0, \
+ .fixed_uV = 5000000, \
+ .enable_reg = BST_SW_CR, \
+ .enable_mask = BOOST_ENABLED, \
+ .enable_val = BOOST_ENABLED, \
+ .disable_val = 0, \
+ .enable_time = PMIC_ENABLE_TIME_US, \
+ .supply_name = #base, \
+}
+
+#define REG_VBUS_OTG(ids, base) { \
+ .name = #ids, \
+ .id = STPMIC1_##ids, \
+ .n_voltages = 1, \
@ -872,15 +901,38 @@ index 0000000..31c960c
+ .owner = THIS_MODULE, \
+ .min_uV = 0, \
+ .fixed_uV = 5000000, \
+ .enable_reg = (reg), \
+ .enable_mask = (mask), \
+ .enable_val = (val), \
+ .enable_reg = BST_SW_CR, \
+ .enable_mask = USBSW_OTG_SWITCH_ENABLED, \
+ .enable_val = USBSW_OTG_SWITCH_ENABLED, \
+ .disable_val = 0, \
+ .enable_time = PMIC_ENABLE_TIME_US, \
+ .supply_name = #base, \
+ .active_discharge_reg = BST_SW_CR, \
+ .active_discharge_mask = VBUS_OTG_DISCHARGE, \
+ .active_discharge_on = VBUS_OTG_DISCHARGE, \
+}
+
+struct stpmic1_regulator_cfg stpmic1_regulator_cfgs[] = {
+#define REG_SW_OUT(ids, base) { \
+ .name = #ids, \
+ .id = STPMIC1_##ids, \
+ .n_voltages = 1, \
+ .ops = &stpmic1_switch_regul_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .owner = THIS_MODULE, \
+ .min_uV = 0, \
+ .fixed_uV = 5000000, \
+ .enable_reg = BST_SW_CR, \
+ .enable_mask = SWIN_SWOUT_ENABLED, \
+ .enable_val = SWIN_SWOUT_ENABLED, \
+ .disable_val = 0, \
+ .enable_time = PMIC_ENABLE_TIME_US, \
+ .supply_name = #base, \
+ .active_discharge_reg = BST_SW_CR, \
+ .active_discharge_mask = SW_OUT_DISCHARGE, \
+ .active_discharge_on = SW_OUT_DISCHARGE, \
+}
+
+static const struct stpmic1_regulator_cfg stpmic1_regulator_cfgs[] = {
+ [STPMIC1_BUCK1] = {
+ .desc = REG_BUCK(BUCK1, buck1),
+ .icc_reg = BUCKS_ICCTO_CR,
@ -957,23 +1009,17 @@ index 0000000..31c960c
+ .mask_reset_mask = BIT(6),
+ },
+ [STPMIC1_BOOST] = {
+ .desc = REG_SWITCH(BOOST, boost, BST_SW_CR,
+ BOOST_ENABLED,
+ BOOST_ENABLED),
+ .desc = REG_BOOST(BOOST, boost),
+ .icc_reg = BUCKS_ICCTO_CR,
+ .icc_mask = BIT(6),
+ },
+ [STPMIC1_VBUS_OTG] = {
+ .desc = REG_SWITCH(VBUS_OTG, pwr_sw1, BST_SW_CR,
+ USBSW_OTG_SWITCH_ENABLED,
+ USBSW_OTG_SWITCH_ENABLED),
+ .desc = REG_VBUS_OTG(VBUS_OTG, pwr_sw1),
+ .icc_reg = BUCKS_ICCTO_CR,
+ .icc_mask = BIT(4),
+ },
+ [STPMIC1_SW_OUT] = {
+ .desc = REG_SWITCH(SW_OUT, pwr_sw2, BST_SW_CR,
+ SWIN_SWOUT_ENABLED,
+ SWIN_SWOUT_ENABLED),
+ .desc = REG_SW_OUT(SW_OUT, pwr_sw2),
+ .icc_reg = BUCKS_ICCTO_CR,
+ .icc_mask = BIT(5),
+ },
@ -987,15 +1033,16 @@ index 0000000..31c960c
+ case STPMIC1_BUCK_MODE_LP:
+ return REGULATOR_MODE_STANDBY;
+ default:
+ return -EINVAL;
+ return REGULATOR_MODE_INVALID;
+ }
+}
+
+static unsigned int stpmic1_get_mode(struct regulator_dev *rdev)
+{
+ int value;
+ struct regmap *regmap = rdev_get_regmap(rdev);
+
+ regmap_read(rdev->regmap, rdev->desc->enable_reg, &value);
+ regmap_read(regmap, rdev->desc->enable_reg, &value);
+
+ if (value & STPMIC1_BUCK_MODE_LP)
+ return REGULATOR_MODE_STANDBY;
@ -1006,6 +1053,7 @@ index 0000000..31c960c
+static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode)
+{
+ int value;
+ struct regmap *regmap = rdev_get_regmap(rdev);
+
+ switch (mode) {
+ case REGULATOR_MODE_NORMAL:
@ -1018,17 +1066,18 @@ index 0000000..31c960c
+ return -EINVAL;
+ }
+
+ return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
+ return regmap_update_bits(regmap, rdev->desc->enable_reg,
+ STPMIC1_BUCK_MODE_LP, value);
+}
+
+static int stpmic1_set_icc(struct regulator_dev *rdev)
+{
+ struct stpmic1_regulator *regul = rdev_get_drvdata(rdev);
+ struct stpmic1_regulator_cfg *cfg = rdev_get_drvdata(rdev);
+ struct regmap *regmap = rdev_get_regmap(rdev);
+
+ /* enable switch off in case of over current */
+ return regmap_update_bits(regul->regmap, regul->cfg->icc_reg,
+ regul->cfg->icc_mask, regul->cfg->icc_mask);
+ return regmap_update_bits(regmap, cfg->icc_reg, cfg->icc_mask,
+ cfg->icc_mask);
+}
+
+static irqreturn_t stpmic1_curlim_irq_handler(int irq, void *data)
@ -1047,46 +1096,13 @@ index 0000000..31c960c
+ return IRQ_HANDLED;
+}
+
+static int stpmic1_regulator_init(struct platform_device *pdev,
+ struct regulator_dev *rdev)
+{
+ struct stpmic1_regulator *regul = rdev_get_drvdata(rdev);
+ int ret = 0;
+
+ /* set mask reset */
+ if (regul->mask_reset && regul->cfg->mask_reset_reg != 0) {
+ ret = regmap_update_bits(regul->regmap,
+ regul->cfg->mask_reset_reg,
+ regul->cfg->mask_reset_mask,
+ regul->cfg->mask_reset_mask);
+ if (ret) {
+ dev_err(&pdev->dev, "set mask reset failed\n");
+ return ret;
+ }
+ }
+
+ /* setup an irq handler for over-current detection */
+ if (regul->irq_curlim > 0) {
+ ret = devm_request_threaded_irq(&pdev->dev,
+ regul->irq_curlim, NULL,
+ stpmic1_curlim_irq_handler,
+ IRQF_ONESHOT | IRQF_SHARED,
+ pdev->name, rdev);
+ if (ret) {
+ dev_err(&pdev->dev, "Request IRQ failed\n");
+ return ret;
+ }
+ }
+ return 0;
+}
+
+#define MATCH(_name, _id) \
+ [STPMIC1_##_id] = { \
+ .name = #_name, \
+ .desc = &stpmic1_regulator_cfgs[STPMIC1_##_id].desc, \
+ }
+
+static struct of_regulator_match stpmic1_regulators_matches[] = {
+static struct of_regulator_match stpmic1_matches[] = {
+ MATCH(buck1, BUCK1),
+ MATCH(buck2, BUCK2),
+ MATCH(buck3, BUCK3),
@ -1103,94 +1119,75 @@ index 0000000..31c960c
+ MATCH(pwr_sw2, SW_OUT),
+};
+
+static int stpmic1_regulator_parse_dt(void *driver_data)
+{
+ struct stpmic1_regulator *regul =
+ (struct stpmic1_regulator *)driver_data;
+
+ if (!regul)
+ return -EINVAL;
+
+ if (of_get_property(regul->reg_node, "st,mask-reset", NULL))
+ regul->mask_reset = 1;
+
+ regul->irq_curlim = of_irq_get(regul->reg_node, 0);
+
+ return 0;
+}
+
+static struct
+regulator_dev *stpmic1_regulator_register(struct platform_device *pdev, int id,
+ struct regulator_init_data *init_data,
+ struct stpmic1_regulator *regul)
+static int stpmic1_regulator_register(struct platform_device *pdev, int id,
+ struct of_regulator_match *match,
+ const struct stpmic1_regulator_cfg *cfg)
+{
+ struct stpmic1 *pmic_dev = dev_get_drvdata(pdev->dev.parent);
+ struct regulator_dev *rdev;
+ struct regulator_config config = {};
+ int ret = 0;
+ int irq;
+
+ config.dev = &pdev->dev;
+ config.init_data = init_data;
+ config.of_node = stpmic1_regulators_matches[id].of_node;
+ config.init_data = match->init_data;
+ config.of_node = match->of_node;
+ config.regmap = pmic_dev->regmap;
+ config.driver_data = regul;
+ config.driver_data = (void *)cfg;
+
+ regul->regul_id = id;
+ regul->reg_node = config.of_node;
+ regul->cfg = &stpmic1_regulator_cfgs[id];
+ regul->regmap = pmic_dev->regmap;
+
+ rdev = devm_regulator_register(&pdev->dev, &regul->cfg->desc, &config);
+ rdev = devm_regulator_register(&pdev->dev, &cfg->desc, &config);
+ if (IS_ERR(rdev)) {
+ dev_err(&pdev->dev, "failed to register %s regulator\n",
+ regul->cfg->desc.name);
+ cfg->desc.name);
+ return PTR_ERR(rdev);
+ }
+
+ return rdev;
+ /* set mask reset */
+ if (of_get_property(config.of_node, "st,mask-reset", NULL) &&
+ cfg->mask_reset_reg != 0) {
+ ret = regmap_update_bits(pmic_dev->regmap,
+ cfg->mask_reset_reg,
+ cfg->mask_reset_mask,
+ cfg->mask_reset_mask);
+ if (ret) {
+ dev_err(&pdev->dev, "set mask reset failed\n");
+ return ret;
+ }
+ }
+
+ /* setup an irq handler for over-current detection */
+ irq = of_irq_get(config.of_node, 0);
+ if (irq > 0) {
+ ret = devm_request_threaded_irq(&pdev->dev,
+ irq, NULL,
+ stpmic1_curlim_irq_handler,
+ IRQF_ONESHOT | IRQF_SHARED,
+ pdev->name, rdev);
+ if (ret) {
+ dev_err(&pdev->dev, "Request IRQ failed\n");
+ return ret;
+ }
+ }
+ return 0;
+}
+
+static int stpmic1_regulator_probe(struct platform_device *pdev)
+{
+ struct regulator_dev *rdev;
+ struct stpmic1_regulator *regul;
+ struct regulator_init_data *init_data;
+ struct device_node *np;
+ int i, ret;
+
+ np = pdev->dev.of_node;
+
+ ret = of_regulator_match(&pdev->dev, np,
+ stpmic1_regulators_matches,
+ ARRAY_SIZE(stpmic1_regulators_matches));
+ ret = of_regulator_match(&pdev->dev, pdev->dev.of_node, stpmic1_matches,
+ ARRAY_SIZE(stpmic1_matches));
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "Error in PMIC regulator device tree node");
+ return ret;
+ }
+
+ regul = devm_kzalloc(&pdev->dev, ARRAY_SIZE(stpmic1_regulator_cfgs) *
+ sizeof(struct stpmic1_regulator),
+ GFP_KERNEL);
+ if (!regul)
+ return -ENOMEM;
+
+ for (i = 0; i < ARRAY_SIZE(stpmic1_regulator_cfgs); i++) {
+ /* Parse DT & find regulators to register */
+ init_data = stpmic1_regulators_matches[i].init_data;
+ if (init_data)
+ init_data->regulator_init = &stpmic1_regulator_parse_dt;
+
+ rdev = stpmic1_regulator_register(pdev, i, init_data, regul);
+ if (IS_ERR(rdev))
+ return PTR_ERR(rdev);
+
+ ret = stpmic1_regulator_init(pdev, rdev);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to initialize regulator %d\n", ret);
+ ret = stpmic1_regulator_register(pdev, i, &stpmic1_matches[i],
+ &stpmic1_regulator_cfgs[i]);
+ if (ret < 0)
+ return ret;
+ }
+
+ regul++;
+ }
+
+ dev_dbg(&pdev->dev, "stpmic1_regulator driver probed\n");
@ -1218,6 +1215,18 @@ index 0000000..31c960c
+MODULE_DESCRIPTION("STPMIC1 PMIC voltage regulator driver");
+MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h
index 0fd8fbb..85c5427 100644
--- a/include/linux/regulator/driver.h
+++ b/include/linux/regulator/driver.h
@@ -492,6 +492,7 @@ int regulator_notifier_call_chain(struct regulator_dev *rdev,
void *rdev_get_drvdata(struct regulator_dev *rdev);
struct device *rdev_get_dev(struct regulator_dev *rdev);
+struct regmap *rdev_get_regmap(struct regulator_dev *rdev);
int rdev_get_id(struct regulator_dev *rdev);
int regulator_mode_to_status(unsigned int);
--
2.7.4

179
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0020-ARM-stm32mp1-r2-REMOTEPROC-RPMSG-RESET.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0021-ARM-stm32mp1-r3-REMOTEPROC-RPMSG-RESET.patch
View File

@ -1,7 +1,7 @@
From 0feaf56c6535420b9c89752e55353887e8266959 Mon Sep 17 00:00:00 2001
From b1e1c0d118b5f460f13d08f7a4f25210aaa88641 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:04 +0200
Subject: [PATCH 20/30] ARM stm32mp1 r2 REMOTEPROC RPMSG RESET
Date: Fri, 8 Nov 2019 16:52:45 +0100
Subject: [PATCH 21/31] ARM stm32mp1 r3 REMOTEPROC RPMSG RESET
---
drivers/remoteproc/Kconfig | 36 ++
@ -12,18 +12,18 @@ Subject: [PATCH 20/30] ARM stm32mp1 r2 REMOTEPROC RPMSG RESET
drivers/remoteproc/remoteproc_virtio.c | 58 ++-
drivers/remoteproc/rproc_srm_core.c | 303 +++++++++++
drivers/remoteproc/rproc_srm_core.h | 98 ++++
drivers/remoteproc/rproc_srm_dev.c | 833 ++++++++++++++++++++++++++++++
drivers/remoteproc/stm32_rproc.c | 847 +++++++++++++++++++++++++++++++
drivers/remoteproc/rproc_srm_dev.c | 744 +++++++++++++++++++++++++++
drivers/remoteproc/stm32_rproc.c | 858 +++++++++++++++++++++++++++++++
drivers/reset/reset-stm32mp1.c | 48 ++
drivers/rpmsg/Kconfig | 9 +
drivers/rpmsg/Makefile | 1 +
drivers/rpmsg/rpmsg_core.c | 19 +
drivers/rpmsg/rpmsg_internal.h | 2 +
drivers/rpmsg/rpmsg_tty.c | 305 +++++++++++
drivers/rpmsg/rpmsg_tty.c | 310 +++++++++++
drivers/rpmsg/virtio_rpmsg_bus.c | 17 +-
include/linux/remoteproc.h | 38 +-
include/linux/rpmsg.h | 9 +
19 files changed, 3200 insertions(+), 149 deletions(-)
19 files changed, 3127 insertions(+), 149 deletions(-)
create mode 100644 drivers/remoteproc/rproc_srm_core.c
create mode 100644 drivers/remoteproc/rproc_srm_core.h
create mode 100644 drivers/remoteproc/rproc_srm_dev.c
@ -1699,10 +1699,10 @@ index 0000000..7dffdb38
+#endif
diff --git a/drivers/remoteproc/rproc_srm_dev.c b/drivers/remoteproc/rproc_srm_dev.c
new file mode 100644
index 0000000..7dc99c5
index 0000000..6b164da
--- /dev/null
+++ b/drivers/remoteproc/rproc_srm_dev.c
@@ -0,0 +1,833 @@
@@ -0,0 +1,744 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
@ -1717,7 +1717,6 @@ index 0000000..7dc99c5
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/remoteproc.h>
@ -1732,12 +1731,6 @@ index 0000000..7dc99c5
+ bool parent_enabled;
+};
+
+struct rproc_srm_pin_info {
+ struct list_head list;
+ unsigned int index;
+ char *name;
+};
+
+struct rproc_srm_regu_info {
+ struct list_head list;
+ unsigned int index;
@ -1758,12 +1751,10 @@ index 0000000..7dc99c5
+ struct device *dev;
+ struct rproc_srm_core *core;
+ struct notifier_block nb;
+ struct pinctrl *pctrl;
+ bool early_boot;
+
+ struct list_head clk_list_head;
+ struct list_head regu_list_head;
+ struct list_head pin_list_head;
+ struct list_head irq_list_head;
+};
+
@ -2247,79 +2238,6 @@ index 0000000..7dc99c5
+ return ret;
+}
+
+/* Pins */
+static void rproc_srm_dev_pins_put(struct rproc_srm_dev *rproc_srm_dev)
+{
+ struct device *dev = rproc_srm_dev->dev;
+ struct rproc_srm_pin_info *p, *tmp;
+
+ list_for_each_entry_safe(p, tmp, &rproc_srm_dev->pin_list_head, list) {
+ devm_kfree(dev, p->name);
+ devm_kfree(dev, p);
+ dev_dbg(dev, "remove pin cfg %d (%s)\n", p->index, p->name);
+ list_del(&p->list);
+ }
+
+ if (!IS_ERR_OR_NULL(rproc_srm_dev->pctrl)) {
+ devm_pinctrl_put(rproc_srm_dev->pctrl);
+ rproc_srm_dev->pctrl = NULL;
+ }
+}
+
+static int rproc_srm_dev_pins_get(struct rproc_srm_dev *rproc_srm_dev)
+{
+ struct device *dev = rproc_srm_dev->dev;
+ struct device_node *np = dev->of_node;
+ struct rproc_srm_pin_info *p;
+ int ret, nb_p;
+ unsigned int i;
+ const char *name;
+
+ if (!np)
+ return 0;
+
+ rproc_srm_dev->pctrl = devm_pinctrl_get(dev);
+ if (IS_ERR(rproc_srm_dev->pctrl))
+ return 0;
+
+ nb_p = of_property_count_strings(np, "pinctrl-names");
+ if (nb_p <= 0) {
+ dev_err(dev, "pinctrl-names not defined\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ for (i = 0; i < nb_p; i++) {
+ p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
+ if (!p) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ if (of_property_read_string_index(np, "pinctrl-names", i,
+ &name)) {
+ dev_err(dev, "no pinctrl-names (pin %d)\n", i);
+ ret = -EINVAL;
+ goto err;
+ }
+ p->name = devm_kstrdup(dev, name, GFP_KERNEL);
+
+ /* pinctrl-names shall not be "default" (but "rproc_default") */
+ if (!strcmp(p->name, PINCTRL_STATE_DEFAULT))
+ dev_warn(dev, "pin config potentially overwritten!\n");
+
+ p->index = i;
+
+ list_add_tail(&p->list, &rproc_srm_dev->pin_list_head);
+ dev_dbg(dev, "found pin cfg %d (%s)\n", p->index, p->name);
+ }
+ return 0;
+
+err:
+ rproc_srm_dev_pins_put(rproc_srm_dev);
+ return ret;
+}
+
+/* Core */
+static int rproc_srm_dev_notify_cb(struct notifier_block *nb, unsigned long evt,
+ void *data)
@ -2405,7 +2323,7 @@ index 0000000..7dc99c5
+ rproc_srm_dev_regus_unsetup(rproc_srm_dev);
+ rproc_srm_dev_clocks_unsetup(rproc_srm_dev);
+
+ /* For pins and IRQs: nothing to unsetup */
+ /* For IRQs: nothing to unsetup */
+}
+
+static int
@ -2424,7 +2342,7 @@ index 0000000..7dc99c5
+ if (ret)
+ return ret;
+
+ /* For pins and IRQs: nothing to setup */
+ /* For IRQs: nothing to setup */
+ return 0;
+}
+
@ -2453,11 +2371,10 @@ index 0000000..7dc99c5
+ rproc_srm_dev->core = dev_get_drvdata(dev->parent);
+
+ INIT_LIST_HEAD(&rproc_srm_dev->clk_list_head);
+ INIT_LIST_HEAD(&rproc_srm_dev->pin_list_head);
+ INIT_LIST_HEAD(&rproc_srm_dev->regu_list_head);
+ INIT_LIST_HEAD(&rproc_srm_dev->irq_list_head);
+
+ /* Get clocks, regu, irqs and pinctrl */
+ /* Get clocks, regu and irqs */
+ ret = rproc_srm_dev_clocks_get(rproc_srm_dev);
+ if (ret)
+ return ret;
@ -2466,10 +2383,6 @@ index 0000000..7dc99c5
+ if (ret)
+ goto err_get;
+
+ ret = rproc_srm_dev_pins_get(rproc_srm_dev);
+ if (ret)
+ goto err_get;
+
+ ret = rproc_srm_dev_irqs_get(rproc_srm_dev);
+ if (ret)
+ goto err_get;
@ -2489,7 +2402,6 @@ index 0000000..7dc99c5
+ &rproc_srm_dev->nb);
+err_get:
+ rproc_srm_dev_irqs_put(rproc_srm_dev);
+ rproc_srm_dev_pins_put(rproc_srm_dev);
+ rproc_srm_dev_regus_put(rproc_srm_dev);
+ rproc_srm_dev_clocks_put(rproc_srm_dev);
+ return ret;
@ -2509,7 +2421,6 @@ index 0000000..7dc99c5
+
+ rproc_srm_dev_irqs_put(rproc_srm_dev);
+ rproc_srm_dev_regus_put(rproc_srm_dev);
+ rproc_srm_dev_pins_put(rproc_srm_dev);
+ rproc_srm_dev_clocks_put(rproc_srm_dev);
+
+ return 0;
@ -2538,10 +2449,10 @@ index 0000000..7dc99c5
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c
new file mode 100644
index 0000000..6533503
index 0000000..21a569a
--- /dev/null
+++ b/drivers/remoteproc/stm32_rproc.c
@@ -0,0 +1,847 @@
@@ -0,0 +1,858 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
@ -2580,6 +2491,8 @@ index 0000000..6533503
+#define STM32_MBX_VQ1_ID 1
+#define STM32_MBX_SHUTDOWN "shutdown"
+
+#define RSC_TBL_SIZE (1024)
+
+struct stm32_syscon {
+ struct regmap *map;
+ u32 reg;
@ -2619,7 +2532,6 @@ index 0000000..6533503
+ struct workqueue_struct *workqueue;
+ bool secured_soc;
+ void __iomem *rsc_va;
+ u32 rsc_len;
+};
+
+static int stm32_rproc_pa_to_da(struct rproc *rproc, phys_addr_t pa, u64 *da)
@ -2772,7 +2684,6 @@ index 0000000..6533503
+ int status;
+ struct resource_table *table = NULL;
+ struct stm32_rproc *ddata = rproc->priv;
+ size_t tablesz = 0;
+
+ if (!rproc->early_boot) {
+ status = rproc_elf_load_rsc_table(rproc, fw);
@ -2783,14 +2694,14 @@ index 0000000..6533503
+ }
+
+ if (ddata->rsc_va) {
+ tablesz = ddata->rsc_len;
+ table = (struct resource_table *)ddata->rsc_va;
+ rproc->cached_table = kmemdup(table, tablesz, GFP_KERNEL);
+ /* Assuming that the resource table fits in 1kB is fair */
+ rproc->cached_table = kmemdup(table, RSC_TBL_SIZE, GFP_KERNEL);
+ if (!rproc->cached_table)
+ return -ENOMEM;
+
+ rproc->table_ptr = rproc->cached_table;
+ rproc->table_sz = tablesz;
+ rproc->table_sz = RSC_TBL_SIZE;
+ return 0;
+ }
+
@ -2799,7 +2710,7 @@ index 0000000..6533503
+ rproc->table_sz = 0;
+
+no_rsc_table:
+ dev_warn(&rproc->dev, "not resource table found for this firmware\n");
+ dev_warn(&rproc->dev, "no resource table found for this firmware\n");
+ return 0;
+}
+
@ -2956,7 +2867,7 @@ index 0000000..6533503
+ }
+};
+
+static void stm32_rproc_request_mbox(struct rproc *rproc)
+static int stm32_rproc_request_mbox(struct rproc *rproc)
+{
+ struct stm32_rproc *ddata = rproc->priv;
+ struct device *dev = &rproc->dev;
@ -2974,7 +2885,9 @@ index 0000000..6533503
+ cl->dev = dev->parent;
+
+ ddata->mb[i].chan = mbox_request_channel_byname(cl, name);
+ if (IS_ERR(ddata->mb[i].chan)) {
+ if (PTR_ERR(ddata->mb[i].chan) == -EPROBE_DEFER) {
+ return -EPROBE_DEFER;
+ } else if (IS_ERR(ddata->mb[i].chan)) {
+ dev_warn(dev, "cannot get %s mbox\n", name);
+ ddata->mb[i].chan = NULL;
+ }
@ -2983,6 +2896,8 @@ index 0000000..6533503
+ stm32_rproc_mb_vq_work);
+ }
+ }
+
+ return 0;
+}
+
+static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold)
@ -3171,7 +3086,7 @@ index 0000000..6533503
+ struct device_node *np = dev->of_node;
+ struct rproc *rproc = platform_get_drvdata(pdev);
+ struct stm32_rproc *ddata = rproc->priv;
+ struct stm32_syscon tz;
+ struct stm32_syscon tz, rsctbl;
+ phys_addr_t rsc_pa;
+ u32 rsc_da;
+ unsigned int tzen;
@ -3232,7 +3147,7 @@ index 0000000..6533503
+
+ err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds);
+ if (err)
+ dev_warn(dev, "failed to get pdds\n");
+ dev_warn(dev, "pdds not supported\n");
+
+
+ rproc->auto_boot = of_property_read_bool(np, "auto_boot");
@ -3244,30 +3159,35 @@ index 0000000..6533503
+
+ if (of_property_read_bool(np, "early-booted")) {
+ rproc->early_boot = true;
+ err = of_property_read_u32(np, "rsc-address", &rsc_da);
+ if (err)
+ /* no optional rsc table found */
+ return 0;
+
+ err = of_property_read_u32(np, "rsc-size", &ddata->rsc_len);
+ if (stm32_rproc_get_syscon(np, "st,syscfg-rsc-tbl", &rsctbl)) {
+ /* no rsc table syscon (optional) */
+ dev_warn(dev, "rsc tbl syscon not supported\n");
+ goto bail;
+ }
+
+ err = regmap_read(rsctbl.map, rsctbl.reg, &rsc_da);
+ if (err) {
+ dev_err(dev, "resource table size required as address defined\n");
+ dev_err(&rproc->dev, "failed to read rsc tbl addr\n");
+ return err;
+ }
+ if (!rsc_da)
+ /* no rsc table */
+ goto bail;
+
+ err = stm32_rproc_da_to_pa(rproc, rsc_da, &rsc_pa);
+ if (err)
+ return err;
+
+ ddata->rsc_va = devm_ioremap_wc(dev, rsc_pa, ddata->rsc_len);
+ ddata->rsc_va = devm_ioremap_wc(dev, rsc_pa, RSC_TBL_SIZE);
+ if (IS_ERR_OR_NULL(ddata->rsc_va)) {
+ dev_err(dev, "Unable to map memory region: %pa+%zx\n",
+ &rsc_pa, ddata->rsc_len);
+ &rsc_pa, RSC_TBL_SIZE);
+ ddata->rsc_va = NULL;
+ return -ENOMEM;
+ }
+ }
+
+bail:
+ return 0;
+}
+
@ -3301,10 +3221,12 @@ index 0000000..6533503
+ if (!rproc->early_boot) {
+ ret = stm32_rproc_stop(rproc);
+ if (ret)
+ goto free_rproc;
+ goto free_wkq;
+ }
+
+ stm32_rproc_request_mbox(rproc);
+ ret = stm32_rproc_request_mbox(rproc);
+ if (ret)
+ goto free_wkq;
+
+ ret = rproc_add(rproc);
+ if (ret)
@ -3560,10 +3482,10 @@ index 0d791c3..65bcb52 100644
int rpmsg_register_device(struct rpmsg_device *rpdev);
diff --git a/drivers/rpmsg/rpmsg_tty.c b/drivers/rpmsg/rpmsg_tty.c
new file mode 100644
index 0000000..26814d3
index 0000000..5776389
--- /dev/null
+++ b/drivers/rpmsg/rpmsg_tty.c
@@ -0,0 +1,305 @@
@@ -0,0 +1,310 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
@ -3838,6 +3760,11 @@ index 0000000..26814d3
+
+ tty_set_operations(rpmsg_tty_driver, &rpmsg_tty_ops);
+
+ /* Disable unused mode by default */
+ rpmsg_tty_driver->init_termios = tty_std_termios;
+ rpmsg_tty_driver->init_termios.c_lflag &= ~(ECHO | ICANON);
+ rpmsg_tty_driver->init_termios.c_oflag &= ~(OPOST | ONLCR);
+
+ err = tty_register_driver(rpmsg_tty_driver);
+ if (err < 0) {
+ pr_err("Couldn't install rpmsg tty driver: err %d\n", err);

6
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0021-ARM-stm32mp1-r2-RTC.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0022-ARM-stm32mp1-r3-RTC.patch
View File

@ -1,7 +1,7 @@
From dbec0d5fe9520a172a3cba71781d9e19e659f43a Mon Sep 17 00:00:00 2001
From eb8e18ef550744ca51256b8cd1dc3cf09b7596e4 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:04 +0200
Subject: [PATCH 21/30] ARM stm32mp1 r2 RTC
Date: Fri, 8 Nov 2019 16:52:45 +0100
Subject: [PATCH 22/31] ARM stm32mp1 r3 RTC
---
drivers/rtc/Kconfig | 1 +

10
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0022-ARM-stm32mp1-r2-SOC.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0023-ARM-stm32mp1-r3-SOC.patch
View File

@ -1,7 +1,7 @@
From 5b0a5e8f93e04129a2115dd5883ad5ca561c009a Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:05 +0200
Subject: [PATCH 22/30] ARM stm32mp1 r2 SOC
From 62a47162dba55286160a68ac2b46d405142b2830 Mon Sep 17 00:00:00 2001
From: Romuald JEANNE <romuald.jeanne@st.com>
Date: Mon, 9 Dec 2019 12:26:14 +0100
Subject: [PATCH 23/31] ARM stm32mp1 r3 SOC
---
drivers/soc/Kconfig | 1 +
@ -31,7 +31,7 @@ index c07b4a8..f2bd1ce 100644
source "drivers/soc/tegra/Kconfig"
source "drivers/soc/ti/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 113e884..a16f673 100644
index f0d46b1..d2c3147 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -18,6 +18,7 @@ obj-y += qcom/

6
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0023-ARM-stm32mp1-r2-SPI.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0024-ARM-stm32mp1-r3-SPI.patch
View File

@ -1,7 +1,7 @@
From 7e96d3b92f935af4c9b85bbc25cc3e63323fd5bc Mon Sep 17 00:00:00 2001
From b40db75218cb1808125643c8e76b364d26ae2479 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:05 +0200
Subject: [PATCH 23/30] ARM stm32mp1 r2 SPI
Date: Fri, 8 Nov 2019 16:52:46 +0100
Subject: [PATCH 24/31] ARM stm32mp1 r3 SPI
---
drivers/spi/Kconfig | 9 +

6
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0024-ARM-stm32mp1-r2-THERMAL.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0025-ARM-stm32mp1-r3-THERMAL.patch
View File

@ -1,7 +1,7 @@
From acf08f1eb571f76ff42e343efa928f9b3c6112c5 Mon Sep 17 00:00:00 2001
From 69f90684b9d271fe91b53862b3a760d91b0fe7e4 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:05 +0200
Subject: [PATCH 24/30] ARM stm32mp1 r2 THERMAL
Date: Fri, 8 Nov 2019 16:52:46 +0100
Subject: [PATCH 25/31] ARM stm32mp1 r3 THERMAL
---
drivers/thermal/Kconfig | 2 +-

959
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0025-ARM-stm32mp1-r2-TTY-USB.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0026-ARM-stm32mp1-r3-TTY-USB.patch
View File

File diff suppressed because it is too large Load Diff

62
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0026-ARM-stm32mp1-r2-WATCHDOG.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0027-ARM-stm32mp1-r3-WATCHDOG.patch
View File

@ -1,18 +1,18 @@
From cbd843990c118aaf21b72565d68b852bea8cae1b Mon Sep 17 00:00:00 2001
From 918e6c75e00bcae7481c4560ebbca237d991b2c0 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:06 +0200
Subject: [PATCH 26/30] ARM stm32mp1 r2 WATCHDOG
Date: Fri, 8 Nov 2019 16:52:48 +0100
Subject: [PATCH 27/31] ARM stm32mp1 r3 WATCHDOG
---
drivers/watchdog/Kconfig | 12 ++++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/stm32_iwdg.c | 65 +++++++++++--------
drivers/watchdog/stpmic1_wdt.c | 139 +++++++++++++++++++++++++++++++++++++++++
4 files changed, 192 insertions(+), 25 deletions(-)
drivers/watchdog/stm32_iwdg.c | 83 ++++++++++++++++--------
drivers/watchdog/stpmic1_wdt.c | 140 +++++++++++++++++++++++++++++++++++++++++
4 files changed, 211 insertions(+), 25 deletions(-)
create mode 100644 drivers/watchdog/stpmic1_wdt.c
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 5ea8909..6d2ffef 100644
index b165c46..9790eca 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -806,6 +806,18 @@ config STM32_WATCHDOG
@ -44,7 +44,7 @@ index bf92e7b..2649cf3 100644
obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o
+obj-$(CONFIG_STPMIC1_WATCHDOG) += stpmic1_wdt.o
diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c
index e00e3b3..2208e8c 100644
index e00e3b3..56a3ffd 100644
--- a/drivers/watchdog/stm32_iwdg.c
+++ b/drivers/watchdog/stm32_iwdg.c
@@ -34,18 +34,10 @@
@ -185,12 +185,37 @@ index e00e3b3..2208e8c 100644
wdd->parent = &pdev->dev;
watchdog_set_drvdata(wdd, wdt);
@@ -243,6 +258,24 @@ static int stm32_iwdg_probe(struct platform_device *pdev)
dev_warn(&pdev->dev,
"unable to set timeout value, using default\n");
+ /*
+ * In case of CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is set
+ * (Means U-Boot/bootloaders leaves the watchdog running)
+ * When we get here we should make a decision to prevent
+ * any side effects before user space daemon will take care of it.
+ * The best option, taking into consideration that there is no
+ * way to read values back from hardware, is to enforce watchdog
+ * being run with deterministic values.
+ */
+ if (IS_ENABLED(CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED)) {
+ ret = stm32_iwdg_start(wdd);
+ if (ret)
+ return ret;
+
+ /* Make sure the watchdog is serviced */
+ set_bit(WDOG_HW_RUNNING, &wdd->status);
+ }
+
ret = watchdog_register_device(wdd);
if (ret) {
dev_err(&pdev->dev, "failed to register watchdog device\n");
diff --git a/drivers/watchdog/stpmic1_wdt.c b/drivers/watchdog/stpmic1_wdt.c
new file mode 100644
index 0000000..a6cbc27
index 0000000..45d0c54
--- /dev/null
+++ b/drivers/watchdog/stpmic1_wdt.c
@@ -0,0 +1,139 @@
@@ -0,0 +1,140 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) STMicroelectronics 2018
+// Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
@ -217,9 +242,8 @@ index 0000000..a6cbc27
+
+static bool nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, bool, 0);
+MODULE_PARM_DESC(nowayout,
+ "Watchdog cannot be stopped once started (default="
+ __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
+ __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+
+struct stpmic1_wdt {
+ struct stpmic1 *pmic;
@ -275,18 +299,19 @@ index 0000000..a6cbc27
+
+static int pmic_wdt_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ int ret;
+ struct stpmic1 *pmic;
+ struct stpmic1_wdt *wdt;
+
+ if (!pdev->dev.parent)
+ if (!dev->parent)
+ return -EINVAL;
+
+ pmic = dev_get_drvdata(pdev->dev.parent);
+ pmic = dev_get_drvdata(dev->parent);
+ if (!pmic)
+ return -EINVAL;
+
+ wdt = devm_kzalloc(&pdev->dev, sizeof(struct stpmic1_wdt), GFP_KERNEL);
+ wdt = devm_kzalloc(dev, sizeof(struct stpmic1_wdt), GFP_KERNEL);
+ if (!wdt)
+ return -ENOMEM;
+
@ -296,14 +321,15 @@ index 0000000..a6cbc27
+ wdt->wdtdev.ops = &pmic_watchdog_ops;
+ wdt->wdtdev.min_timeout = PMIC_WDT_MIN_TIMEOUT;
+ wdt->wdtdev.max_timeout = PMIC_WDT_MAX_TIMEOUT;
+ wdt->wdtdev.parent = dev;
+
+ wdt->wdtdev.timeout = PMIC_WDT_DEFAULT_TIMEOUT;
+ watchdog_init_timeout(&wdt->wdtdev, 0, &pdev->dev);
+ watchdog_init_timeout(&wdt->wdtdev, 0, dev);
+
+ watchdog_set_nowayout(&wdt->wdtdev, nowayout);
+ watchdog_set_drvdata(&wdt->wdtdev, wdt);
+
+ ret = devm_watchdog_register_device(&pdev->dev, &wdt->wdtdev);
+ ret = devm_watchdog_register_device(dev, &wdt->wdtdev);
+ if (ret)
+ return ret;
+

781
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0027-ARM-stm32mp1-r2-SOUND.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0028-ARM-stm32mp1-r3-SOUND.patch
View File

File diff suppressed because it is too large Load Diff

20
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0028-ARM-stm32mp1-r2-MISC.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0029-ARM-stm32mp1-r2.4-MISC.patch
View File

@ -1,7 +1,7 @@
From a3c9e0d977420d451f6e13873a4a0921d8a9b88f Mon Sep 17 00:00:00 2001
From 9166e19abab21450a32288379f5fb55f44e7a340 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:07 +0200
Subject: [PATCH 28/30] ARM stm32mp1 r2 MISC
Date: Fri, 8 Nov 2019 16:52:49 +0100
Subject: [PATCH 29/31] ARM stm32mp1 r2.4 MISC
---
Documentation/remoteproc.txt | 23 ++++++++++++++++++++
@ -45,10 +45,10 @@ index 77fb03a..bec2177 100644
+The resources handled by the SRM are defined in the DeviceTree: please read
+Documentation/devicetree/bindings/remoteproc/rproc-srm.txt for details.
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index f6fcb8a..88849c1 100644
index bee0ba1..b402db6 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1184,6 +1184,42 @@ choice
@@ -1191,6 +1191,42 @@ choice
If unsure, say N.
@ -91,7 +91,7 @@ index f6fcb8a..88849c1 100644
config TEGRA_DEBUG_UART_AUTO_ODMDATA
bool "Kernel low-level debugging messages via Tegra UART via ODMDATA"
depends on ARCH_TEGRA
@@ -1468,6 +1504,10 @@ config DEBUG_STI_UART
@@ -1475,6 +1511,10 @@ config DEBUG_STI_UART
bool
depends on ARCH_STI
@ -102,7 +102,7 @@ index f6fcb8a..88849c1 100644
config DEBUG_SIRFSOC_UART
bool
depends on ARCH_SIRF
@@ -1517,6 +1557,7 @@ config DEBUG_LL_INCLUDE
@@ -1524,6 +1564,7 @@ config DEBUG_LL_INCLUDE
default "debug/s5pv210.S" if DEBUG_S5PV210_UART
default "debug/sirf.S" if DEBUG_SIRFSOC_UART
default "debug/sti.S" if DEBUG_STI_UART
@ -110,7 +110,7 @@ index f6fcb8a..88849c1 100644
default "debug/tegra.S" if DEBUG_TEGRA_UART
default "debug/ux500.S" if DEBUG_UX500_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT
@@ -1580,6 +1621,8 @@ config DEBUG_UART_PHYS
@@ -1587,6 +1628,8 @@ config DEBUG_UART_PHYS
default 0x3e000000 if DEBUG_BCM_KONA_UART
default 0x3f201000 if DEBUG_BCM2836
default 0x4000e400 if DEBUG_LL_UART_EFM32
@ -119,7 +119,7 @@ index f6fcb8a..88849c1 100644
default 0x40028000 if DEBUG_AT91_SAMV7_USART1
default 0x40081000 if DEBUG_LPC18XX_UART0
default 0x40090000 if DEBUG_LPC32XX
@@ -1673,10 +1716,12 @@ config DEBUG_UART_PHYS
@@ -1681,10 +1724,12 @@ config DEBUG_UART_PHYS
DEBUG_S3C64XX_UART || \
DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \
DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 || \
@ -133,7 +133,7 @@ index f6fcb8a..88849c1 100644
default 0xc881f000 if DEBUG_RV1108_UART2
default 0xc8821000 if DEBUG_RV1108_UART1
default 0xc8912000 if DEBUG_RV1108_UART0
@@ -1788,7 +1833,7 @@ config DEBUG_UART_VIRT
@@ -1797,7 +1842,7 @@ config DEBUG_UART_VIRT
DEBUG_S3C64XX_UART || \
DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \
DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 || \

1451
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0029-ARM-stm32mp1-r2-DEVICETREE.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0030-ARM-stm32mp1-r3-DEVICETREE.patch
View File

File diff suppressed because it is too large Load Diff

21
recipes-kernel/linux/linux-stm32mp/4.19/4.19.49/0030-ARM-stm32mp1-r2-DEFCONFIG.patch → recipes-kernel/linux/linux-stm32mp/4.19/4.19.94/0031-ARM-stm32mp1-r3-DEFCONFIG.patch
View File

@ -1,13 +1,13 @@
From 8352ebfd1953c5dc6514c0be878f7c8a47e33fa7 Mon Sep 17 00:00:00 2001
From 62cd375deb0762da00fbfce0f211a02404f5ab54 Mon Sep 17 00:00:00 2001
From: Lionel VITTE <lionel.vitte@st.com>
Date: Thu, 11 Jul 2019 14:12:10 +0200
Subject: [PATCH 30/30] ARM stm32mp1 r2 DEFCONFIG
Date: Fri, 8 Nov 2019 16:52:53 +0100
Subject: [PATCH 31/31] ARM stm32mp1 r3 DEFCONFIG
---
.../arm/configs/fragment-01-multiv7_cleanup.config | 69 +++
arch/arm/configs/fragment-02-multiv7_addons.config | 509 +++++++++++++++++++++
arch/arm/configs/fragment-02-multiv7_addons.config | 508 +++++++++++++++++++++
arch/arm/configs/multi_v7_defconfig | 1 +
3 files changed, 579 insertions(+)
3 files changed, 578 insertions(+)
create mode 100644 arch/arm/configs/fragment-01-multiv7_cleanup.config
create mode 100644 arch/arm/configs/fragment-02-multiv7_addons.config
@ -88,10 +88,10 @@ index 0000000..22f6ffb
+
diff --git a/arch/arm/configs/fragment-02-multiv7_addons.config b/arch/arm/configs/fragment-02-multiv7_addons.config
new file mode 100644
index 0000000..7ba8387
index 0000000..e68bb1e
--- /dev/null
+++ b/arch/arm/configs/fragment-02-multiv7_addons.config
@@ -0,0 +1,509 @@
@@ -0,0 +1,508 @@
+#
+# General setup
+#
@ -133,6 +133,7 @@ index 0000000..7ba8387
+#
+# Kernel Features
+#
+CONFIG_SCHED_MC=y
+CONFIG_MCPM=y
+CONFIG_NR_CPUS=4
+# CONFIG_PREEMPT_NONE is not set
@ -153,11 +154,8 @@ index 0000000..7ba8387
+#
+# CPU Power Management
+#
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+
+#
+# CPU Idle
@ -416,6 +414,7 @@ index 0000000..7ba8387
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=y
+
+#
+# also be needed; see USB_STORAGE Help for more info

2
recipes-kernel/linux/linux-stm32mp/4.19/fragment-05-modules.config
View File

@ -11,3 +11,5 @@ CONFIG_IIO_ST_PRESS=m
CONFIG_IIO_ST_LSM6DSX=m
CONFIG_IIO_ST_LSM6DSX_I2C=m
# support of event emulation
CONFIG_INPUT_UINPUT=m

5
recipes-kernel/linux/linux-stm32mp/README.HOW_TO.txt
View File

@ -218,7 +218,10 @@ Please refer to User guide for more details.
------------------------
* kernel + devicetree
$> cd <path to install_artifact dir>/install_artifact
$> ssh root@<ip of board> mount <device corresponding to bootfs> /boot
if bootfs are not monted on target, mount it
$> ssh root@<ip of board> df to see if there is a partition mounted on /boot
else
$> ssh root@<ip of board> mount <device corresponding to bootfs> /boot
$> scp -r boot/* root@<ip of board>:/boot/
$> ssh root@<ip of board> umount /boot

71
recipes-kernel/linux/linux-stm32mp_4.19.bb
View File

@ -5,48 +5,49 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
include linux-stm32mp.inc
SRC_URI = "https://cdn.kernel.org/pub/linux/kernel/v4.x/linux-4.19.49.tar.xz"
SRC_URI[md5sum] = "0cb9baf0f5ed8f56d42cccc508d841b0"
SRC_URI[sha256sum] = "92d920b3973c0dbca5516271afa405be6e5822a9b831df8c085f9c9eb838bbcd"
SRC_URI = "https://cdn.kernel.org/pub/linux/kernel/v4.x/linux-4.19.94.tar.xz"
SRC_URI[md5sum] = "3f5621e9b463a3574618f3edfe438e4a"
SRC_URI[sha256sum] = "c62a10a75a7c4213e41287040e7c7509b7d42117d6830feb7dfe505949fa7467"
SRC_URI += " \
file://${LINUX_VERSION}/4.19.49/0001-ARM-stm32mp1-r2-MACHINE.patch \
file://${LINUX_VERSION}/4.19.49/0002-ARM-stm32mp1-r2-CRYPTO.patch \
file://${LINUX_VERSION}/4.19.49/0003-ARM-stm32mp1-r2-BLUETOOTH-CHAR.patch \
file://${LINUX_VERSION}/4.19.49/0004-ARM-stm32mp1-r2-CLOCK.patch \
file://${LINUX_VERSION}/4.19.49/0005-ARM-stm32mp1-r2-DMA.patch \
file://${LINUX_VERSION}/4.19.49/0006-ARM-stm32mp1-r2-DRM.patch \
file://${LINUX_VERSION}/4.19.49/0007-ARM-stm32mp1-r2-GPIO.patch \
file://${LINUX_VERSION}/4.19.49/0008-ARM-stm32mp1-r2-HWSPINLOCK.patch \
file://${LINUX_VERSION}/4.19.49/0009-ARM-stm32mp1-r2-HWTRACING-I2C.patch \
file://${LINUX_VERSION}/4.19.49/0010-ARM-stm32mp1-r2-IIO.patch \
file://${LINUX_VERSION}/4.19.49/0011-ARM-stm32mp1-r2-INPUT-IRQ-Mailbox.patch \
file://${LINUX_VERSION}/4.19.49/0012-ARM-stm32mp1-r2-MEDIA.patch \
file://${LINUX_VERSION}/4.19.49/0013-ARM-stm32mp1-r2-MFD.patch \
file://${LINUX_VERSION}/4.19.49/0014-ARM-stm32mp1-r2-MMC-MTD.patch \
file://${LINUX_VERSION}/4.19.49/0015-ARM-stm32mp1-r2-NET.patch \
file://${LINUX_VERSION}/4.19.49/0016-ARM-stm32mp1-r2-NVMEM.patch \
file://${LINUX_VERSION}/4.19.49/0017-ARM-stm32mp1-r2-PERF.patch \
file://${LINUX_VERSION}/4.19.49/0018-ARM-stm32mp1-r2-PHY-PINCTRL-PWM.patch \
file://${LINUX_VERSION}/4.19.49/0019-ARM-stm32mp1-r2-REGULATOR.patch \
file://${LINUX_VERSION}/4.19.49/0020-ARM-stm32mp1-r2-REMOTEPROC-RPMSG-RESET.patch \
file://${LINUX_VERSION}/4.19.49/0021-ARM-stm32mp1-r2-RTC.patch \
file://${LINUX_VERSION}/4.19.49/0022-ARM-stm32mp1-r2-SOC.patch \
file://${LINUX_VERSION}/4.19.49/0023-ARM-stm32mp1-r2-SPI.patch \
file://${LINUX_VERSION}/4.19.49/0024-ARM-stm32mp1-r2-THERMAL.patch \
file://${LINUX_VERSION}/4.19.49/0025-ARM-stm32mp1-r2-TTY-USB.patch \
file://${LINUX_VERSION}/4.19.49/0026-ARM-stm32mp1-r2-WATCHDOG.patch \
file://${LINUX_VERSION}/4.19.49/0027-ARM-stm32mp1-r2-SOUND.patch \
file://${LINUX_VERSION}/4.19.49/0028-ARM-stm32mp1-r2-MISC.patch \
file://${LINUX_VERSION}/4.19.49/0029-ARM-stm32mp1-r2-DEVICETREE.patch \
file://${LINUX_VERSION}/4.19.49/0030-ARM-stm32mp1-r2-DEFCONFIG.patch \
file://${LINUX_VERSION}/4.19.94/0001-ARM-stm32mp1-r3-MACHINE.patch \
file://${LINUX_VERSION}/4.19.94/0002-ARM-stm32mp1-r3-CPUFREQ.patch \
file://${LINUX_VERSION}/4.19.94/0003-ARM-stm32mp1-r3-CRYPTO.patch \
file://${LINUX_VERSION}/4.19.94/0004-ARM-stm32mp1-r3-BLUETOOTH-CHAR.patch \
file://${LINUX_VERSION}/4.19.94/0005-ARM-stm32mp1-r3-CLOCK.patch \
file://${LINUX_VERSION}/4.19.94/0006-ARM-stm32mp1-r3-DMA.patch \
file://${LINUX_VERSION}/4.19.94/0007-ARM-stm32mp1-r3-DRM.patch \
file://${LINUX_VERSION}/4.19.94/0008-ARM-stm32mp1-r3-GPIO.patch \
file://${LINUX_VERSION}/4.19.94/0009-ARM-stm32mp1-r3-HWSPINLOCK.patch \
file://${LINUX_VERSION}/4.19.94/0010-ARM-stm32mp1-r3-HWTRACING-I2C.patch \
file://${LINUX_VERSION}/4.19.94/0011-ARM-stm32mp1-r3-IIO.patch \
file://${LINUX_VERSION}/4.19.94/0012-ARM-stm32mp1-r3-INPUT-IRQ-Mailbox.patch \
file://${LINUX_VERSION}/4.19.94/0013-ARM-stm32mp1-r3-MEDIA.patch \
file://${LINUX_VERSION}/4.19.94/0014-ARM-stm32mp1-r3-MFD.patch \
file://${LINUX_VERSION}/4.19.94/0015-ARM-stm32mp1-r3-MMC-MTD.patch \
file://${LINUX_VERSION}/4.19.94/0016-ARM-stm32mp1-r3-NET.patch \
file://${LINUX_VERSION}/4.19.94/0017-ARM-stm32mp1-r3-NVMEM.patch \
file://${LINUX_VERSION}/4.19.94/0018-ARM-stm32mp1-r3-PERF.patch \
file://${LINUX_VERSION}/4.19.94/0019-ARM-stm32mp1-r3-PHY-PINCTRL-PWM.patch \
file://${LINUX_VERSION}/4.19.94/0020-ARM-stm32mp1-r3-REGULATOR.patch \
file://${LINUX_VERSION}/4.19.94/0021-ARM-stm32mp1-r3-REMOTEPROC-RPMSG-RESET.patch \
file://${LINUX_VERSION}/4.19.94/0022-ARM-stm32mp1-r3-RTC.patch \
file://${LINUX_VERSION}/4.19.94/0023-ARM-stm32mp1-r3-SOC.patch \
file://${LINUX_VERSION}/4.19.94/0024-ARM-stm32mp1-r3-SPI.patch \
file://${LINUX_VERSION}/4.19.94/0025-ARM-stm32mp1-r3-THERMAL.patch \
file://${LINUX_VERSION}/4.19.94/0026-ARM-stm32mp1-r3-TTY-USB.patch \
file://${LINUX_VERSION}/4.19.94/0027-ARM-stm32mp1-r3-WATCHDOG.patch \
file://${LINUX_VERSION}/4.19.94/0028-ARM-stm32mp1-r3-SOUND.patch \
file://${LINUX_VERSION}/4.19.94/0029-ARM-stm32mp1-r2.4-MISC.patch \
file://${LINUX_VERSION}/4.19.94/0030-ARM-stm32mp1-r3-DEVICETREE.patch \
file://${LINUX_VERSION}/4.19.94/0031-ARM-stm32mp1-r3-DEFCONFIG.patch \
"
LINUX_VERSION = "4.19"
PV = "${LINUX_VERSION}"
S = "${WORKDIR}/linux-4.19.49"
S = "${WORKDIR}/linux-4.19.94"
# ---------------------------------
# Configure devupstream class usage
@ -54,7 +55,7 @@ S = "${WORKDIR}/linux-4.19.49"
BBCLASSEXTEND = "devupstream:target"
SRC_URI_class-devupstream = "git://github.com/STMicroelectronics/linux.git;protocol=https;branch=v${LINUX_VERSION}-stm32mp;name=linux"
SRCREV_class-devupstream = "9cc80ff80f5ea5f1ff35122f61afaa7b11ad22ae"
SRCREV_class-devupstream = "1cb30cb5ffc29a53ec2031b6a29878ddd266516c"
SRCREV_FORMAT_class-devupstream = "linux"
PV_class-devupstream = "${LINUX_VERSION}+github+${SRCPV}"

3
recipes-kernel/make-mod-scripts/make-mod-scripts_1.0.bbappend Normal file
View File

@ -0,0 +1,3 @@
# make-mode-scripts package -dev and -dbg are empty so don't generate them
ALLOW_EMPTY_${PN}-dev = "0"
ALLOW_EMPTY_${PN}-dbg = "0"