LINUX-STM32MP: update to v5.10-stm32mp-r2
In case of addition of defconfig file on SRC_URI, the official do_configure override the st configuration (defconfig+fragment). Change-Id: Ibd73d49caafabbd3f58b0a213f6f1fec5dc81670 Signed-off-by: Christophe Priouzeau <christophe.priouzeau@foss.st.com>
This commit is contained in:
parent
6a533bb262
commit
58f52ac426
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@ -39,7 +39,7 @@ python () {
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#
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#If the defconfig is contained on the kernel tree (arch/${ARCH}/configs)
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#you must use the following line
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do_configure_prepend() {
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do_configure_append() {
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unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS MACHINE
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if [ ! -z ${KERNEL_DEFCONFIG} ];
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then
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@ -50,7 +50,7 @@ do_configure_prepend() {
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then
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bbnote "Kernel customized: configuration of linux STM by using external DEFCONFIG"
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install -m 0644 ${WORKDIR}/${KERNEL_EXTERNAL_DEFCONFIG} ${B}/.config
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oe_runmake -C ${S} O=${B} CC="${KERNEL_CC}" LD="${KERNEL_LD}" oldconfig
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yes '' | oe_runmake -C ${S} O=${B} CC="${KERNEL_CC}" LD="${KERNEL_LD}" oldconfig
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else
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bbwarn "You must specify KERNEL_DEFCONFIG or KERNEL_EXTERNAL_DEFCONFIG"
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die "NO DEFCONFIG SPECIFIED"
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@ -1,778 +0,0 @@
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From 56442e69cbaf31555a9bb4f3311a0593a0c172cc Mon Sep 17 00:00:00 2001
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From: Romuald JEANNE <romuald.jeanne@st.com>
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Date: Tue, 16 Mar 2021 08:56:48 +0100
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Subject: [PATCH 04/22] ARM 5.10.10-stm32mp1-r1 CRYPTO
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---
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drivers/crypto/stm32/stm32-cryp.c | 300 +++++++++++++++++++++---------
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drivers/crypto/stm32/stm32-hash.c | 19 +-
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2 files changed, 228 insertions(+), 91 deletions(-)
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diff --git a/drivers/crypto/stm32/stm32-cryp.c b/drivers/crypto/stm32/stm32-cryp.c
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index 2670c30332fa..503428bf15cb 100644
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--- a/drivers/crypto/stm32/stm32-cryp.c
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+++ b/drivers/crypto/stm32/stm32-cryp.c
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@@ -144,10 +144,10 @@ struct stm32_cryp {
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size_t authsize;
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size_t hw_blocksize;
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+ size_t remain_in;
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size_t total_in;
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- size_t total_in_save;
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+ size_t remain_out;
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size_t total_out;
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- size_t total_out_save;
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struct scatterlist *in_sg;
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struct scatterlist *out_sg;
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@@ -157,9 +157,6 @@ struct stm32_cryp {
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struct scatterlist out_sgl;
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bool sgs_copied;
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- int in_sg_len;
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- int out_sg_len;
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-
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struct scatter_walk in_walk;
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struct scatter_walk out_walk;
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@@ -322,28 +319,46 @@ static int stm32_cryp_check_io_aligned(struct stm32_cryp *cryp)
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ret = stm32_cryp_check_aligned(cryp->out_sg, cryp->total_out,
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cryp->hw_blocksize);
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+ if (ret)
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+ return ret;
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+
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+ if (is_gcm(cryp) || is_ccm(cryp))
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+ if (!IS_ALIGNED(cryp->areq->assoclen, sizeof(u32)))
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+ ret = -EINVAL;
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return ret;
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}
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static void sg_copy_buf(void *buf, struct scatterlist *sg,
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- unsigned int start, unsigned int nbytes, int out)
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+ unsigned int start, unsigned int first_len,
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+ unsigned int zero_len,
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+ unsigned int second_len,
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+ int out)
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{
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struct scatter_walk walk;
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+ unsigned int nbytes = first_len + zero_len + second_len;
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+ u32 empty = 0;
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if (!nbytes)
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return;
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scatterwalk_start(&walk, sg);
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scatterwalk_advance(&walk, start);
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- scatterwalk_copychunks(buf, &walk, nbytes, out);
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+ if (first_len)
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+ scatterwalk_copychunks(buf, &walk, first_len, out);
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+ if (zero_len)
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+ memcpy(buf+first_len, &empty, zero_len);
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+ if (second_len)
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+ scatterwalk_copychunks(buf + first_len + zero_len, &walk,
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+ second_len, out);
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+
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scatterwalk_done(&walk, out, 0);
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}
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static int stm32_cryp_copy_sgs(struct stm32_cryp *cryp)
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{
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void *buf_in, *buf_out;
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- int pages, total_in, total_out;
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+ int pages_in, pages_out, total_in, total_out;
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if (!stm32_cryp_check_io_aligned(cryp)) {
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cryp->sgs_copied = 0;
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@@ -351,29 +366,37 @@ static int stm32_cryp_copy_sgs(struct stm32_cryp *cryp)
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}
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total_in = ALIGN(cryp->total_in, cryp->hw_blocksize);
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- pages = total_in ? get_order(total_in) : 1;
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- buf_in = (void *)__get_free_pages(GFP_ATOMIC, pages);
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+ pages_in = total_in ? get_order(total_in) : 1;
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+ buf_in = (void *)__get_free_pages(GFP_ATOMIC, pages_in);
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total_out = ALIGN(cryp->total_out, cryp->hw_blocksize);
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- pages = total_out ? get_order(total_out) : 1;
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- buf_out = (void *)__get_free_pages(GFP_ATOMIC, pages);
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+ pages_out = total_out ? get_order(total_out) : 1;
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+ buf_out = (void *)__get_free_pages(GFP_ATOMIC, pages_out);
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if (!buf_in || !buf_out) {
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dev_err(cryp->dev, "Can't allocate pages when unaligned\n");
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+ if (buf_in)
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+ free_pages((unsigned long)buf_in, pages_in);
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cryp->sgs_copied = 0;
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return -EFAULT;
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}
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- sg_copy_buf(buf_in, cryp->in_sg, 0, cryp->total_in, 0);
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+
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+ if ((is_gcm(cryp) || is_ccm(cryp)) && (!IS_ALIGNED(cryp->areq->assoclen,
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+ sizeof(u32)))) {
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+ sg_copy_buf(buf_in, cryp->in_sg, 0, cryp->areq->assoclen,
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+ ALIGN(cryp->areq->assoclen, sizeof(u32))
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+ - cryp->areq->assoclen,
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+ cryp->areq->cryptlen, 0);
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+ } else
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+ sg_copy_buf(buf_in, cryp->in_sg, 0, cryp->total_in, 0, 0, 0);
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sg_init_one(&cryp->in_sgl, buf_in, total_in);
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cryp->in_sg = &cryp->in_sgl;
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- cryp->in_sg_len = 1;
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sg_init_one(&cryp->out_sgl, buf_out, total_out);
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cryp->out_sg_save = cryp->out_sg;
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cryp->out_sg = &cryp->out_sgl;
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- cryp->out_sg_len = 1;
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cryp->sgs_copied = 1;
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@@ -654,14 +677,14 @@ static void stm32_cryp_finish_req(struct stm32_cryp *cryp, int err)
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buf_in = sg_virt(&cryp->in_sgl);
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buf_out = sg_virt(&cryp->out_sgl);
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- sg_copy_buf(buf_out, cryp->out_sg_save, 0,
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- cryp->total_out_save, 1);
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+ sg_copy_buf(buf_out, cryp->out_sg_save, 0, 0, 0,
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+ cryp->total_out, 1);
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- len = ALIGN(cryp->total_in_save, cryp->hw_blocksize);
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+ len = ALIGN(cryp->total_in, cryp->hw_blocksize);
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pages = len ? get_order(len) : 1;
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free_pages((unsigned long)buf_in, pages);
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- len = ALIGN(cryp->total_out_save, cryp->hw_blocksize);
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+ len = ALIGN(cryp->total_out, cryp->hw_blocksize);
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pages = len ? get_order(len) : 1;
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free_pages((unsigned long)buf_out, pages);
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}
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@@ -801,7 +824,20 @@ static int stm32_cryp_aes_aead_setkey(struct crypto_aead *tfm, const u8 *key,
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static int stm32_cryp_aes_gcm_setauthsize(struct crypto_aead *tfm,
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unsigned int authsize)
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{
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- return authsize == AES_BLOCK_SIZE ? 0 : -EINVAL;
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+ switch (authsize) {
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+ case 4:
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+ case 8:
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+ case 12:
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+ case 13:
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+ case 14:
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+ case 15:
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+ case 16:
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ return 0;
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}
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static int stm32_cryp_aes_ccm_setauthsize(struct crypto_aead *tfm,
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@@ -825,31 +861,61 @@ static int stm32_cryp_aes_ccm_setauthsize(struct crypto_aead *tfm,
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static int stm32_cryp_aes_ecb_encrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % AES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_AES | FLG_ECB | FLG_ENCRYPT);
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}
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static int stm32_cryp_aes_ecb_decrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % AES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_AES | FLG_ECB);
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}
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static int stm32_cryp_aes_cbc_encrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % AES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_AES | FLG_CBC | FLG_ENCRYPT);
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}
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static int stm32_cryp_aes_cbc_decrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % AES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_AES | FLG_CBC);
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}
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static int stm32_cryp_aes_ctr_encrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_AES | FLG_CTR | FLG_ENCRYPT);
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}
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static int stm32_cryp_aes_ctr_decrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_AES | FLG_CTR);
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}
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@@ -863,53 +929,122 @@ static int stm32_cryp_aes_gcm_decrypt(struct aead_request *req)
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return stm32_cryp_aead_crypt(req, FLG_AES | FLG_GCM);
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}
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+static inline int crypto_ccm_check_iv(const u8 *iv)
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+{
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+ /* 2 <= L <= 8, so 1 <= L' <= 7. */
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+ if (iv[0] < 1 || iv[0] > 7)
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+ return -EINVAL;
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+
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+ return 0;
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+}
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+
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static int stm32_cryp_aes_ccm_encrypt(struct aead_request *req)
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{
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+ int err;
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+
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+ err = crypto_ccm_check_iv(req->iv);
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+ if (err)
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+ return err;
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+
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return stm32_cryp_aead_crypt(req, FLG_AES | FLG_CCM | FLG_ENCRYPT);
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}
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static int stm32_cryp_aes_ccm_decrypt(struct aead_request *req)
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{
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+ int err;
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+
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+ err = crypto_ccm_check_iv(req->iv);
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+ if (err)
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+ return err;
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+
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return stm32_cryp_aead_crypt(req, FLG_AES | FLG_CCM);
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}
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static int stm32_cryp_des_ecb_encrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % DES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_DES | FLG_ECB | FLG_ENCRYPT);
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}
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static int stm32_cryp_des_ecb_decrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % DES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_DES | FLG_ECB);
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}
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static int stm32_cryp_des_cbc_encrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % DES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_DES | FLG_CBC | FLG_ENCRYPT);
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}
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static int stm32_cryp_des_cbc_decrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % DES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_DES | FLG_CBC);
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}
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static int stm32_cryp_tdes_ecb_encrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % DES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_TDES | FLG_ECB | FLG_ENCRYPT);
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}
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static int stm32_cryp_tdes_ecb_decrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % DES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_TDES | FLG_ECB);
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}
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static int stm32_cryp_tdes_cbc_encrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % DES_BLOCK_SIZE)
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_TDES | FLG_CBC | FLG_ENCRYPT);
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}
|
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static int stm32_cryp_tdes_cbc_decrypt(struct skcipher_request *req)
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{
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+ if (req->cryptlen % DES_BLOCK_SIZE)
|
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+ return -EINVAL;
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+
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+ if (req->cryptlen == 0)
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+ return 0;
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+
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return stm32_cryp_crypt(req, FLG_TDES | FLG_CBC);
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}
|
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@@ -971,36 +1106,25 @@ static int stm32_cryp_prepare_req(struct skcipher_request *req,
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cryp->areq = areq;
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cryp->req = NULL;
|
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cryp->authsize = crypto_aead_authsize(crypto_aead_reqtfm(areq));
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- cryp->total_in = areq->assoclen + areq->cryptlen;
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+ cryp->total_in = ALIGN(areq->assoclen, sizeof(u32))
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+ + areq->cryptlen;
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if (is_encrypt(cryp))
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/* Append auth tag to output */
|
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- cryp->total_out = cryp->total_in + cryp->authsize;
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+ cryp->total_out = areq->assoclen + areq->cryptlen
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+ + cryp->authsize;
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else
|
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/* No auth tag in output */
|
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- cryp->total_out = cryp->total_in - cryp->authsize;
|
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+ cryp->total_out = areq->assoclen + areq->cryptlen
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+ - cryp->authsize;
|
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}
|
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|
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- cryp->total_in_save = cryp->total_in;
|
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- cryp->total_out_save = cryp->total_out;
|
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+ cryp->remain_in = cryp->total_in;
|
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+ cryp->remain_out = cryp->total_out;
|
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|
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cryp->in_sg = req ? req->src : areq->src;
|
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cryp->out_sg = req ? req->dst : areq->dst;
|
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cryp->out_sg_save = cryp->out_sg;
|
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|
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- cryp->in_sg_len = sg_nents_for_len(cryp->in_sg, cryp->total_in);
|
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- if (cryp->in_sg_len < 0) {
|
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- dev_err(cryp->dev, "Cannot get in_sg_len\n");
|
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- ret = cryp->in_sg_len;
|
||||
- return ret;
|
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- }
|
||||
-
|
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- cryp->out_sg_len = sg_nents_for_len(cryp->out_sg, cryp->total_out);
|
||||
- if (cryp->out_sg_len < 0) {
|
||||
- dev_err(cryp->dev, "Cannot get out_sg_len\n");
|
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- ret = cryp->out_sg_len;
|
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- return ret;
|
||||
- }
|
||||
-
|
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ret = stm32_cryp_copy_sgs(cryp);
|
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if (ret)
|
||||
return ret;
|
||||
@@ -1011,7 +1135,7 @@ static int stm32_cryp_prepare_req(struct skcipher_request *req,
|
||||
if (is_gcm(cryp) || is_ccm(cryp)) {
|
||||
/* In output, jump after assoc data */
|
||||
scatterwalk_advance(&cryp->out_walk, cryp->areq->assoclen);
|
||||
- cryp->total_out -= cryp->areq->assoclen;
|
||||
+ cryp->remain_out -= cryp->areq->assoclen;
|
||||
}
|
||||
|
||||
ret = stm32_cryp_hw_init(cryp);
|
||||
@@ -1130,7 +1254,7 @@ static int stm32_cryp_read_auth_tag(struct stm32_cryp *cryp)
|
||||
stm32_cryp_write(cryp, CRYP_DIN, size_bit);
|
||||
|
||||
size_bit = is_encrypt(cryp) ? cryp->areq->cryptlen :
|
||||
- cryp->areq->cryptlen - AES_BLOCK_SIZE;
|
||||
+ cryp->areq->cryptlen - cryp->authsize;
|
||||
size_bit *= 8;
|
||||
if (cryp->caps->swap_final)
|
||||
size_bit = (__force u32)cpu_to_be32(size_bit);
|
||||
@@ -1169,14 +1293,14 @@ static int stm32_cryp_read_auth_tag(struct stm32_cryp *cryp)
|
||||
dst = sg_virt(cryp->out_sg) + _walked_out;
|
||||
|
||||
for (i = 0; i < AES_BLOCK_32; i++) {
|
||||
- if (cryp->total_out >= sizeof(u32)) {
|
||||
+ if (cryp->remain_out >= sizeof(u32)) {
|
||||
/* Read a full u32 */
|
||||
*dst = stm32_cryp_read(cryp, CRYP_DOUT);
|
||||
|
||||
dst = stm32_cryp_next_out(cryp, dst,
|
||||
sizeof(u32));
|
||||
- cryp->total_out -= sizeof(u32);
|
||||
- } else if (!cryp->total_out) {
|
||||
+ cryp->remain_out -= sizeof(u32);
|
||||
+ } else if (!cryp->remain_out) {
|
||||
/* Empty fifo out (data from input padding) */
|
||||
stm32_cryp_read(cryp, CRYP_DOUT);
|
||||
} else {
|
||||
@@ -1184,11 +1308,11 @@ static int stm32_cryp_read_auth_tag(struct stm32_cryp *cryp)
|
||||
d32 = stm32_cryp_read(cryp, CRYP_DOUT);
|
||||
d8 = (u8 *)&d32;
|
||||
|
||||
- for (j = 0; j < cryp->total_out; j++) {
|
||||
+ for (j = 0; j < cryp->remain_out; j++) {
|
||||
*((u8 *)dst) = *(d8++);
|
||||
dst = stm32_cryp_next_out(cryp, dst, 1);
|
||||
}
|
||||
- cryp->total_out = 0;
|
||||
+ cryp->remain_out = 0;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
@@ -1196,7 +1320,7 @@ static int stm32_cryp_read_auth_tag(struct stm32_cryp *cryp)
|
||||
u32 in_tag[AES_BLOCK_32], out_tag[AES_BLOCK_32];
|
||||
|
||||
scatterwalk_map_and_copy(in_tag, cryp->in_sg,
|
||||
- cryp->total_in_save - cryp->authsize,
|
||||
+ cryp->total_in - cryp->authsize,
|
||||
cryp->authsize, 0);
|
||||
|
||||
for (i = 0; i < AES_BLOCK_32; i++)
|
||||
@@ -1256,13 +1380,13 @@ static bool stm32_cryp_irq_read_data(struct stm32_cryp *cryp)
|
||||
dst = sg_virt(cryp->out_sg) + _walked_out;
|
||||
|
||||
for (i = 0; i < cryp->hw_blocksize / sizeof(u32); i++) {
|
||||
- if (likely(cryp->total_out - tag_size >= sizeof(u32))) {
|
||||
+ if (likely(cryp->remain_out - tag_size >= sizeof(u32))) {
|
||||
/* Read a full u32 */
|
||||
*dst = stm32_cryp_read(cryp, CRYP_DOUT);
|
||||
|
||||
dst = stm32_cryp_next_out(cryp, dst, sizeof(u32));
|
||||
- cryp->total_out -= sizeof(u32);
|
||||
- } else if (cryp->total_out == tag_size) {
|
||||
+ cryp->remain_out -= sizeof(u32);
|
||||
+ } else if (cryp->remain_out == tag_size) {
|
||||
/* Empty fifo out (data from input padding) */
|
||||
d32 = stm32_cryp_read(cryp, CRYP_DOUT);
|
||||
} else {
|
||||
@@ -1270,15 +1394,15 @@ static bool stm32_cryp_irq_read_data(struct stm32_cryp *cryp)
|
||||
d32 = stm32_cryp_read(cryp, CRYP_DOUT);
|
||||
d8 = (u8 *)&d32;
|
||||
|
||||
- for (j = 0; j < cryp->total_out - tag_size; j++) {
|
||||
+ for (j = 0; j < cryp->remain_out - tag_size; j++) {
|
||||
*((u8 *)dst) = *(d8++);
|
||||
dst = stm32_cryp_next_out(cryp, dst, 1);
|
||||
}
|
||||
- cryp->total_out = tag_size;
|
||||
+ cryp->remain_out = tag_size;
|
||||
}
|
||||
}
|
||||
|
||||
- return !(cryp->total_out - tag_size) || !cryp->total_in;
|
||||
+ return !(cryp->remain_out - tag_size) || !cryp->remain_in;
|
||||
}
|
||||
|
||||
static void stm32_cryp_irq_write_block(struct stm32_cryp *cryp)
|
||||
@@ -1297,25 +1421,25 @@ static void stm32_cryp_irq_write_block(struct stm32_cryp *cryp)
|
||||
src = sg_virt(cryp->in_sg) + _walked_in;
|
||||
|
||||
for (i = 0; i < cryp->hw_blocksize / sizeof(u32); i++) {
|
||||
- if (likely(cryp->total_in - tag_size >= sizeof(u32))) {
|
||||
+ if (likely(cryp->remain_in - tag_size >= sizeof(u32))) {
|
||||
/* Write a full u32 */
|
||||
stm32_cryp_write(cryp, CRYP_DIN, *src);
|
||||
|
||||
src = stm32_cryp_next_in(cryp, src, sizeof(u32));
|
||||
- cryp->total_in -= sizeof(u32);
|
||||
- } else if (cryp->total_in == tag_size) {
|
||||
+ cryp->remain_in -= sizeof(u32);
|
||||
+ } else if (cryp->remain_in == tag_size) {
|
||||
/* Write padding data */
|
||||
stm32_cryp_write(cryp, CRYP_DIN, 0);
|
||||
} else {
|
||||
/* Write less than an u32 */
|
||||
memset(d8, 0, sizeof(u32));
|
||||
- for (j = 0; j < cryp->total_in - tag_size; j++) {
|
||||
+ for (j = 0; j < cryp->remain_in - tag_size; j++) {
|
||||
d8[j] = *((u8 *)src);
|
||||
src = stm32_cryp_next_in(cryp, src, 1);
|
||||
}
|
||||
|
||||
stm32_cryp_write(cryp, CRYP_DIN, *(u32 *)d8);
|
||||
- cryp->total_in = tag_size;
|
||||
+ cryp->remain_in = tag_size;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1324,7 +1448,7 @@ static void stm32_cryp_irq_write_gcm_padded_data(struct stm32_cryp *cryp)
|
||||
{
|
||||
int err;
|
||||
u32 cfg, tmp[AES_BLOCK_32];
|
||||
- size_t total_in_ori = cryp->total_in;
|
||||
+ size_t remain_in_ori = cryp->remain_in;
|
||||
struct scatterlist *out_sg_ori = cryp->out_sg;
|
||||
unsigned int i;
|
||||
|
||||
@@ -1350,7 +1474,7 @@ static void stm32_cryp_irq_write_gcm_padded_data(struct stm32_cryp *cryp)
|
||||
|
||||
/* b) pad and write the last block */
|
||||
stm32_cryp_irq_write_block(cryp);
|
||||
- cryp->total_in = total_in_ori;
|
||||
+ cryp->remain_in = remain_in_ori;
|
||||
err = stm32_cryp_wait_output(cryp);
|
||||
if (err) {
|
||||
dev_err(cryp->dev, "Timeout (write gcm header)\n");
|
||||
@@ -1360,8 +1484,8 @@ static void stm32_cryp_irq_write_gcm_padded_data(struct stm32_cryp *cryp)
|
||||
/* c) get and store encrypted data */
|
||||
stm32_cryp_irq_read_data(cryp);
|
||||
scatterwalk_map_and_copy(tmp, out_sg_ori,
|
||||
- cryp->total_in_save - total_in_ori,
|
||||
- total_in_ori, 0);
|
||||
+ cryp->total_in - remain_in_ori,
|
||||
+ remain_in_ori, 0);
|
||||
|
||||
/* d) change mode back to AES GCM */
|
||||
cfg &= ~CR_ALGO_MASK;
|
||||
@@ -1375,12 +1499,12 @@ static void stm32_cryp_irq_write_gcm_padded_data(struct stm32_cryp *cryp)
|
||||
|
||||
/* f) write padded data */
|
||||
for (i = 0; i < AES_BLOCK_32; i++) {
|
||||
- if (cryp->total_in)
|
||||
+ if (cryp->remain_in)
|
||||
stm32_cryp_write(cryp, CRYP_DIN, tmp[i]);
|
||||
else
|
||||
stm32_cryp_write(cryp, CRYP_DIN, 0);
|
||||
|
||||
- cryp->total_in -= min_t(size_t, sizeof(u32), cryp->total_in);
|
||||
+ cryp->remain_in -= min_t(size_t, sizeof(u32), cryp->remain_in);
|
||||
}
|
||||
|
||||
/* g) Empty fifo out */
|
||||
@@ -1406,8 +1530,8 @@ static void stm32_cryp_irq_set_npblb(struct stm32_cryp *cryp)
|
||||
cfg &= ~CR_CRYPEN;
|
||||
stm32_cryp_write(cryp, CRYP_CR, cfg);
|
||||
|
||||
- payload_bytes = is_decrypt(cryp) ? cryp->total_in - cryp->authsize :
|
||||
- cryp->total_in;
|
||||
+ payload_bytes = is_decrypt(cryp) ? cryp->remain_in - cryp->authsize :
|
||||
+ cryp->remain_in;
|
||||
cfg |= (cryp->hw_blocksize - payload_bytes) << CR_NBPBL_SHIFT;
|
||||
cfg |= CR_CRYPEN;
|
||||
stm32_cryp_write(cryp, CRYP_CR, cfg);
|
||||
@@ -1418,7 +1542,7 @@ static void stm32_cryp_irq_write_ccm_padded_data(struct stm32_cryp *cryp)
|
||||
int err = 0;
|
||||
u32 cfg, iv1tmp;
|
||||
u32 cstmp1[AES_BLOCK_32], cstmp2[AES_BLOCK_32], tmp[AES_BLOCK_32];
|
||||
- size_t last_total_out, total_in_ori = cryp->total_in;
|
||||
+ size_t last_remain_out, remain_in_ori = cryp->remain_in;
|
||||
struct scatterlist *out_sg_ori = cryp->out_sg;
|
||||
unsigned int i;
|
||||
|
||||
@@ -1453,7 +1577,7 @@ static void stm32_cryp_irq_write_ccm_padded_data(struct stm32_cryp *cryp)
|
||||
|
||||
/* b) pad and write the last block */
|
||||
stm32_cryp_irq_write_block(cryp);
|
||||
- cryp->total_in = total_in_ori;
|
||||
+ cryp->remain_in = remain_in_ori;
|
||||
err = stm32_cryp_wait_output(cryp);
|
||||
if (err) {
|
||||
dev_err(cryp->dev, "Timeout (wite ccm padded data)\n");
|
||||
@@ -1461,13 +1585,13 @@ static void stm32_cryp_irq_write_ccm_padded_data(struct stm32_cryp *cryp)
|
||||
}
|
||||
|
||||
/* c) get and store decrypted data */
|
||||
- last_total_out = cryp->total_out;
|
||||
+ last_remain_out = cryp->remain_out;
|
||||
stm32_cryp_irq_read_data(cryp);
|
||||
|
||||
memset(tmp, 0, sizeof(tmp));
|
||||
scatterwalk_map_and_copy(tmp, out_sg_ori,
|
||||
- cryp->total_out_save - last_total_out,
|
||||
- last_total_out, 0);
|
||||
+ cryp->total_out - last_remain_out,
|
||||
+ last_remain_out, 0);
|
||||
|
||||
/* d) Load again CRYP_CSGCMCCMxR */
|
||||
for (i = 0; i < ARRAY_SIZE(cstmp2); i++)
|
||||
@@ -1501,12 +1625,12 @@ static void stm32_cryp_irq_write_ccm_padded_data(struct stm32_cryp *cryp)
|
||||
|
||||
static void stm32_cryp_irq_write_data(struct stm32_cryp *cryp)
|
||||
{
|
||||
- if (unlikely(!cryp->total_in)) {
|
||||
+ if (unlikely(!cryp->remain_in)) {
|
||||
dev_warn(cryp->dev, "No more data to process\n");
|
||||
return;
|
||||
}
|
||||
|
||||
- if (unlikely(cryp->total_in < AES_BLOCK_SIZE &&
|
||||
+ if (unlikely(cryp->remain_in < AES_BLOCK_SIZE &&
|
||||
(stm32_cryp_get_hw_mode(cryp) == CR_AES_GCM) &&
|
||||
is_encrypt(cryp))) {
|
||||
/* Padding for AES GCM encryption */
|
||||
@@ -1518,7 +1642,7 @@ static void stm32_cryp_irq_write_data(struct stm32_cryp *cryp)
|
||||
stm32_cryp_irq_set_npblb(cryp);
|
||||
}
|
||||
|
||||
- if (unlikely((cryp->total_in - cryp->authsize < AES_BLOCK_SIZE) &&
|
||||
+ if (unlikely((cryp->remain_in - cryp->authsize < AES_BLOCK_SIZE) &&
|
||||
(stm32_cryp_get_hw_mode(cryp) == CR_AES_CCM) &&
|
||||
is_decrypt(cryp))) {
|
||||
/* Padding for AES CCM decryption */
|
||||
@@ -1548,10 +1672,10 @@ static void stm32_cryp_irq_write_gcm_header(struct stm32_cryp *cryp)
|
||||
stm32_cryp_write(cryp, CRYP_DIN, *src);
|
||||
|
||||
src = stm32_cryp_next_in(cryp, src, sizeof(u32));
|
||||
- cryp->total_in -= min_t(size_t, sizeof(u32), cryp->total_in);
|
||||
+ cryp->remain_in -= min_t(size_t, sizeof(u32), cryp->remain_in);
|
||||
|
||||
/* Check if whole header written */
|
||||
- if ((cryp->total_in_save - cryp->total_in) ==
|
||||
+ if ((cryp->total_in - cryp->remain_in) >=
|
||||
cryp->areq->assoclen) {
|
||||
/* Write padding if needed */
|
||||
for (j = i + 1; j < AES_BLOCK_32; j++)
|
||||
@@ -1583,7 +1707,7 @@ static void stm32_cryp_irq_write_gcm_header(struct stm32_cryp *cryp)
|
||||
break;
|
||||
}
|
||||
|
||||
- if (!cryp->total_in)
|
||||
+ if (!cryp->remain_in)
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -1611,7 +1735,7 @@ static void stm32_cryp_irq_write_ccm_header(struct stm32_cryp *cryp)
|
||||
stm32_cryp_write(cryp, CRYP_DIN, *(u32 *)d8);
|
||||
i++;
|
||||
|
||||
- cryp->total_in -= min_t(size_t, 2, cryp->total_in);
|
||||
+ cryp->remain_in -= min_t(size_t, 2, cryp->remain_in);
|
||||
} else {
|
||||
/* Build the two first u32 of B1 */
|
||||
d8[0] = 0xFF;
|
||||
@@ -1632,7 +1756,7 @@ static void stm32_cryp_irq_write_ccm_header(struct stm32_cryp *cryp)
|
||||
stm32_cryp_write(cryp, CRYP_DIN, *(u32 *)d8);
|
||||
i++;
|
||||
|
||||
- cryp->total_in -= min_t(size_t, 2, cryp->total_in);
|
||||
+ cryp->remain_in -= min_t(size_t, 2, cryp->remain_in);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1644,14 +1768,14 @@ static void stm32_cryp_irq_write_ccm_header(struct stm32_cryp *cryp)
|
||||
d8[k] = *((u8 *)src);
|
||||
src = stm32_cryp_next_in(cryp, src, 1);
|
||||
|
||||
- cryp->total_in -= min_t(size_t, 1, cryp->total_in);
|
||||
- if ((cryp->total_in_save - cryp->total_in) == alen)
|
||||
+ cryp->remain_in -= min_t(size_t, 1, cryp->remain_in);
|
||||
+ if ((cryp->total_in - cryp->remain_in) == alen)
|
||||
break;
|
||||
}
|
||||
|
||||
stm32_cryp_write(cryp, CRYP_DIN, *(u32 *)d8);
|
||||
|
||||
- if ((cryp->total_in_save - cryp->total_in) == alen) {
|
||||
+ if ((cryp->total_in - cryp->remain_in) == alen) {
|
||||
/* Write padding if needed */
|
||||
for (j = i + 1; j < AES_BLOCK_32; j++)
|
||||
stm32_cryp_write(cryp, CRYP_DIN, 0);
|
||||
@@ -1955,7 +2079,9 @@ static int stm32_cryp_probe(struct platform_device *pdev)
|
||||
|
||||
cryp->clk = devm_clk_get(dev, NULL);
|
||||
if (IS_ERR(cryp->clk)) {
|
||||
- dev_err(dev, "Could not get clock\n");
|
||||
+ if (PTR_ERR(cryp->clk) != -EPROBE_DEFER)
|
||||
+ dev_err(dev, "Could not get clock\n");
|
||||
+
|
||||
return PTR_ERR(cryp->clk);
|
||||
}
|
||||
|
||||
@@ -1973,7 +2099,11 @@ static int stm32_cryp_probe(struct platform_device *pdev)
|
||||
pm_runtime_enable(dev);
|
||||
|
||||
rst = devm_reset_control_get(dev, NULL);
|
||||
- if (!IS_ERR(rst)) {
|
||||
+ if (IS_ERR(rst)) {
|
||||
+ ret = PTR_ERR(rst);
|
||||
+ if (ret == -EPROBE_DEFER)
|
||||
+ goto err_rst;
|
||||
+ } else {
|
||||
reset_control_assert(rst);
|
||||
udelay(2);
|
||||
reset_control_deassert(rst);
|
||||
@@ -2024,7 +2154,7 @@ static int stm32_cryp_probe(struct platform_device *pdev)
|
||||
spin_lock(&cryp_list.lock);
|
||||
list_del(&cryp->list);
|
||||
spin_unlock(&cryp_list.lock);
|
||||
-
|
||||
+err_rst:
|
||||
pm_runtime_disable(dev);
|
||||
pm_runtime_put_noidle(dev);
|
||||
pm_runtime_disable(dev);
|
||||
diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c
|
||||
index e3e25278a970..da9c3e913e55 100644
|
||||
--- a/drivers/crypto/stm32/stm32-hash.c
|
||||
+++ b/drivers/crypto/stm32/stm32-hash.c
|
||||
@@ -925,15 +925,10 @@ static int stm32_hash_final(struct ahash_request *req)
|
||||
static int stm32_hash_finup(struct ahash_request *req)
|
||||
{
|
||||
struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);
|
||||
- struct stm32_hash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
|
||||
- struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx);
|
||||
int err1, err2;
|
||||
|
||||
rctx->flags |= HASH_FLAGS_FINUP;
|
||||
|
||||
- if (hdev->dma_lch && stm32_hash_dma_aligned_data(req))
|
||||
- rctx->flags &= ~HASH_FLAGS_CPU;
|
||||
-
|
||||
err1 = stm32_hash_update(req);
|
||||
|
||||
if (err1 == -EINPROGRESS || err1 == -EBUSY)
|
||||
@@ -950,7 +945,19 @@ static int stm32_hash_finup(struct ahash_request *req)
|
||||
|
||||
static int stm32_hash_digest(struct ahash_request *req)
|
||||
{
|
||||
- return stm32_hash_init(req) ?: stm32_hash_finup(req);
|
||||
+ int ret;
|
||||
+ struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);
|
||||
+ struct stm32_hash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
|
||||
+ struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx);
|
||||
+
|
||||
+ ret = stm32_hash_init(req);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ if (hdev->dma_lch && stm32_hash_dma_aligned_data(req))
|
||||
+ rctx->flags &= ~HASH_FLAGS_CPU;
|
||||
+
|
||||
+ return stm32_hash_finup(req);
|
||||
}
|
||||
|
||||
static int stm32_hash_export(struct ahash_request *req, void *out)
|
||||
--
|
||||
2.17.1
|
||||
|
||||
|
|
@ -1,62 +0,0 @@
|
|||
From 83c3a690670bb23a4a1fb645cf980056b4f85f4d Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:12:53 +0100
|
||||
Subject: [PATCH 12/22] ARM 5.10.10-stm32mp1-r1 MMC
|
||||
|
||||
---
|
||||
drivers/mmc/core/mmc_test.c | 2 +-
|
||||
drivers/mmc/host/mmci.c | 13 +++++++++----
|
||||
2 files changed, 10 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/drivers/mmc/core/mmc_test.c b/drivers/mmc/core/mmc_test.c
|
||||
index 152e7525ed33..b1f0d04f9430 100644
|
||||
--- a/drivers/mmc/core/mmc_test.c
|
||||
+++ b/drivers/mmc/core/mmc_test.c
|
||||
@@ -2124,7 +2124,7 @@ static int mmc_test_rw_multiple(struct mmc_test_card *test,
|
||||
if (mmc_can_erase(test->card) &&
|
||||
tdata->prepare & MMC_TEST_PREP_ERASE) {
|
||||
ret = mmc_erase(test->card, dev_addr,
|
||||
- size / 512, MMC_SECURE_ERASE_ARG);
|
||||
+ size / 512, test->card->erase_arg);
|
||||
if (ret)
|
||||
ret = mmc_erase(test->card, dev_addr,
|
||||
size / 512, MMC_ERASE_ARG);
|
||||
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
|
||||
index b5a41a7ce165..fa6d85190cdb 100644
|
||||
--- a/drivers/mmc/host/mmci.c
|
||||
+++ b/drivers/mmc/host/mmci.c
|
||||
@@ -1241,7 +1241,11 @@ mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
|
||||
if (!cmd->busy_timeout)
|
||||
cmd->busy_timeout = 10 * MSEC_PER_SEC;
|
||||
|
||||
- clks = (unsigned long long)cmd->busy_timeout * host->cclk;
|
||||
+ if (cmd->busy_timeout > host->mmc->max_busy_timeout)
|
||||
+ clks = (unsigned long long)host->mmc->max_busy_timeout * host->cclk;
|
||||
+ else
|
||||
+ clks = (unsigned long long)cmd->busy_timeout * host->cclk;
|
||||
+
|
||||
do_div(clks, MSEC_PER_SEC);
|
||||
writel_relaxed(clks, host->base + MMCIDATATIMER);
|
||||
}
|
||||
@@ -2091,14 +2095,15 @@ static int mmci_probe(struct amba_device *dev,
|
||||
mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
|
||||
}
|
||||
|
||||
+ /* Variants with mandatory busy timeout in HW needs R1B responses. */
|
||||
+ if (variant->busy_timeout)
|
||||
+ mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
|
||||
+
|
||||
/* Prepare a CMD12 - needed to clear the DPSM on some variants. */
|
||||
host->stop_abort.opcode = MMC_STOP_TRANSMISSION;
|
||||
host->stop_abort.arg = 0;
|
||||
host->stop_abort.flags = MMC_RSP_R1B | MMC_CMD_AC;
|
||||
|
||||
- /* We support these PM capabilities. */
|
||||
- mmc->pm_caps |= MMC_PM_KEEP_POWER;
|
||||
-
|
||||
/*
|
||||
* We can do SGIO
|
||||
*/
|
||||
--
|
||||
2.17.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,16 +1,15 @@
|
|||
From ac8315bbe1279affc860703a9062143e9eab9fa0 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 08:54:31 +0100
|
||||
Subject: [PATCH 01/22] ARM 5.10.10-stm32mp1-r1 MACHINE
|
||||
From 291e33f627836085d320628794cbc836a3241965 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:41 +0200
|
||||
Subject: [PATCH 01/23] ARM 5.10.61-stm32mp1-r2 MACHINE
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
arch/arm/mach-stm32/Kconfig | 2 ++
|
||||
arch/arm/mach-stm32/board-dt.c | 2 ++
|
||||
2 files changed, 4 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
|
||||
index 57699bd8f107..d1f79bc2ccda 100644
|
||||
index 57699bd8f..d1f79bc2c 100644
|
||||
--- a/arch/arm/mach-stm32/Kconfig
|
||||
+++ b/arch/arm/mach-stm32/Kconfig
|
||||
@@ -46,6 +46,8 @@ if ARCH_MULTI_V7
|
||||
|
|
@ -23,7 +22,7 @@ index 57699bd8f107..d1f79bc2ccda 100644
|
|||
|
||||
endif # ARMv7-A
|
||||
diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c
|
||||
index 011d57b488c2..8e06a94421d9 100644
|
||||
index 011d57b48..8e06a9442 100644
|
||||
--- a/arch/arm/mach-stm32/board-dt.c
|
||||
+++ b/arch/arm/mach-stm32/board-dt.c
|
||||
@@ -17,6 +17,8 @@ static const char *const stm32_compat[] __initconst = {
|
||||
|
|
@ -1,18 +1,18 @@
|
|||
From f2f9b8ceceeb143fd478d89126a475d26b11f488 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 08:58:27 +0100
|
||||
Subject: [PATCH 02/22] ARM 5.10.10-stm32mp1-r1 CLOCK
|
||||
From 449ee632a4a7c7e93107d3c1ea502974d4c206f5 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:41 +0200
|
||||
Subject: [PATCH 02/23] ARM 5.10.61-stm32mp1-r2 CLOCK
|
||||
|
||||
---
|
||||
drivers/clk/clk-composite.c | 15 +
|
||||
drivers/clk/clk-stm32mp1.c | 1081 ++++++++++++++++-----
|
||||
drivers/clk/clk-stm32mp1.c | 1153 ++++++++++++++++-----
|
||||
drivers/clk/clk.c | 7 +-
|
||||
drivers/clocksource/timer-stm32-lp.c | 4 +-
|
||||
include/dt-bindings/clock/stm32mp1-clks.h | 33 +
|
||||
5 files changed, 873 insertions(+), 267 deletions(-)
|
||||
5 files changed, 945 insertions(+), 267 deletions(-)
|
||||
|
||||
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
|
||||
index 2ddb54f7d3ab..b49ecd1b9e56 100644
|
||||
index 2ddb54f7d..b49ecd1b9 100644
|
||||
--- a/drivers/clk/clk-composite.c
|
||||
+++ b/drivers/clk/clk-composite.c
|
||||
@@ -41,6 +41,18 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
|
||||
|
|
@ -45,7 +45,7 @@ index 2ddb54f7d3ab..b49ecd1b9e56 100644
|
|||
clk_composite_ops->determine_rate =
|
||||
clk_composite_determine_rate;
|
||||
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
|
||||
index a875649df8b8..bf927befe97b 100644
|
||||
index a875649df..ddaf7dc9b 100644
|
||||
--- a/drivers/clk/clk-stm32mp1.c
|
||||
+++ b/drivers/clk/clk-stm32mp1.c
|
||||
@@ -5,15 +5,28 @@
|
||||
|
|
@ -270,12 +270,12 @@ index a875649df8b8..bf927befe97b 100644
|
|||
+ struct clk_mux *mux = to_clk_mux(mux_hw);
|
||||
+ struct stm32_clk_mmux *clk_mmux = to_clk_mmux(mux);
|
||||
+ int i = 0;
|
||||
+
|
||||
|
||||
-#define to_pll(_hw) container_of(_hw, struct stm32_pll_obj, hw)
|
||||
+ for (i = 0; i < clk_mmux->mmux->nbr_clk; i++)
|
||||
+ if (__clk_is_enabled(clk_mmux->mmux->hws[i]->clk))
|
||||
+ return false;
|
||||
|
||||
-#define to_pll(_hw) container_of(_hw, struct stm32_pll_obj, hw)
|
||||
+
|
||||
+ return true;
|
||||
+}
|
||||
|
||||
|
|
@ -380,24 +380,24 @@ index a875649df8b8..bf927befe97b 100644
|
|||
- u32 reg;
|
||||
- unsigned long flags = 0;
|
||||
+ struct clk_hw *composite_hw = __clk_get_hw(hw->clk);
|
||||
+
|
||||
+ clk_mmux_restore_parent(composite_hw);
|
||||
+ mp1_mgate_clk_enable(hw);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
|
||||
- spin_lock_irqsave(clk_elem->lock, flags);
|
||||
+static void mp1_mgate_clk_disable_safe(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct clk_hw *composite_hw = __clk_get_hw(hw->clk);
|
||||
+ clk_mmux_restore_parent(composite_hw);
|
||||
+ mp1_mgate_clk_enable(hw);
|
||||
|
||||
- reg = readl_relaxed(clk_elem->reg);
|
||||
- reg &= ~PLL_ON;
|
||||
- writel_relaxed(reg, clk_elem->reg);
|
||||
+ mp1_mgate_clk_disable(hw);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void mp1_mgate_clk_disable_safe(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct clk_hw *composite_hw = __clk_get_hw(hw->clk);
|
||||
|
||||
- spin_unlock_irqrestore(clk_elem->lock, flags);
|
||||
+ mp1_mgate_clk_disable(hw);
|
||||
+
|
||||
+ if (is_all_clk_on_switch_are_off(composite_hw))
|
||||
+ clk_mmux_set_safe_position(composite_hw);
|
||||
}
|
||||
|
|
@ -524,10 +524,10 @@ index a875649df8b8..bf927befe97b 100644
|
|||
- }
|
||||
+ if (bit_status)
|
||||
+ udelay(120);
|
||||
+
|
||||
+ } while (bit_status && --timeout);
|
||||
|
||||
- return rate + rate_frac;
|
||||
+ } while (bit_status && --timeout);
|
||||
+
|
||||
+ return bit_status;
|
||||
}
|
||||
|
||||
|
|
@ -1216,20 +1216,20 @@ index a875649df8b8..bf927befe97b 100644
|
|||
unsigned int maxbinding;
|
||||
+ bool (*check_security)(const struct clock_config *cfg);
|
||||
+ u32 clear_offset;
|
||||
};
|
||||
|
||||
-static struct stm32_clock_match_data stm32mp1_data = {
|
||||
+static struct stm32_rcc_match_data stm32mp1_data = {
|
||||
.cfg = stm32mp1_clock_cfg,
|
||||
.num = ARRAY_SIZE(stm32mp1_clock_cfg),
|
||||
.maxbinding = STM32MP1_LAST_CLK,
|
||||
+ .clear_offset = RCC_CLR,
|
||||
+};
|
||||
+
|
||||
+static struct stm32_rcc_match_data stm32mp1_data_secure = {
|
||||
+static struct stm32_rcc_match_data stm32mp1_data = {
|
||||
+ .cfg = stm32mp1_clock_cfg,
|
||||
+ .num = ARRAY_SIZE(stm32mp1_clock_cfg),
|
||||
+ .maxbinding = STM32MP1_LAST_CLK,
|
||||
+ .clear_offset = RCC_CLR,
|
||||
};
|
||||
|
||||
-static struct stm32_clock_match_data stm32mp1_data = {
|
||||
+static struct stm32_rcc_match_data stm32mp1_data_secure = {
|
||||
.cfg = stm32mp1_clock_cfg,
|
||||
.num = ARRAY_SIZE(stm32mp1_clock_cfg),
|
||||
.maxbinding = STM32MP1_LAST_CLK,
|
||||
+ .check_security = &stm32_check_security,
|
||||
+ .clear_offset = RCC_CLR,
|
||||
};
|
||||
|
|
@ -1249,7 +1249,7 @@ index a875649df8b8..bf927befe97b 100644
|
|||
|
||||
static int stm32_register_hw_clk(struct device *dev,
|
||||
struct clk_hw_onecell_data *clk_data,
|
||||
@@ -2040,28 +2317,126 @@ static int stm32_register_hw_clk(struct device *dev,
|
||||
@@ -2040,28 +2317,195 @@ static int stm32_register_hw_clk(struct device *dev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1373,6 +1373,75 @@ index a875649df8b8..bf927befe97b 100644
|
|||
+ return reset_controller_register(&reset_data->rcdev);
|
||||
+}
|
||||
+
|
||||
+static struct stm32_clk_boot_on {
|
||||
+ struct clk **clks;
|
||||
+ int nb;
|
||||
+} *clk_boot_on;
|
||||
+
|
||||
+static struct stm32_clk_boot_on *clk_boot_on;
|
||||
+
|
||||
+static int stm32_clk_boot_on_enable(struct device_node *np,
|
||||
+ struct clk_hw_onecell_data *clk_data)
|
||||
+{
|
||||
+ struct of_phandle_args clkspec;
|
||||
+ struct property *prop;
|
||||
+ const __be32 *cur;
|
||||
+ struct clk **clks;
|
||||
+ int nb, count = 0;
|
||||
+
|
||||
+ nb = of_property_count_u32_elems(np, "clocks-boot-on");
|
||||
+ if (!nb)
|
||||
+ return 0;
|
||||
+
|
||||
+ clks = kcalloc(nb, sizeof(struct clk_bulk_data *), GFP_KERNEL);
|
||||
+ if (!clks)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ clk_boot_on = kzalloc(sizeof(*clk_boot_on), GFP_KERNEL);
|
||||
+ if (!clk_boot_on) {
|
||||
+ kfree(clks);
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+
|
||||
+ of_property_for_each_u32(np, "clocks-boot-on", prop, cur,
|
||||
+ clkspec.args[0]) {
|
||||
+ struct clk_hw *hw;
|
||||
+
|
||||
+ hw = of_clk_hw_onecell_get(&clkspec, clk_data);
|
||||
+ if (IS_ERR(hw))
|
||||
+ continue;
|
||||
+
|
||||
+ if (clk_prepare_enable(hw->clk)) {
|
||||
+ pr_warn("can't enable clock %s !\n",
|
||||
+ clk_hw_get_name(hw));
|
||||
+ continue;
|
||||
+ }
|
||||
+
|
||||
+ clks[count++] = hw->clk;
|
||||
+ }
|
||||
+
|
||||
+ clk_boot_on->clks = clks;
|
||||
+ clk_boot_on->nb = count;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int stm32_clk_boot_on_disable(void)
|
||||
+{
|
||||
+ int i;
|
||||
+
|
||||
+ if (clk_boot_on) {
|
||||
+ for (i = 0; i < clk_boot_on->nb; i++)
|
||||
+ clk_disable_unprepare(clk_boot_on->clks[i]);
|
||||
+
|
||||
+ kfree(clk_boot_on->clks);
|
||||
+ kfree(clk_boot_on);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+late_initcall_sync(stm32_clk_boot_on_disable);
|
||||
+
|
||||
+static int stm32_rcc_clock_init(struct device *dev, void __iomem *base,
|
||||
+ const struct of_device_id *match)
|
||||
+{
|
||||
|
|
@ -1390,7 +1459,7 @@ index a875649df8b8..bf927befe97b 100644
|
|||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -2073,36 +2448,218 @@ static int stm32_rcc_init(struct device_node *np,
|
||||
@@ -2073,36 +2517,221 @@ static int stm32_rcc_init(struct device_node *np,
|
||||
hws[n] = ERR_PTR(-ENOENT);
|
||||
|
||||
for (n = 0; n < data->num; n++) {
|
||||
|
|
@ -1413,8 +1482,11 @@ index a875649df8b8..bf927befe97b 100644
|
|||
}
|
||||
|
||||
- return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
|
||||
+ return of_clk_add_hw_provider(dev_of_node(dev), of_clk_hw_onecell_get,
|
||||
+ clk_data);
|
||||
+ err = of_clk_add_hw_provider(dev_of_node(dev), of_clk_hw_onecell_get, clk_data);
|
||||
+ if (!err)
|
||||
+ stm32_clk_boot_on_enable(dev_of_node(dev), clk_data);
|
||||
+
|
||||
+ return err;
|
||||
}
|
||||
|
||||
-static void stm32mp1_rcc_init(struct device_node *np)
|
||||
|
|
@ -1441,11 +1513,8 @@ index a875649df8b8..bf927befe97b 100644
|
|||
+ if (err) {
|
||||
+ pr_err("stm32mp1 reset failed to initialize\n");
|
||||
+ return err;
|
||||
}
|
||||
|
||||
- if (stm32_rcc_init(np, base, stm32mp1_match_data)) {
|
||||
- iounmap(base);
|
||||
- of_node_put(np);
|
||||
+ }
|
||||
+
|
||||
+ /* RCC Clock Configuration */
|
||||
+ err = stm32_rcc_clock_init(dev, base, match);
|
||||
+ if (err) {
|
||||
|
|
@ -1467,7 +1536,7 @@ index a875649df8b8..bf927befe97b 100644
|
|||
+ if (!rcc_base) {
|
||||
+ dev_err(dev, "%pOFn: unable to map resource", dev_of_node(dev));
|
||||
+ goto out;
|
||||
}
|
||||
+ }
|
||||
+
|
||||
+ ret = stm32_rcc_init(dev, rcc_base, stm32mp1_match_data);
|
||||
+ if (ret)
|
||||
|
|
@ -1530,9 +1599,8 @@ index a875649df8b8..bf927befe97b 100644
|
|||
+ SMC(STM32_SVC_RCC, STM32_WRITE, RCC_CIFR, RCC_IRQ_FLAGS_MASK);
|
||||
+
|
||||
+ return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
-CLK_OF_DECLARE_DRIVER(stm32mp1_rcc, "st,stm32mp1-rcc", stm32mp1_rcc_init);
|
||||
+}
|
||||
+
|
||||
+static int stm32_rcc_init_pwr(struct device *dev, void __iomem *rcc_base)
|
||||
+{
|
||||
+ int irq;
|
||||
|
|
@ -1544,8 +1612,11 @@ index a875649df8b8..bf927befe97b 100644
|
|||
+ if (irq <= 0) {
|
||||
+ pr_err("%s: failed to get RCC generic IRQ\n", __func__);
|
||||
+ return irq ? irq : -ENXIO;
|
||||
+ }
|
||||
+
|
||||
}
|
||||
|
||||
- if (stm32_rcc_init(np, base, stm32mp1_match_data)) {
|
||||
- iounmap(base);
|
||||
- of_node_put(np);
|
||||
+ ret = devm_request_irq(dev, irq, stm32mp1_rcc_irq_handler, IRQF_ONESHOT,
|
||||
+ "rcc irq", NULL);
|
||||
+ if (ret) {
|
||||
|
|
@ -1585,11 +1656,12 @@ index a875649df8b8..bf927befe97b 100644
|
|||
+ clk_deps[i] = devm_clk_get(dev, __clk_get_name(clk));
|
||||
+ clk_put(clk);
|
||||
+ }
|
||||
+ }
|
||||
}
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
}
|
||||
|
||||
-CLK_OF_DECLARE_DRIVER(stm32mp1_rcc, "st,stm32mp1-rcc", stm32mp1_rcc_init);
|
||||
+static int stm32mp1_rcc_clocks_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device *dev = &pdev->dev;
|
||||
|
|
@ -1627,7 +1699,7 @@ index a875649df8b8..bf927befe97b 100644
|
|||
+}
|
||||
+core_initcall(stm32mp1_clocks_init);
|
||||
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
|
||||
index f83dac54ed85..6939ea978868 100644
|
||||
index 61c78714c..9b9a17695 100644
|
||||
--- a/drivers/clk/clk.c
|
||||
+++ b/drivers/clk/clk.c
|
||||
@@ -1743,6 +1743,7 @@ static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
|
||||
|
|
@ -1659,7 +1731,7 @@ index f83dac54ed85..6939ea978868 100644
|
|||
}
|
||||
|
||||
diff --git a/drivers/clocksource/timer-stm32-lp.c b/drivers/clocksource/timer-stm32-lp.c
|
||||
index db2841d0beb8..90c10f378df2 100644
|
||||
index db2841d0b..90c10f378 100644
|
||||
--- a/drivers/clocksource/timer-stm32-lp.c
|
||||
+++ b/drivers/clocksource/timer-stm32-lp.c
|
||||
@@ -168,9 +168,7 @@ static int stm32_clkevent_lp_probe(struct platform_device *pdev)
|
||||
|
|
@ -1674,7 +1746,7 @@ index db2841d0beb8..90c10f378df2 100644
|
|||
ret = dev_pm_set_wake_irq(&pdev->dev, irq);
|
||||
if (ret)
|
||||
diff --git a/include/dt-bindings/clock/stm32mp1-clks.h b/include/dt-bindings/clock/stm32mp1-clks.h
|
||||
index 4cdaf135829c..ec7b1a93200f 100644
|
||||
index 4cdaf1358..ec7b1a932 100644
|
||||
--- a/include/dt-bindings/clock/stm32mp1-clks.h
|
||||
+++ b/include/dt-bindings/clock/stm32mp1-clks.h
|
||||
@@ -179,6 +179,12 @@
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
From 147c507542ee7feb5bd85212669eeaec2c0420b1 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 08:56:21 +0100
|
||||
Subject: [PATCH 03/22] ARM 5.10.10-stm32mp1-r1 CPUFREQ
|
||||
From f425522a8000b8fe201de2db79367a1a7e7b7fdb Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:41 +0200
|
||||
Subject: [PATCH 03/23] ARM 5.10.61-stm32mp1-r2 CPUFREQ
|
||||
|
||||
---
|
||||
drivers/cpufreq/Kconfig.arm | 7 ++
|
||||
|
|
@ -12,7 +12,7 @@ Subject: [PATCH 03/22] ARM 5.10.10-stm32mp1-r1 CPUFREQ
|
|||
create mode 100644 drivers/cpufreq/stm32-cpufreq.c
|
||||
|
||||
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
|
||||
index 1f73fa75b1a0..56b210670b50 100644
|
||||
index 1f73fa75b..56b210670 100644
|
||||
--- a/drivers/cpufreq/Kconfig.arm
|
||||
+++ b/drivers/cpufreq/Kconfig.arm
|
||||
@@ -289,6 +289,13 @@ config ARM_STI_CPUFREQ
|
||||
|
|
@ -30,7 +30,7 @@ index 1f73fa75b1a0..56b210670b50 100644
|
|||
bool
|
||||
depends on CPUFREQ_DT && ARCH_TANGO
|
||||
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
|
||||
index f1b7e3dd6e5d..b373f97f26a2 100644
|
||||
index f1b7e3dd6..b373f97f2 100644
|
||||
--- a/drivers/cpufreq/Makefile
|
||||
+++ b/drivers/cpufreq/Makefile
|
||||
@@ -78,6 +78,7 @@ obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o
|
||||
|
|
@ -42,10 +42,10 @@ index f1b7e3dd6e5d..b373f97f26a2 100644
|
|||
obj-$(CONFIG_ARM_TANGO_CPUFREQ) += tango-cpufreq.o
|
||||
obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o
|
||||
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
index 3776d960f405..86fcbb6fa5b8 100644
|
||||
index 1c192a42f..4d72dbb3a 100644
|
||||
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
@@ -138,6 +138,9 @@ static const struct of_device_id blacklist[] __initconst = {
|
||||
@@ -140,6 +140,9 @@ static const struct of_device_id blacklist[] __initconst = {
|
||||
{ .compatible = "st,stih407", },
|
||||
{ .compatible = "st,stih410", },
|
||||
{ .compatible = "st,stih418", },
|
||||
|
|
@ -57,7 +57,7 @@ index 3776d960f405..86fcbb6fa5b8 100644
|
|||
|
||||
diff --git a/drivers/cpufreq/stm32-cpufreq.c b/drivers/cpufreq/stm32-cpufreq.c
|
||||
new file mode 100644
|
||||
index 000000000000..35fb3520d48d
|
||||
index 000000000..35fb3520d
|
||||
--- /dev/null
|
||||
+++ b/drivers/cpufreq/stm32-cpufreq.c
|
||||
@@ -0,0 +1,101 @@
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,17 +1,17 @@
|
|||
From 8419770f37f0543bc5c2390651c46892dc520018 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 08:58:56 +0100
|
||||
Subject: [PATCH 05/22] ARM 5.10.10-stm32mp1-r1 DMA
|
||||
From f7324af2c2808c281ecd773cdc1efd68026aa3fd Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:42 +0200
|
||||
Subject: [PATCH 05/23] ARM 5.10.61-stm32mp1-r2 DMA
|
||||
|
||||
---
|
||||
drivers/dma/dmaengine.c | 34 ++
|
||||
drivers/dma/stm32-dma.c | 1011 ++++++++++++++++++++++++++++++++-----
|
||||
drivers/dma/stm32-mdma.c | 188 +++++--
|
||||
drivers/dma/stm32-dma.c | 1207 +++++++++++++++++++++++++++++++++----
|
||||
drivers/dma/stm32-mdma.c | 188 ++++--
|
||||
include/linux/dmaengine.h | 11 +
|
||||
4 files changed, 1070 insertions(+), 174 deletions(-)
|
||||
4 files changed, 1272 insertions(+), 168 deletions(-)
|
||||
|
||||
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
|
||||
index 962cbb5e5f7f..1381f15eb6f2 100644
|
||||
index af3ee288b..8a0cf0d8a 100644
|
||||
--- a/drivers/dma/dmaengine.c
|
||||
+++ b/drivers/dma/dmaengine.c
|
||||
@@ -873,6 +873,33 @@ struct dma_chan *dma_request_chan(struct device *dev, const char *name)
|
||||
|
|
@ -63,7 +63,7 @@ index 962cbb5e5f7f..1381f15eb6f2 100644
|
|||
* dmaengine_get - register interest in dma_channels
|
||||
*/
|
||||
diff --git a/drivers/dma/stm32-dma.c b/drivers/dma/stm32-dma.c
|
||||
index d0055d2f0b9a..1d89e0807ef0 100644
|
||||
index 1150aa90e..5dd476365 100644
|
||||
--- a/drivers/dma/stm32-dma.c
|
||||
+++ b/drivers/dma/stm32-dma.c
|
||||
@@ -14,12 +14,14 @@
|
||||
|
|
@ -147,10 +147,11 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
struct stm32_dma_sg_req sg_req[];
|
||||
};
|
||||
|
||||
@@ -206,6 +236,10 @@ struct stm32_dma_chan {
|
||||
@@ -206,6 +236,11 @@ struct stm32_dma_chan {
|
||||
u32 threshold;
|
||||
u32 mem_burst;
|
||||
u32 mem_width;
|
||||
+ enum dma_status status;
|
||||
+ struct stm32_dma_mdma mchan;
|
||||
+ u32 use_mdma;
|
||||
+ u32 sram_size;
|
||||
|
|
@ -158,7 +159,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
};
|
||||
|
||||
struct stm32_dma_device {
|
||||
@@ -214,6 +248,7 @@ struct stm32_dma_device {
|
||||
@@ -214,6 +249,7 @@ struct stm32_dma_device {
|
||||
struct clk *clk;
|
||||
bool mem2mem;
|
||||
struct stm32_dma_chan chan[STM32_DMA_MAX_CHANNELS];
|
||||
|
|
@ -166,7 +167,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
};
|
||||
|
||||
static struct stm32_dma_device *stm32_dma_get_dev(struct stm32_dma_chan *chan)
|
||||
@@ -264,6 +299,7 @@ static int stm32_dma_get_width(struct stm32_dma_chan *chan,
|
||||
@@ -264,6 +300,7 @@ static int stm32_dma_get_width(struct stm32_dma_chan *chan,
|
||||
}
|
||||
|
||||
static enum dma_slave_buswidth stm32_dma_get_max_width(u32 buf_len,
|
||||
|
|
@ -174,7 +175,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
u32 threshold)
|
||||
{
|
||||
enum dma_slave_buswidth max_width;
|
||||
@@ -277,6 +313,9 @@ static enum dma_slave_buswidth stm32_dma_get_max_width(u32 buf_len,
|
||||
@@ -277,6 +314,9 @@ static enum dma_slave_buswidth stm32_dma_get_max_width(u32 buf_len,
|
||||
max_width > DMA_SLAVE_BUSWIDTH_1_BYTE)
|
||||
max_width = max_width >> 1;
|
||||
|
||||
|
|
@ -184,7 +185,30 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
return max_width;
|
||||
}
|
||||
|
||||
@@ -484,12 +523,20 @@ static void stm32_dma_stop(struct stm32_dma_chan *chan)
|
||||
@@ -374,6 +414,16 @@ static void stm32_dma_set_fifo_config(struct stm32_dma_chan *chan,
|
||||
}
|
||||
}
|
||||
|
||||
+static void stm32_dma_slave_caps(struct dma_chan *c, struct dma_slave_caps *caps)
|
||||
+{
|
||||
+ struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
|
||||
+
|
||||
+ if (chan->use_mdma)
|
||||
+ caps->max_sg_burst = 0; /* unlimited */
|
||||
+ else
|
||||
+ caps->max_sg_burst = STM32_DMA_ALIGNED_MAX_DATA_ITEMS;
|
||||
+}
|
||||
+
|
||||
static int stm32_dma_slave_config(struct dma_chan *c,
|
||||
struct dma_slave_config *config)
|
||||
{
|
||||
@@ -479,17 +529,26 @@ static void stm32_dma_stop(struct stm32_dma_chan *chan)
|
||||
}
|
||||
|
||||
chan->busy = false;
|
||||
+ chan->status = DMA_COMPLETE;
|
||||
}
|
||||
|
||||
static int stm32_dma_terminate_all(struct dma_chan *c)
|
||||
{
|
||||
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
|
||||
|
|
@ -206,7 +230,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
vchan_terminate_vdesc(&chan->desc->vdesc);
|
||||
if (chan->busy)
|
||||
stm32_dma_stop(chan);
|
||||
@@ -503,9 +550,103 @@ static int stm32_dma_terminate_all(struct dma_chan *c)
|
||||
@@ -503,9 +562,103 @@ static int stm32_dma_terminate_all(struct dma_chan *c)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -310,7 +334,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
|
||||
vchan_synchronize(&chan->vchan);
|
||||
}
|
||||
@@ -528,65 +669,213 @@ static void stm32_dma_dump_reg(struct stm32_dma_chan *chan)
|
||||
@@ -528,7 +681,244 @@ static void stm32_dma_dump_reg(struct stm32_dma_chan *chan)
|
||||
dev_dbg(chan2dev(chan), "SFCR: 0x%08x\n", sfcr);
|
||||
}
|
||||
|
||||
|
|
@ -343,8 +367,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ dma_unmap_single(ddev->dev, dma_src_buf, len, DMA_TO_DEVICE);
|
||||
+ return ret;
|
||||
+ }
|
||||
|
||||
-static void stm32_dma_start_transfer(struct stm32_dma_chan *chan)
|
||||
+
|
||||
+ reg.dma_scr = STM32_DMA_SCR_DIR(STM32_DMA_MEM_TO_MEM) |
|
||||
+ STM32_DMA_SCR_PBURST(STM32_DMA_BURST_SINGLE) |
|
||||
+ STM32_DMA_SCR_MBURST(STM32_DMA_BURST_SINGLE) |
|
||||
|
|
@ -373,6 +396,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ stm32_dma_dump_reg(chan);
|
||||
+
|
||||
+ chan->busy = true;
|
||||
+ chan->status = DMA_IN_PROGRESS;
|
||||
+ /* Start DMA */
|
||||
+ reg.dma_scr |= STM32_DMA_SCR_EN;
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg.dma_scr);
|
||||
|
|
@ -386,6 +410,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ }
|
||||
+
|
||||
+ chan->busy = false;
|
||||
+ chan->status = DMA_COMPLETE;
|
||||
+
|
||||
+ ret = stm32_dma_disable_chan(chan);
|
||||
+ status = stm32_dma_irq_status(chan);
|
||||
|
|
@ -399,31 +424,21 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+}
|
||||
+
|
||||
+static int stm32_dma_mdma_flush_remaining(struct stm32_dma_chan *chan)
|
||||
{
|
||||
struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
|
||||
- struct virt_dma_desc *vdesc;
|
||||
+{
|
||||
+ struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
|
||||
+ struct stm32_dma_mdma *mchan = &chan->mchan;
|
||||
struct stm32_dma_sg_req *sg_req;
|
||||
- struct stm32_dma_chan_reg *reg;
|
||||
- u32 status;
|
||||
+ struct stm32_dma_sg_req *sg_req;
|
||||
+ struct dma_device *ddev = mchan->chan->device;
|
||||
+ struct dma_async_tx_descriptor *desc = NULL;
|
||||
+ enum dma_status status;
|
||||
+ dma_addr_t src_buf, dst_buf;
|
||||
+ u32 residue, remain, len, dma_scr;
|
||||
int ret;
|
||||
|
||||
- ret = stm32_dma_disable_chan(chan);
|
||||
- if (ret < 0)
|
||||
- return;
|
||||
+ int ret;
|
||||
+
|
||||
+ residue = stm32_dma_get_remaining_bytes(chan);
|
||||
+ if (!residue)
|
||||
+ return 0;
|
||||
|
||||
- if (!chan->desc) {
|
||||
- vdesc = vchan_next_desc(&chan->vchan);
|
||||
- if (!vdesc)
|
||||
- return;
|
||||
+
|
||||
+ dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id));
|
||||
+ if (!(dma_scr & STM32_DMA_SCR_EN))
|
||||
+ return -EPERM;
|
||||
|
|
@ -448,15 +463,12 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ residue = stm32_dma_get_remaining_bytes(chan);
|
||||
+ }
|
||||
+ stm32_dma_disable_chan(chan);
|
||||
|
||||
- list_del(&vdesc->node);
|
||||
+
|
||||
+ src_buf = mchan->sram_buf + ((len / mchan->sram_period) & 0x1)
|
||||
+ * mchan->sram_period;
|
||||
+ dst_buf = sg_dma_address(&sg_req->stm32_sgl_req) + len -
|
||||
+ (len % mchan->sram_period);
|
||||
|
||||
- chan->desc = to_stm32_dma_desc(vdesc);
|
||||
- chan->next_sg = 0;
|
||||
+
|
||||
+ desc = ddev->device_prep_dma_memcpy(mchan->chan,
|
||||
+ dst_buf, src_buf,
|
||||
+ len % mchan->sram_period,
|
||||
|
|
@ -474,43 +486,28 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ dmaengine_terminate_async(mchan->chan);
|
||||
+ return -EBUSY;
|
||||
+ }
|
||||
}
|
||||
|
||||
- if (chan->next_sg == chan->desc->num_sgs)
|
||||
- chan->next_sg = 0;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
|
||||
- sg_req = &chan->desc->sg_req[chan->next_sg];
|
||||
- reg = &sg_req->chan_reg;
|
||||
+
|
||||
+static void stm32_dma_start_transfer(struct stm32_dma_chan *chan);
|
||||
|
||||
- reg->dma_scr &= ~STM32_DMA_SCR_EN;
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr);
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SPAR(chan->id), reg->dma_spar);
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SM0AR(chan->id), reg->dma_sm0ar);
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SFCR(chan->id), reg->dma_sfcr);
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SM1AR(chan->id), reg->dma_sm1ar);
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SNDTR(chan->id), reg->dma_sndtr);
|
||||
+
|
||||
+static void stm32_mdma_chan_complete(void *param,
|
||||
+ const struct dmaengine_result *result)
|
||||
+{
|
||||
+ struct stm32_dma_chan *chan = param;
|
||||
+ int ret;
|
||||
|
||||
- chan->next_sg++;
|
||||
+
|
||||
+ chan->busy = false;
|
||||
+ chan->status = DMA_COMPLETE;
|
||||
+ if (result->result == DMA_TRANS_NOERROR) {
|
||||
+ ret = stm32_dma_mdma_flush_remaining(chan);
|
||||
+ if (ret) {
|
||||
+ dev_err(chan2dev(chan), "Can't flush DMA: %d\n", ret);
|
||||
+ return;
|
||||
+ }
|
||||
|
||||
- /* Clear interrupt status if it is there */
|
||||
- status = stm32_dma_irq_status(chan);
|
||||
- if (status)
|
||||
- stm32_dma_irq_clear(chan, status);
|
||||
+
|
||||
+ if (chan->next_sg == chan->desc->num_sgs) {
|
||||
+ vchan_cookie_complete(&chan->desc->vdesc);
|
||||
+ chan->desc = NULL;
|
||||
|
|
@ -521,29 +518,22 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ result->result);
|
||||
+ }
|
||||
+}
|
||||
|
||||
- if (chan->desc->cyclic)
|
||||
- stm32_dma_configure_next_sg(chan);
|
||||
+
|
||||
+static int stm32_dma_mdma_start(struct stm32_dma_chan *chan,
|
||||
+ struct stm32_dma_sg_req *sg_req)
|
||||
+{
|
||||
+ struct stm32_dma_mdma *mchan = &chan->mchan;
|
||||
+ struct stm32_dma_mdma_desc *m_desc = &sg_req->m_desc;
|
||||
+ int ret;
|
||||
|
||||
- stm32_dma_dump_reg(chan);
|
||||
+
|
||||
+ ret = dma_submit_error(dmaengine_submit(m_desc->desc));
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(chan2dev(chan), "MDMA submit failed\n");
|
||||
+ goto error;
|
||||
+ }
|
||||
|
||||
- /* Start DMA */
|
||||
- reg->dma_scr |= STM32_DMA_SCR_EN;
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr);
|
||||
+
|
||||
+ dma_async_issue_pending(mchan->chan);
|
||||
|
||||
- chan->busy = true;
|
||||
+
|
||||
+ /*
|
||||
+ * In case of M2D transfer, we have to generate dummy DMA transfer to
|
||||
+ * copy 1st sg data into SRAM
|
||||
|
|
@ -555,56 +545,54 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ goto error;
|
||||
+ }
|
||||
+ }
|
||||
|
||||
- dev_dbg(chan2dev(chan), "vchan %pK: started\n", &chan->vchan);
|
||||
+
|
||||
+ return 0;
|
||||
+error:
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
|
||||
@@ -618,22 +907,134 @@ static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
|
||||
}
|
||||
}
|
||||
|
||||
-static void stm32_dma_handle_chan_done(struct stm32_dma_chan *chan)
|
||||
+static void stm32_dma_start_transfer(struct stm32_dma_chan *chan)
|
||||
{
|
||||
- if (chan->desc) {
|
||||
- if (chan->desc->cyclic) {
|
||||
- vchan_cyclic_callback(&chan->desc->vdesc);
|
||||
- chan->next_sg++;
|
||||
- stm32_dma_configure_next_sg(chan);
|
||||
+}
|
||||
+
|
||||
+static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
|
||||
+{
|
||||
+ struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
|
||||
+ struct virt_dma_desc *vdesc;
|
||||
+ struct stm32_dma_sg_req *sg_req;
|
||||
+ struct stm32_dma_chan_reg *reg;
|
||||
+ u32 status;
|
||||
+ int ret;
|
||||
+ u32 dma_scr, dma_sm0ar, dma_sm1ar, id;
|
||||
+
|
||||
+ ret = stm32_dma_disable_chan(chan);
|
||||
+ if (ret < 0)
|
||||
+ return;
|
||||
+
|
||||
+ if (!chan->desc) {
|
||||
+ vdesc = vchan_next_desc(&chan->vchan);
|
||||
+ if (!vdesc)
|
||||
+ return;
|
||||
+
|
||||
+ list_del(&vdesc->node);
|
||||
+
|
||||
+ chan->desc = to_stm32_dma_desc(vdesc);
|
||||
+ chan->next_sg = 0;
|
||||
+ } else {
|
||||
+ vdesc = &chan->desc->vdesc;
|
||||
+ }
|
||||
+ id = chan->id;
|
||||
+ dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id));
|
||||
+
|
||||
+ if (chan->next_sg == chan->desc->num_sgs)
|
||||
+ chan->next_sg = 0;
|
||||
+
|
||||
+ sg_req = &chan->desc->sg_req[chan->next_sg];
|
||||
+ reg = &sg_req->chan_reg;
|
||||
+
|
||||
+ if (dma_scr & STM32_DMA_SCR_CT) {
|
||||
+ dma_sm0ar = sg_req->chan_reg.dma_sm0ar;
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SM0AR(id), dma_sm0ar);
|
||||
+ dev_dbg(chan2dev(chan), "CT=1 <=> SM0AR: 0x%08x\n",
|
||||
+ stm32_dma_read(dmadev, STM32_DMA_SM0AR(id)));
|
||||
+ } else {
|
||||
+ dma_sm1ar = sg_req->chan_reg.dma_sm1ar;
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), dma_sm1ar);
|
||||
+ dev_dbg(chan2dev(chan), "CT=0 <=> SM1AR: 0x%08x\n",
|
||||
+ stm32_dma_read(dmadev, STM32_DMA_SM1AR(id)));
|
||||
+ }
|
||||
+}
|
||||
|
||||
static void stm32_dma_start_transfer(struct stm32_dma_chan *chan)
|
||||
{
|
||||
@@ -552,6 +942,8 @@ static void stm32_dma_start_transfer(struct stm32_dma_chan *chan)
|
||||
|
||||
chan->desc = to_stm32_dma_desc(vdesc);
|
||||
chan->next_sg = 0;
|
||||
+ } else {
|
||||
+ vdesc = &chan->desc->vdesc;
|
||||
}
|
||||
|
||||
if (chan->next_sg == chan->desc->num_sgs)
|
||||
@@ -560,6 +952,59 @@ static void stm32_dma_start_transfer(struct stm32_dma_chan *chan)
|
||||
sg_req = &chan->desc->sg_req[chan->next_sg];
|
||||
reg = &sg_req->chan_reg;
|
||||
|
||||
+ /* Clear interrupt status if it is there */
|
||||
+ status = stm32_dma_irq_status(chan);
|
||||
+ if (status)
|
||||
|
|
@ -638,10 +626,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ chan->desc = NULL;
|
||||
+ return;
|
||||
+ }
|
||||
} else {
|
||||
- chan->busy = false;
|
||||
- if (chan->next_sg == chan->desc->num_sgs) {
|
||||
- vchan_cookie_complete(&chan->desc->vdesc);
|
||||
+ } else {
|
||||
+ reg->dma_scr &= ~STM32_DMA_SCR_TCIE;
|
||||
+ }
|
||||
+
|
||||
|
|
@ -653,38 +638,145 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ reg->dma_scr |= STM32_DMA_SCR_DBM;
|
||||
+ ret = stm32_dma_mdma_start(chan, sg_req);
|
||||
+ if (ret < 0) {
|
||||
chan->desc = NULL;
|
||||
+ chan->desc = NULL;
|
||||
+ return;
|
||||
}
|
||||
- stm32_dma_start_transfer(chan);
|
||||
}
|
||||
}
|
||||
+ }
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ chan->next_sg++;
|
||||
+
|
||||
+ reg->dma_scr &= ~STM32_DMA_SCR_EN;
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr);
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SPAR(chan->id), reg->dma_spar);
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SM0AR(chan->id), reg->dma_sm0ar);
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SFCR(chan->id), reg->dma_sfcr);
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SM1AR(chan->id), reg->dma_sm1ar);
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SNDTR(chan->id), reg->dma_sndtr);
|
||||
reg->dma_scr &= ~STM32_DMA_SCR_EN;
|
||||
stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr);
|
||||
stm32_dma_write(dmadev, STM32_DMA_SPAR(chan->id), reg->dma_spar);
|
||||
@@ -568,71 +1013,123 @@ static void stm32_dma_start_transfer(struct stm32_dma_chan *chan)
|
||||
stm32_dma_write(dmadev, STM32_DMA_SM1AR(chan->id), reg->dma_sm1ar);
|
||||
stm32_dma_write(dmadev, STM32_DMA_SNDTR(chan->id), reg->dma_sndtr);
|
||||
|
||||
- chan->next_sg++;
|
||||
-
|
||||
- /* Clear interrupt status if it is there */
|
||||
- status = stm32_dma_irq_status(chan);
|
||||
- if (status)
|
||||
- stm32_dma_irq_clear(chan, status);
|
||||
-
|
||||
if (chan->desc->cyclic)
|
||||
stm32_dma_configure_next_sg(chan);
|
||||
|
||||
stm32_dma_dump_reg(chan);
|
||||
|
||||
/* Start DMA */
|
||||
+ chan->busy = true;
|
||||
+ chan->status = DMA_IN_PROGRESS;
|
||||
reg->dma_scr |= STM32_DMA_SCR_EN;
|
||||
stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr);
|
||||
|
||||
- chan->busy = true;
|
||||
-
|
||||
dev_dbg(chan2dev(chan), "vchan %pK: started\n", &chan->vchan);
|
||||
}
|
||||
|
||||
-static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan)
|
||||
+static void stm32_dma_handle_chan_paused(struct stm32_dma_chan *chan)
|
||||
+{
|
||||
+ struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
|
||||
+
|
||||
+ if (chan->desc->cyclic)
|
||||
+ stm32_dma_configure_next_sg(chan);
|
||||
+ /*
|
||||
+ * Read and store current remaining data items and peripheral/memory addresses to be
|
||||
+ * updated on resume
|
||||
+ */
|
||||
+ chan->chan_reg.dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id));
|
||||
+ /*
|
||||
+ * Transfer can be paused while between a previous resume and reconfiguration on transfer
|
||||
+ * complete. If transfer is cyclic and CIRC and DBM have been deactivated for resume, need
|
||||
+ * to set it here in SCR backup to ensure a good reconfiguration on transfer complete.
|
||||
+ */
|
||||
+ if (chan->desc && chan->desc->cyclic) {
|
||||
+ if (chan->desc->num_sgs == 1)
|
||||
+ chan->chan_reg.dma_scr |= STM32_DMA_SCR_CIRC;
|
||||
+ else
|
||||
+ chan->chan_reg.dma_scr |= STM32_DMA_SCR_DBM;
|
||||
+ }
|
||||
+ chan->chan_reg.dma_sndtr = stm32_dma_read(dmadev, STM32_DMA_SNDTR(chan->id));
|
||||
+
|
||||
+ dev_dbg(chan2dev(chan), "vchan %pK: paused\n", &chan->vchan);
|
||||
+}
|
||||
+
|
||||
+static void stm32_dma_post_resume_reconfigure(struct stm32_dma_chan *chan)
|
||||
{
|
||||
struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
|
||||
struct stm32_dma_sg_req *sg_req;
|
||||
- u32 dma_scr, dma_sm0ar, dma_sm1ar, id;
|
||||
+ u32 dma_scr, status, id;
|
||||
|
||||
id = chan->id;
|
||||
dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id));
|
||||
|
||||
- if (dma_scr & STM32_DMA_SCR_DBM) {
|
||||
- if (chan->next_sg == chan->desc->num_sgs)
|
||||
- chan->next_sg = 0;
|
||||
+ /* Clear interrupt status if it is there */
|
||||
+ status = stm32_dma_irq_status(chan);
|
||||
+ if (status)
|
||||
+ stm32_dma_irq_clear(chan, status);
|
||||
|
||||
- sg_req = &chan->desc->sg_req[chan->next_sg];
|
||||
+ if (!chan->next_sg)
|
||||
+ sg_req = &chan->desc->sg_req[chan->desc->num_sgs - 1];
|
||||
+ else
|
||||
+ sg_req = &chan->desc->sg_req[chan->next_sg - 1];
|
||||
|
||||
- if (dma_scr & STM32_DMA_SCR_CT) {
|
||||
- dma_sm0ar = sg_req->chan_reg.dma_sm0ar;
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SM0AR(id), dma_sm0ar);
|
||||
- dev_dbg(chan2dev(chan), "CT=1 <=> SM0AR: 0x%08x\n",
|
||||
- stm32_dma_read(dmadev, STM32_DMA_SM0AR(id)));
|
||||
- } else {
|
||||
- dma_sm1ar = sg_req->chan_reg.dma_sm1ar;
|
||||
- stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), dma_sm1ar);
|
||||
- dev_dbg(chan2dev(chan), "CT=0 <=> SM1AR: 0x%08x\n",
|
||||
- stm32_dma_read(dmadev, STM32_DMA_SM1AR(id)));
|
||||
- }
|
||||
+ /* Reconfigure NDTR with the initial value */
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SNDTR(chan->id), sg_req->chan_reg.dma_sndtr);
|
||||
+
|
||||
+ /* Restore SPAR */
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SPAR(id), sg_req->chan_reg.dma_spar);
|
||||
+
|
||||
+ /* Restore SM0AR/SM1AR whatever DBM/CT as they may have been modified */
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SM0AR(id), sg_req->chan_reg.dma_sm0ar);
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), sg_req->chan_reg.dma_sm1ar);
|
||||
+
|
||||
+ /* Reactivate CIRC/DBM if needed */
|
||||
+ if (chan->chan_reg.dma_scr & STM32_DMA_SCR_DBM) {
|
||||
+ dma_scr |= STM32_DMA_SCR_DBM;
|
||||
+ /* Restore CT */
|
||||
+ if (chan->chan_reg.dma_scr & STM32_DMA_SCR_CT)
|
||||
+ dma_scr &= ~STM32_DMA_SCR_CT;
|
||||
+ else
|
||||
+ dma_scr |= STM32_DMA_SCR_CT;
|
||||
+ } else if (chan->chan_reg.dma_scr & STM32_DMA_SCR_CIRC) {
|
||||
+ dma_scr |= STM32_DMA_SCR_CIRC;
|
||||
}
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), dma_scr);
|
||||
+
|
||||
+ stm32_dma_configure_next_sg(chan);
|
||||
+
|
||||
+ stm32_dma_dump_reg(chan);
|
||||
+
|
||||
+ /* Start DMA */
|
||||
+ chan->busy = true;
|
||||
+ reg->dma_scr |= STM32_DMA_SCR_EN;
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr);
|
||||
+ dma_scr |= STM32_DMA_SCR_EN;
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), dma_scr);
|
||||
+
|
||||
+ dev_dbg(chan2dev(chan), "vchan %pK: started\n", &chan->vchan);
|
||||
+}
|
||||
+
|
||||
+static void stm32_dma_handle_chan_done(struct stm32_dma_chan *chan)
|
||||
+{
|
||||
+ dev_dbg(chan2dev(chan), "vchan %pK: reconfigured after pause/resume\n", &chan->vchan);
|
||||
}
|
||||
|
||||
-static void stm32_dma_handle_chan_done(struct stm32_dma_chan *chan)
|
||||
+static void stm32_dma_handle_chan_done(struct stm32_dma_chan *chan, u32 scr)
|
||||
{
|
||||
- if (chan->desc) {
|
||||
- if (chan->desc->cyclic) {
|
||||
- vchan_cyclic_callback(&chan->desc->vdesc);
|
||||
- chan->next_sg++;
|
||||
+ if (!chan->desc)
|
||||
+ return;
|
||||
+
|
||||
|
|
@ -693,22 +785,33 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ if (chan->use_mdma)
|
||||
+ return;
|
||||
+ chan->next_sg++;
|
||||
+ stm32_dma_configure_next_sg(chan);
|
||||
+ /* cyclic while CIRC/DBM disable => post resume reconfiguration needed */
|
||||
+ if (!(scr & (STM32_DMA_SCR_CIRC | STM32_DMA_SCR_DBM)))
|
||||
+ stm32_dma_post_resume_reconfigure(chan);
|
||||
+ else if (scr & STM32_DMA_SCR_DBM)
|
||||
stm32_dma_configure_next_sg(chan);
|
||||
- } else {
|
||||
- chan->busy = false;
|
||||
- if (chan->next_sg == chan->desc->num_sgs) {
|
||||
- vchan_cookie_complete(&chan->desc->vdesc);
|
||||
- chan->desc = NULL;
|
||||
- }
|
||||
- stm32_dma_start_transfer(chan);
|
||||
+ } else {
|
||||
+ chan->busy = false;
|
||||
+ chan->status = DMA_COMPLETE;
|
||||
+ if (chan->use_mdma && chan->mchan.dir != DMA_MEM_TO_DEV)
|
||||
+ return;
|
||||
+ if (chan->next_sg == chan->desc->num_sgs) {
|
||||
+ vchan_cookie_complete(&chan->desc->vdesc);
|
||||
+ chan->desc = NULL;
|
||||
+ }
|
||||
}
|
||||
+
|
||||
+ stm32_dma_start_transfer(chan);
|
||||
+ }
|
||||
}
|
||||
}
|
||||
|
||||
static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
|
||||
@@ -648,21 +1049,12 @@ static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
|
||||
@@ -648,21 +1145,12 @@ static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
|
||||
scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id));
|
||||
sfcr = stm32_dma_read(dmadev, STM32_DMA_SFCR(chan->id));
|
||||
|
||||
|
|
@ -732,15 +835,19 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
dev_err(chan2dev(chan), "FIFO Error\n");
|
||||
else
|
||||
dev_dbg(chan2dev(chan), "FIFO over/underrun\n");
|
||||
@@ -674,6 +1066,19 @@ static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
|
||||
@@ -674,6 +1162,23 @@ static irqreturn_t stm32_dma_chan_irq(int irq, void *devid)
|
||||
if (sfcr & STM32_DMA_SCR_DMEIE)
|
||||
dev_dbg(chan2dev(chan), "Direct mode overrun\n");
|
||||
}
|
||||
+
|
||||
+ if (status & STM32_DMA_TCI) {
|
||||
+ stm32_dma_irq_clear(chan, STM32_DMA_TCI);
|
||||
+ if (scr & STM32_DMA_SCR_TCIE)
|
||||
+ stm32_dma_handle_chan_done(chan);
|
||||
+ if (scr & STM32_DMA_SCR_TCIE) {
|
||||
+ if (chan->status == DMA_PAUSED)
|
||||
+ stm32_dma_handle_chan_paused(chan);
|
||||
+ else
|
||||
+ stm32_dma_handle_chan_done(chan, scr);
|
||||
+ }
|
||||
+ status &= ~STM32_DMA_TCI;
|
||||
+ }
|
||||
+
|
||||
|
|
@ -752,7 +859,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
if (status) {
|
||||
stm32_dma_irq_clear(chan, status);
|
||||
dev_err(chan2dev(chan), "DMA error: status=0x%08x\n", status);
|
||||
@@ -691,19 +1096,25 @@ static void stm32_dma_issue_pending(struct dma_chan *c)
|
||||
@@ -691,19 +1196,125 @@ static void stm32_dma_issue_pending(struct dma_chan *c)
|
||||
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
|
||||
unsigned long flags;
|
||||
|
||||
|
|
@ -769,7 +876,107 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
|
||||
}
|
||||
+
|
||||
+ spin_unlock_irqrestore(&chan->vchan.lock, flags);
|
||||
+}
|
||||
+
|
||||
+static int stm32_dma_pause(struct dma_chan *c)
|
||||
+{
|
||||
+ struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
|
||||
+ unsigned long flags;
|
||||
+ int ret;
|
||||
+
|
||||
+ if (chan->status != DMA_IN_PROGRESS || chan->use_mdma)
|
||||
+ return -EPERM;
|
||||
+
|
||||
+ spin_lock_irqsave(&chan->vchan.lock, flags);
|
||||
+ ret = stm32_dma_disable_chan(chan);
|
||||
+ /*
|
||||
+ * A transfer complete flag is set to indicate the end of transfer due to the stream
|
||||
+ * interruption, so wait for interrupt
|
||||
+ */
|
||||
+ if (!ret)
|
||||
+ chan->status = DMA_PAUSED;
|
||||
spin_unlock_irqrestore(&chan->vchan.lock, flags);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int stm32_dma_resume(struct dma_chan *c)
|
||||
+{
|
||||
+ struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
|
||||
+ struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
|
||||
+ struct stm32_dma_chan_reg chan_reg = chan->chan_reg;
|
||||
+ u32 id = chan->id, scr, ndtr, offset, spar, sm0ar, sm1ar;
|
||||
+ struct stm32_dma_sg_req *sg_req;
|
||||
+ unsigned long flags;
|
||||
+
|
||||
+ if (chan->status != DMA_PAUSED || chan->use_mdma)
|
||||
+ return -EPERM;
|
||||
+
|
||||
+ scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id));
|
||||
+ if (WARN_ON(scr & STM32_DMA_SCR_EN))
|
||||
+ return -EPERM;
|
||||
+
|
||||
+ spin_lock_irqsave(&chan->vchan.lock, flags);
|
||||
+
|
||||
+ /* sg_reg[prev_sg] contains original ndtr, sm0ar and sm1ar before pausing the transfer */
|
||||
+ if (!chan->next_sg)
|
||||
+ sg_req = &chan->desc->sg_req[chan->desc->num_sgs - 1];
|
||||
+ else
|
||||
+ sg_req = &chan->desc->sg_req[chan->next_sg - 1];
|
||||
+
|
||||
+ ndtr = sg_req->chan_reg.dma_sndtr;
|
||||
+ offset = (ndtr - chan_reg.dma_sndtr) << STM32_DMA_SCR_PSIZE_GET(chan_reg.dma_scr);
|
||||
+ spar = sg_req->chan_reg.dma_spar;
|
||||
+ sm0ar = sg_req->chan_reg.dma_sm0ar;
|
||||
+ sm1ar = sg_req->chan_reg.dma_sm1ar;
|
||||
+
|
||||
+ /*
|
||||
+ * The peripheral and/or memory addresses have to be updated in order to adjust the
|
||||
+ * address pointers. Need to check increment.
|
||||
+ */
|
||||
+ if (chan_reg.dma_scr & STM32_DMA_SCR_PINC)
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SPAR(id), spar + offset);
|
||||
+ else
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SPAR(id), spar);
|
||||
+
|
||||
+ if (!(chan_reg.dma_scr & STM32_DMA_SCR_MINC))
|
||||
+ offset = 0;
|
||||
+
|
||||
+ /*
|
||||
+ * In case of DBM, the current target could be SM1AR.
|
||||
+ * Need to temporarily deactivate CIRC/DBM to finish the current transfer, so
|
||||
+ * SM0AR becomes the current target and must be updated with SM1AR + offset if CT=1.
|
||||
+ */
|
||||
+ if ((chan_reg.dma_scr & STM32_DMA_SCR_DBM) && (chan_reg.dma_scr & STM32_DMA_SCR_CT))
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), sm1ar + offset);
|
||||
+ else
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SM0AR(id), sm0ar + offset);
|
||||
+
|
||||
+ /* NDTR must be restored otherwise internal HW counter won't be correctly reset */
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SNDTR(id), chan_reg.dma_sndtr);
|
||||
+
|
||||
+ /*
|
||||
+ * Need to temporarily deactivate CIRC/DBM until next Transfer Complete interrupt,
|
||||
+ * otherwise NDTR autoreload value will be wrong (lower than the initial period length
|
||||
+ */
|
||||
+ if (chan_reg.dma_scr & (STM32_DMA_SCR_CIRC | STM32_DMA_SCR_DBM)) {
|
||||
+ chan_reg.dma_scr &= ~(STM32_DMA_SCR_CIRC | STM32_DMA_SCR_DBM);
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SCR(id), chan_reg.dma_scr);
|
||||
+ }
|
||||
+
|
||||
+ stm32_dma_dump_reg(chan);
|
||||
+
|
||||
+ /* The stream may then be re-enabled to restart transfer from the point it was stopped */
|
||||
+ chan->status = DMA_IN_PROGRESS;
|
||||
+ chan_reg.dma_scr |= STM32_DMA_SCR_EN;
|
||||
+ stm32_dma_write(dmadev, STM32_DMA_SCR(id), chan_reg.dma_scr);
|
||||
+
|
||||
+ spin_unlock_irqrestore(&chan->vchan.lock, flags);
|
||||
+
|
||||
+ dev_dbg(chan2dev(chan), "vchan %pK: resumed\n", &chan->vchan);
|
||||
+
|
||||
+ return 0;
|
||||
}
|
||||
|
||||
static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
|
||||
|
|
@ -780,7 +987,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
{
|
||||
enum dma_slave_buswidth src_addr_width, dst_addr_width;
|
||||
int src_bus_width, dst_bus_width;
|
||||
@@ -735,14 +1146,21 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
|
||||
@@ -735,14 +1346,21 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
|
||||
return dst_burst_size;
|
||||
|
||||
/* Set memory data size */
|
||||
|
|
@ -805,7 +1012,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
src_best_burst = stm32_dma_get_best_burst(buf_len,
|
||||
src_maxburst,
|
||||
fifoth,
|
||||
@@ -784,14 +1202,21 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
|
||||
@@ -784,14 +1402,21 @@ static int stm32_dma_set_xfer_param(struct stm32_dma_chan *chan,
|
||||
return src_burst_size;
|
||||
|
||||
/* Set memory data size */
|
||||
|
|
@ -830,7 +1037,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
dst_best_burst = stm32_dma_get_best_burst(buf_len,
|
||||
dst_maxburst,
|
||||
fifoth,
|
||||
@@ -838,6 +1263,162 @@ static void stm32_dma_clear_reg(struct stm32_dma_chan_reg *regs)
|
||||
@@ -838,6 +1463,162 @@ static void stm32_dma_clear_reg(struct stm32_dma_chan_reg *regs)
|
||||
memset(regs, 0, sizeof(struct stm32_dma_chan_reg));
|
||||
}
|
||||
|
||||
|
|
@ -993,7 +1200,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
|
||||
struct dma_chan *c, struct scatterlist *sgl,
|
||||
u32 sg_len, enum dma_transfer_direction direction,
|
||||
@@ -845,9 +1426,6 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
|
||||
@@ -845,9 +1626,6 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
|
||||
{
|
||||
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
|
||||
struct stm32_dma_desc *desc;
|
||||
|
|
@ -1003,7 +1210,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
int i, ret;
|
||||
|
||||
if (!chan->config_init) {
|
||||
@@ -870,48 +1448,140 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
|
||||
@@ -870,48 +1648,140 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_slave_sg(
|
||||
else
|
||||
chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL;
|
||||
|
||||
|
|
@ -1012,12 +1219,12 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
- sg_dma_len(sg));
|
||||
- if (ret < 0)
|
||||
- goto err;
|
||||
-
|
||||
- desc->sg_req[i].len = sg_dma_len(sg);
|
||||
+ if (chan->use_mdma) {
|
||||
+ struct sg_table new_sgt;
|
||||
+ struct scatterlist *s, *_sgl;
|
||||
|
||||
- desc->sg_req[i].len = sg_dma_len(sg);
|
||||
-
|
||||
- nb_data_items = desc->sg_req[i].len / buswidth;
|
||||
- if (nb_data_items > STM32_DMA_ALIGNED_MAX_DATA_ITEMS) {
|
||||
- dev_err(chan2dev(chan), "nb items not supported\n");
|
||||
|
|
@ -1164,7 +1371,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
int i, ret;
|
||||
|
||||
if (!buf_len || !period_len) {
|
||||
@@ -940,7 +1610,7 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
|
||||
@@ -940,7 +1810,7 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
@ -1173,7 +1380,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
if (ret < 0)
|
||||
return NULL;
|
||||
|
||||
@@ -959,28 +1629,49 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
|
||||
@@ -959,28 +1829,49 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_cyclic(
|
||||
/* Clear periph ctrl if client set it */
|
||||
chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL;
|
||||
|
||||
|
|
@ -1191,7 +1398,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
- desc->sg_req[i].len = period_len;
|
||||
+ desc->num_sgs = num_periods;
|
||||
+ desc->cyclic = true;
|
||||
|
||||
+
|
||||
+ if (chan->use_mdma) {
|
||||
+ chan->mchan.dir = direction;
|
||||
+
|
||||
|
|
@ -1203,7 +1410,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ } else {
|
||||
+ dma_buf = buf_addr;
|
||||
+ }
|
||||
+
|
||||
|
||||
+ for (i = 0; i < num_periods; i++) {
|
||||
+ sg_dma_len(&desc->sg_req[i].stm32_sgl_req) = period_len;
|
||||
+ sg_dma_address(&desc->sg_req[i].stm32_sgl_req) = dma_buf;
|
||||
|
|
@ -1235,7 +1442,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
|
||||
}
|
||||
|
||||
@@ -1021,13 +1712,13 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
|
||||
@@ -1021,13 +1912,13 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
|
||||
STM32_DMA_SCR_PINC |
|
||||
STM32_DMA_SCR_TCIE |
|
||||
STM32_DMA_SCR_TEIE;
|
||||
|
|
@ -1251,7 +1458,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
}
|
||||
|
||||
desc->num_sgs = num_sgs;
|
||||
@@ -1036,18 +1727,6 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
|
||||
@@ -1036,18 +1927,6 @@ static struct dma_async_tx_descriptor *stm32_dma_prep_dma_memcpy(
|
||||
return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
|
||||
}
|
||||
|
||||
|
|
@ -1270,7 +1477,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
/**
|
||||
* stm32_dma_is_current_sg - check that expected sg_req is currently transferred
|
||||
* @chan: dma channel
|
||||
@@ -1094,6 +1773,10 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
|
||||
@@ -1094,6 +1973,10 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
|
||||
struct stm32_dma_sg_req *sg_req = &chan->desc->sg_req[chan->next_sg];
|
||||
int i;
|
||||
|
||||
|
|
@ -1281,7 +1488,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
/*
|
||||
* Calculate the residue means compute the descriptors
|
||||
* information:
|
||||
@@ -1125,7 +1808,7 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
|
||||
@@ -1125,7 +2008,7 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
|
||||
n_sg++;
|
||||
if (n_sg == chan->desc->num_sgs)
|
||||
n_sg = 0;
|
||||
|
|
@ -1290,7 +1497,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
}
|
||||
|
||||
/*
|
||||
@@ -1137,7 +1820,7 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
|
||||
@@ -1137,7 +2020,7 @@ static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan,
|
||||
*/
|
||||
if (!chan->desc->cyclic || n_sg != 0)
|
||||
for (i = n_sg; i < desc->num_sgs; i++)
|
||||
|
|
@ -1299,7 +1506,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
|
||||
if (!chan->mem_burst)
|
||||
return residue;
|
||||
@@ -1155,11 +1838,23 @@ static enum dma_status stm32_dma_tx_status(struct dma_chan *c,
|
||||
@@ -1155,13 +2038,30 @@ static enum dma_status stm32_dma_tx_status(struct dma_chan *c,
|
||||
struct dma_tx_state *state)
|
||||
{
|
||||
struct stm32_dma_chan *chan = to_stm32_dma_chan(c);
|
||||
|
|
@ -1321,9 +1528,17 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
+ state);
|
||||
+
|
||||
status = dma_cookie_status(c, cookie, state);
|
||||
if (status == DMA_COMPLETE || !state)
|
||||
- if (status == DMA_COMPLETE || !state)
|
||||
+ if (status == DMA_COMPLETE)
|
||||
+ return status;
|
||||
+
|
||||
+ status = chan->status;
|
||||
+
|
||||
+ if (!state)
|
||||
return status;
|
||||
@@ -1216,27 +1911,53 @@ static void stm32_dma_free_chan_resources(struct dma_chan *c)
|
||||
|
||||
spin_lock_irqsave(&chan->vchan.lock, flags);
|
||||
@@ -1216,27 +2116,53 @@ static void stm32_dma_free_chan_resources(struct dma_chan *c)
|
||||
pm_runtime_put(dmadev->ddev.dev);
|
||||
|
||||
vchan_free_chan_resources(to_virt_chan(c));
|
||||
|
|
@ -1382,7 +1597,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
}
|
||||
|
||||
static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
|
||||
@@ -1274,6 +1995,9 @@ static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
|
||||
@@ -1274,6 +2200,9 @@ static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
|
||||
|
||||
stm32_dma_set_config(chan, &cfg);
|
||||
|
||||
|
|
@ -1392,7 +1607,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
return c;
|
||||
}
|
||||
|
||||
@@ -1286,11 +2010,13 @@ MODULE_DEVICE_TABLE(of, stm32_dma_of_match);
|
||||
@@ -1286,11 +2215,13 @@ MODULE_DEVICE_TABLE(of, stm32_dma_of_match);
|
||||
static int stm32_dma_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct stm32_dma_chan *chan;
|
||||
|
|
@ -1406,7 +1621,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
int i, ret;
|
||||
|
||||
match = of_match_device(stm32_dma_of_match, &pdev->dev);
|
||||
@@ -1334,6 +2060,13 @@ static int stm32_dma_probe(struct platform_device *pdev)
|
||||
@@ -1334,6 +2265,13 @@ static int stm32_dma_probe(struct platform_device *pdev)
|
||||
reset_control_deassert(rst);
|
||||
}
|
||||
|
||||
|
|
@ -1420,7 +1635,18 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
dma_set_max_seg_size(&pdev->dev, STM32_DMA_ALIGNED_MAX_DATA_ITEMS);
|
||||
|
||||
dma_cap_set(DMA_SLAVE, dd->cap_mask);
|
||||
@@ -1373,11 +2106,27 @@ static int stm32_dma_probe(struct platform_device *pdev)
|
||||
@@ -1345,7 +2283,10 @@ static int stm32_dma_probe(struct platform_device *pdev)
|
||||
dd->device_issue_pending = stm32_dma_issue_pending;
|
||||
dd->device_prep_slave_sg = stm32_dma_prep_slave_sg;
|
||||
dd->device_prep_dma_cyclic = stm32_dma_prep_dma_cyclic;
|
||||
+ dd->device_caps = stm32_dma_slave_caps;
|
||||
dd->device_config = stm32_dma_slave_config;
|
||||
+ dd->device_pause = stm32_dma_pause;
|
||||
+ dd->device_resume = stm32_dma_resume;
|
||||
dd->device_terminate_all = stm32_dma_terminate_all;
|
||||
dd->device_synchronize = stm32_dma_synchronize;
|
||||
dd->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
|
||||
@@ -1373,11 +2314,27 @@ static int stm32_dma_probe(struct platform_device *pdev)
|
||||
chan->id = i;
|
||||
chan->vchan.desc_free = stm32_dma_desc_free;
|
||||
vchan_init(&chan->vchan, dd);
|
||||
|
|
@ -1449,7 +1675,7 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
|
||||
for (i = 0; i < STM32_DMA_MAX_CHANNELS; i++) {
|
||||
chan = &dmadev->chan[i];
|
||||
@@ -1418,6 +2167,10 @@ static int stm32_dma_probe(struct platform_device *pdev)
|
||||
@@ -1418,6 +2375,10 @@ static int stm32_dma_probe(struct platform_device *pdev)
|
||||
|
||||
err_unregister:
|
||||
dma_async_device_unregister(dd);
|
||||
|
|
@ -1460,14 +1686,40 @@ index d0055d2f0b9a..1d89e0807ef0 100644
|
|||
clk_free:
|
||||
clk_disable_unprepare(dmadev->clk);
|
||||
|
||||
@@ -1499,4 +2252,4 @@ static int __init stm32_dma_init(void)
|
||||
@@ -1450,7 +2411,7 @@ static int stm32_dma_runtime_resume(struct device *dev)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
-static int stm32_dma_suspend(struct device *dev)
|
||||
+static int stm32_dma_pm_suspend(struct device *dev)
|
||||
{
|
||||
struct stm32_dma_device *dmadev = dev_get_drvdata(dev);
|
||||
int id, ret, scr;
|
||||
@@ -1474,14 +2435,14 @@ static int stm32_dma_suspend(struct device *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static int stm32_dma_resume(struct device *dev)
|
||||
+static int stm32_dma_pm_resume(struct device *dev)
|
||||
{
|
||||
return pm_runtime_force_resume(dev);
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops stm32_dma_pm_ops = {
|
||||
- SET_SYSTEM_SLEEP_PM_OPS(stm32_dma_suspend, stm32_dma_resume)
|
||||
+ SET_SYSTEM_SLEEP_PM_OPS(stm32_dma_pm_suspend, stm32_dma_pm_resume)
|
||||
SET_RUNTIME_PM_OPS(stm32_dma_runtime_suspend,
|
||||
stm32_dma_runtime_resume, NULL)
|
||||
};
|
||||
@@ -1499,4 +2460,4 @@ static int __init stm32_dma_init(void)
|
||||
{
|
||||
return platform_driver_register(&stm32_dma_driver);
|
||||
}
|
||||
-subsys_initcall(stm32_dma_init);
|
||||
+device_initcall(stm32_dma_init);
|
||||
diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
|
||||
index 08cfbfab837b..a4b25944fba4 100644
|
||||
index 9d4739237..88e521bbd 100644
|
||||
--- a/drivers/dma/stm32-mdma.c
|
||||
+++ b/drivers/dma/stm32-mdma.c
|
||||
@@ -199,7 +199,9 @@
|
||||
|
|
@ -1863,7 +2115,7 @@ index 08cfbfab837b..a4b25944fba4 100644
|
|||
if (config.request >= dmadev->nr_requests) {
|
||||
dev_err(mdma2dev(dmadev), "Bad request line\n");
|
||||
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
|
||||
index dd357a747780..42745f58412c 100644
|
||||
index dd357a747..42745f584 100644
|
||||
--- a/include/linux/dmaengine.h
|
||||
+++ b/include/linux/dmaengine.h
|
||||
@@ -1474,9 +1474,11 @@ struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
|
||||
|
|
@ -1,23 +1,31 @@
|
|||
From fe6c762c8d16cddae0a0fd5673f7ab8c6b06f4e5 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:01:48 +0100
|
||||
Subject: [PATCH 06/22] ARM 5.10.10-stm32mp1-r1 DRM
|
||||
From 6d9c0eb22dc7c3fbe05bbb000a5d35d0fd1168ab Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:43 +0200
|
||||
Subject: [PATCH 06/23] ARM 5.10.61-stm32mp1-r2 DRM
|
||||
|
||||
---
|
||||
drivers/gpu/drm/bridge/sii902x.c | 100 +++++++++-
|
||||
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 172 ++++++++++++++----
|
||||
drivers/gpu/drm/drm_atomic_state_helper.c | 1 +
|
||||
drivers/gpu/drm/drm_atomic_uapi.c | 4 +
|
||||
drivers/gpu/drm/drm_blend.c | 34 +++-
|
||||
drivers/gpu/drm/drm_mode_config.c | 6 +
|
||||
drivers/gpu/drm/drm_modes.c | 19 +-
|
||||
.../gpu/drm/panel/panel-orisetech-otm8009a.c | 24 +--
|
||||
drivers/gpu/drm/panel/panel-raydium-rm68200.c | 17 +-
|
||||
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 3 +-
|
||||
drivers/gpu/drm/stm/ltdc.c | 72 +++++---
|
||||
.../gpu/drm/panel/panel-orisetech-otm8009a.c | 119 +++++++-----
|
||||
drivers/gpu/drm/panel/panel-raydium-rm68200.c | 21 ++-
|
||||
drivers/gpu/drm/stm/drv.c | 5 +
|
||||
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 20 +-
|
||||
drivers/gpu/drm/stm/ltdc.c | 169 +++++++++++------
|
||||
drivers/input/touchscreen/edt-ft5x06.c | 18 +-
|
||||
drivers/input/touchscreen/goodix.c | 15 ++
|
||||
include/uapi/drm/drm_mode.h | 6 +
|
||||
10 files changed, 346 insertions(+), 100 deletions(-)
|
||||
include/drm/drm_blend.h | 1 +
|
||||
include/drm/drm_crtc.h | 12 ++
|
||||
include/drm/drm_mode_config.h | 5 +
|
||||
include/uapi/drm/drm_mode.h | 34 ++++
|
||||
18 files changed, 591 insertions(+), 164 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c
|
||||
index 89558e581530..69208ead5384 100644
|
||||
index 89558e581..69208ead5 100644
|
||||
--- a/drivers/gpu/drm/bridge/sii902x.c
|
||||
+++ b/drivers/gpu/drm/bridge/sii902x.c
|
||||
@@ -16,6 +16,7 @@
|
||||
|
|
@ -203,7 +211,7 @@ index 89558e581530..69208ead5384 100644
|
|||
.id_table = sii902x_i2c_ids,
|
||||
};
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
|
||||
index 6b268f9445b3..25b63491135f 100644
|
||||
index 6b268f944..25b634911 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
|
||||
@@ -213,6 +213,20 @@
|
||||
|
|
@ -471,8 +479,115 @@ index 6b268f9445b3..25b63491135f 100644
|
|||
mipi_dsi_host_unregister(&dsi->dsi_host);
|
||||
|
||||
pm_runtime_disable(dsi->dev);
|
||||
diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c
|
||||
index 9ad740451..ae89e8134 100644
|
||||
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
|
||||
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
|
||||
@@ -72,6 +72,7 @@ __drm_atomic_helper_crtc_state_reset(struct drm_crtc_state *crtc_state,
|
||||
struct drm_crtc *crtc)
|
||||
{
|
||||
crtc_state->crtc = crtc;
|
||||
+ crtc_state->bgcolor = drm_argb(16, 0xffff, 0, 0, 0);
|
||||
}
|
||||
EXPORT_SYMBOL(__drm_atomic_helper_crtc_state_reset);
|
||||
|
||||
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
|
||||
index 25c269bc4..569f5d364 100644
|
||||
--- a/drivers/gpu/drm/drm_atomic_uapi.c
|
||||
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
|
||||
@@ -469,6 +469,8 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc,
|
||||
return -EFAULT;
|
||||
|
||||
set_out_fence_for_crtc(state->state, crtc, fence_ptr);
|
||||
+ } else if (property == config->bgcolor_property) {
|
||||
+ state->bgcolor = val;
|
||||
} else if (crtc->funcs->atomic_set_property) {
|
||||
return crtc->funcs->atomic_set_property(crtc, state, property, val);
|
||||
} else {
|
||||
@@ -503,6 +505,8 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc,
|
||||
*val = (state->gamma_lut) ? state->gamma_lut->base.id : 0;
|
||||
else if (property == config->prop_out_fence_ptr)
|
||||
*val = 0;
|
||||
+ else if (property == config->bgcolor_property)
|
||||
+ *val = state->bgcolor;
|
||||
else if (crtc->funcs->atomic_get_property)
|
||||
return crtc->funcs->atomic_get_property(crtc, state, property, val);
|
||||
else
|
||||
diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c
|
||||
index f1dcad96f..1e786abc6 100644
|
||||
--- a/drivers/gpu/drm/drm_blend.c
|
||||
+++ b/drivers/gpu/drm/drm_blend.c
|
||||
@@ -185,6 +185,21 @@
|
||||
* plane does not expose the "alpha" property, then this is
|
||||
* assumed to be 1.0
|
||||
*
|
||||
+ * BACKGROUND_COLOR:
|
||||
+ * Defines the ARGB color of a full-screen layer that exists below all
|
||||
+ * planes. This color will be used for pixels not covered by any plane
|
||||
+ * and may also be blended with plane contents as allowed by a plane's
|
||||
+ * alpha values. The background color defaults to black, and is assumed
|
||||
+ * to be black for drivers that do not expose this property. Although
|
||||
+ * background color isn't a plane, it is assumed that the color provided
|
||||
+ * here undergoes the same pipe-level degamma/CSC/gamma transformations
|
||||
+ * that planes undergo. Note that the color value provided here includes
|
||||
+ * an alpha channel...non-opaque background color values are allowed,
|
||||
+ * but are generally only honored in special cases (e.g., when a memory
|
||||
+ * writeback connector is in use).
|
||||
+ *
|
||||
+ * This property is setup with drm_crtc_add_bgcolor_property().
|
||||
+ *
|
||||
* IN_FORMATS:
|
||||
* Blob property which contains the set of buffer format and modifier
|
||||
* pairs supported by this plane. The blob is a drm_format_modifier_blob
|
||||
@@ -192,8 +207,7 @@
|
||||
* modifiers. Userspace cannot change this property.
|
||||
*
|
||||
* Note that all the property extensions described here apply either to the
|
||||
- * plane or the CRTC (e.g. for the background color, which currently is not
|
||||
- * exposed and assumed to be black).
|
||||
+ * plane or the CRTC.
|
||||
*/
|
||||
|
||||
/**
|
||||
@@ -609,3 +623,19 @@ int drm_plane_create_blend_mode_property(struct drm_plane *plane,
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(drm_plane_create_blend_mode_property);
|
||||
+
|
||||
+/**
|
||||
+ * drm_crtc_add_bgcolor_property - add background color property
|
||||
+ * @crtc: drm crtc
|
||||
+ *
|
||||
+ * Adds the background color property to @crtc. The property defaults to
|
||||
+ * solid black and will accept 64-bit ARGB values in the format generated by
|
||||
+ * drm_argb().
|
||||
+ */
|
||||
+void drm_crtc_add_bgcolor_property(struct drm_crtc *crtc)
|
||||
+{
|
||||
+ drm_object_attach_property(&crtc->base,
|
||||
+ crtc->dev->mode_config.bgcolor_property,
|
||||
+ drm_argb(16, 0xffff, 0, 0, 0));
|
||||
+}
|
||||
+EXPORT_SYMBOL(drm_crtc_add_bgcolor_property);
|
||||
diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
|
||||
index f1affc1bb..845091106 100644
|
||||
--- a/drivers/gpu/drm/drm_mode_config.c
|
||||
+++ b/drivers/gpu/drm/drm_mode_config.c
|
||||
@@ -371,6 +371,12 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
|
||||
return -ENOMEM;
|
||||
dev->mode_config.modifiers_property = prop;
|
||||
|
||||
+ prop = drm_property_create_range(dev, 0, "BACKGROUND_COLOR",
|
||||
+ 0, GENMASK_ULL(63, 0));
|
||||
+ if (!prop)
|
||||
+ return -ENOMEM;
|
||||
+ dev->mode_config.bgcolor_property = prop;
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
|
||||
index 501b4fe55a3d..125aab6b12e8 100644
|
||||
index 511cde5c7..58ab4a543 100644
|
||||
--- a/drivers/gpu/drm/drm_modes.c
|
||||
+++ b/drivers/gpu/drm/drm_modes.c
|
||||
@@ -127,7 +127,7 @@ EXPORT_SYMBOL(drm_mode_probed_add);
|
||||
|
|
@ -516,10 +631,69 @@ index 501b4fe55a3d..125aab6b12e8 100644
|
|||
EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode);
|
||||
|
||||
diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
|
||||
index 6ac1accade80..da0970ca98f8 100644
|
||||
index 6ac1accad..70b2bb72d 100644
|
||||
--- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
|
||||
+++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
|
||||
@@ -99,20 +99,6 @@ static void otm8009a_dcs_write_buf(struct otm8009a *ctx, const void *data,
|
||||
@@ -60,6 +60,9 @@
|
||||
#define MCS_CMD2_ENA1 0xFF00 /* Enable Access Command2 "CMD2" */
|
||||
#define MCS_CMD2_ENA2 0xFF80 /* Enable Access Orise Command2 */
|
||||
|
||||
+#define OTM8009A_HDISPLAY 480
|
||||
+#define OTM8009A_VDISPLAY 800
|
||||
+
|
||||
struct otm8009a {
|
||||
struct device *dev;
|
||||
struct drm_panel panel;
|
||||
@@ -70,19 +73,35 @@ struct otm8009a {
|
||||
bool enabled;
|
||||
};
|
||||
|
||||
-static const struct drm_display_mode default_mode = {
|
||||
- .clock = 29700,
|
||||
- .hdisplay = 480,
|
||||
- .hsync_start = 480 + 98,
|
||||
- .hsync_end = 480 + 98 + 32,
|
||||
- .htotal = 480 + 98 + 32 + 98,
|
||||
- .vdisplay = 800,
|
||||
- .vsync_start = 800 + 15,
|
||||
- .vsync_end = 800 + 15 + 10,
|
||||
- .vtotal = 800 + 15 + 10 + 14,
|
||||
- .flags = 0,
|
||||
- .width_mm = 52,
|
||||
- .height_mm = 86,
|
||||
+static const struct drm_display_mode modes[] = {
|
||||
+ { /* 50 Hz, preferred */
|
||||
+ .clock = 29700,
|
||||
+ .hdisplay = 480,
|
||||
+ .hsync_start = 480 + 98,
|
||||
+ .hsync_end = 480 + 98 + 32,
|
||||
+ .htotal = 480 + 98 + 32 + 98,
|
||||
+ .vdisplay = 800,
|
||||
+ .vsync_start = 800 + 15,
|
||||
+ .vsync_end = 800 + 15 + 10,
|
||||
+ .vtotal = 800 + 15 + 10 + 14,
|
||||
+ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
|
||||
+ .width_mm = 52,
|
||||
+ .height_mm = 86,
|
||||
+ },
|
||||
+ { /* 60 Hz */
|
||||
+ .clock = 33000,
|
||||
+ .hdisplay = 480,
|
||||
+ .hsync_start = 480 + 70,
|
||||
+ .hsync_end = 480 + 70 + 32,
|
||||
+ .htotal = 480 + 70 + 32 + 72,
|
||||
+ .vdisplay = 800,
|
||||
+ .vsync_start = 800 + 15,
|
||||
+ .vsync_end = 800 + 15 + 10,
|
||||
+ .vtotal = 800 + 15 + 10 + 16,
|
||||
+ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
|
||||
+ .width_mm = 52,
|
||||
+ .height_mm = 86,
|
||||
+ },
|
||||
};
|
||||
|
||||
static inline struct otm8009a *panel_to_otm8009a(struct drm_panel *panel)
|
||||
@@ -99,20 +118,6 @@ static void otm8009a_dcs_write_buf(struct otm8009a *ctx, const void *data,
|
||||
dev_warn(ctx->dev, "mipi dsi dcs write buffer failed\n");
|
||||
}
|
||||
|
||||
|
|
@ -540,7 +714,71 @@ index 6ac1accade80..da0970ca98f8 100644
|
|||
#define dcs_write_seq(ctx, seq...) \
|
||||
({ \
|
||||
static const u8 d[] = { seq }; \
|
||||
@@ -400,7 +386,7 @@ static int otm8009a_backlight_update_status(struct backlight_device *bd)
|
||||
@@ -222,12 +227,11 @@ static int otm8009a_init_sequence(struct otm8009a *ctx)
|
||||
/* Default portrait 480x800 rgb24 */
|
||||
dcs_write_seq(ctx, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
|
||||
|
||||
- ret = mipi_dsi_dcs_set_column_address(dsi, 0,
|
||||
- default_mode.hdisplay - 1);
|
||||
+ ret = mipi_dsi_dcs_set_column_address(dsi, 0, OTM8009A_HDISPLAY - 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- ret = mipi_dsi_dcs_set_page_address(dsi, 0, default_mode.vdisplay - 1);
|
||||
+ ret = mipi_dsi_dcs_set_page_address(dsi, 0, OTM8009A_VDISPLAY - 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -351,24 +355,35 @@ static int otm8009a_get_modes(struct drm_panel *panel,
|
||||
struct drm_connector *connector)
|
||||
{
|
||||
struct drm_display_mode *mode;
|
||||
-
|
||||
- mode = drm_mode_duplicate(connector->dev, &default_mode);
|
||||
- if (!mode) {
|
||||
- dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
|
||||
- default_mode.hdisplay, default_mode.vdisplay,
|
||||
- drm_mode_vrefresh(&default_mode));
|
||||
- return -ENOMEM;
|
||||
+ unsigned int num_modes = ARRAY_SIZE(modes);
|
||||
+ unsigned int i;
|
||||
+
|
||||
+ for (i = 0; i < num_modes; i++) {
|
||||
+ mode = drm_mode_duplicate(connector->dev, &modes[i]);
|
||||
+ if (!mode) {
|
||||
+ dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
|
||||
+ modes[i].hdisplay,
|
||||
+ modes[i].vdisplay,
|
||||
+ drm_mode_vrefresh(&modes[i]));
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+
|
||||
+ mode->type = DRM_MODE_TYPE_DRIVER;
|
||||
+
|
||||
+ /* Setting first mode as preferred */
|
||||
+ if (!i)
|
||||
+ mode->type |= DRM_MODE_TYPE_PREFERRED;
|
||||
+
|
||||
+ drm_mode_set_name(mode);
|
||||
+ drm_mode_probed_add(connector, mode);
|
||||
}
|
||||
|
||||
- drm_mode_set_name(mode);
|
||||
-
|
||||
- mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
||||
- drm_mode_probed_add(connector, mode);
|
||||
-
|
||||
connector->display_info.width_mm = mode->width_mm;
|
||||
connector->display_info.height_mm = mode->height_mm;
|
||||
+ connector->display_info.bus_flags = DRM_BUS_FLAG_DE_HIGH |
|
||||
+ DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
|
||||
|
||||
- return 1;
|
||||
+ return num_modes;
|
||||
}
|
||||
|
||||
static const struct drm_panel_funcs otm8009a_drm_funcs = {
|
||||
@@ -400,7 +415,7 @@ static int otm8009a_backlight_update_status(struct backlight_device *bd)
|
||||
*/
|
||||
data[0] = MIPI_DCS_SET_DISPLAY_BRIGHTNESS;
|
||||
data[1] = bd->props.brightness;
|
||||
|
|
@ -549,7 +787,7 @@ index 6ac1accade80..da0970ca98f8 100644
|
|||
|
||||
/* set Brightness Control & Backlight on */
|
||||
data[1] = 0x24;
|
||||
@@ -412,7 +398,7 @@ static int otm8009a_backlight_update_status(struct backlight_device *bd)
|
||||
@@ -412,7 +427,7 @@ static int otm8009a_backlight_update_status(struct backlight_device *bd)
|
||||
|
||||
/* Update Brightness Control & Backlight */
|
||||
data[0] = MIPI_DCS_WRITE_CONTROL_DISPLAY;
|
||||
|
|
@ -558,7 +796,7 @@ index 6ac1accade80..da0970ca98f8 100644
|
|||
|
||||
return 0;
|
||||
}
|
||||
@@ -433,8 +419,10 @@ static int otm8009a_probe(struct mipi_dsi_device *dsi)
|
||||
@@ -433,8 +448,18 @@ static int otm8009a_probe(struct mipi_dsi_device *dsi)
|
||||
|
||||
ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
|
||||
if (IS_ERR(ctx->reset_gpio)) {
|
||||
|
|
@ -568,14 +806,22 @@ index 6ac1accade80..da0970ca98f8 100644
|
|||
+ if (ret != -EPROBE_DEFER)
|
||||
+ dev_err(dev, "cannot get reset GPIO: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ /* Reset the panel to avoid visual artifacts */
|
||||
+ if (ctx->reset_gpio) {
|
||||
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
|
||||
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
|
||||
+ msleep(20);
|
||||
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
|
||||
}
|
||||
|
||||
ctx->supply = devm_regulator_get(dev, "power");
|
||||
diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
|
||||
index f908eeafb1af..74fa3596618d 100644
|
||||
index f908eeafb..d5542266e 100644
|
||||
--- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c
|
||||
+++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c
|
||||
@@ -82,15 +82,15 @@ struct rm68200 {
|
||||
@@ -82,16 +82,16 @@ struct rm68200 {
|
||||
};
|
||||
|
||||
static const struct drm_display_mode default_mode = {
|
||||
|
|
@ -592,12 +838,23 @@ index f908eeafb1af..74fa3596618d 100644
|
|||
.vsync_start = 1280 + 12,
|
||||
- .vsync_end = 1280 + 12 + 4,
|
||||
- .vtotal = 1280 + 12 + 4 + 12,
|
||||
- .flags = 0,
|
||||
+ .vsync_end = 1280 + 12 + 5,
|
||||
+ .vtotal = 1280 + 12 + 5 + 12,
|
||||
.flags = 0,
|
||||
+ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
|
||||
.width_mm = 68,
|
||||
.height_mm = 122,
|
||||
@@ -372,7 +372,8 @@ static int rm68200_probe(struct mipi_dsi_device *dsi)
|
||||
};
|
||||
@@ -347,6 +347,8 @@ static int rm68200_get_modes(struct drm_panel *panel,
|
||||
|
||||
connector->display_info.width_mm = mode->width_mm;
|
||||
connector->display_info.height_mm = mode->height_mm;
|
||||
+ connector->display_info.bus_flags = DRM_BUS_FLAG_DE_HIGH |
|
||||
+ DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
|
||||
|
||||
return 1;
|
||||
}
|
||||
@@ -372,7 +374,8 @@ static int rm68200_probe(struct mipi_dsi_device *dsi)
|
||||
ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
|
||||
if (IS_ERR(ctx->reset_gpio)) {
|
||||
ret = PTR_ERR(ctx->reset_gpio);
|
||||
|
|
@ -607,7 +864,7 @@ index f908eeafb1af..74fa3596618d 100644
|
|||
return ret;
|
||||
}
|
||||
|
||||
@@ -391,7 +392,7 @@ static int rm68200_probe(struct mipi_dsi_device *dsi)
|
||||
@@ -391,7 +394,7 @@ static int rm68200_probe(struct mipi_dsi_device *dsi)
|
||||
dsi->lanes = 2;
|
||||
dsi->format = MIPI_DSI_FMT_RGB888;
|
||||
dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
|
||||
|
|
@ -616,11 +873,55 @@ index f908eeafb1af..74fa3596618d 100644
|
|||
|
||||
drm_panel_init(&ctx->panel, dev, &rm68200_drm_funcs,
|
||||
DRM_MODE_CONNECTOR_DSI);
|
||||
diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c
|
||||
index 411103f01..0f2383026 100644
|
||||
--- a/drivers/gpu/drm/stm/drv.c
|
||||
+++ b/drivers/gpu/drm/stm/drv.c
|
||||
@@ -193,6 +193,11 @@ static int stm_drm_platform_probe(struct platform_device *pdev)
|
||||
if (ret)
|
||||
goto err_put;
|
||||
|
||||
+ ret = drm_fb_helper_remove_conflicting_framebuffers(NULL, "stmdrmfb",
|
||||
+ false);
|
||||
+ if (ret)
|
||||
+ goto err_put;
|
||||
+
|
||||
ret = drm_dev_register(ddev, 0);
|
||||
if (ret)
|
||||
goto err_put;
|
||||
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
|
||||
index 2e1f2664495d..164f79ef6269 100644
|
||||
index 2e1f26644..87f894ea3 100644
|
||||
--- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
|
||||
+++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
|
||||
@@ -419,7 +419,8 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev)
|
||||
@@ -309,14 +309,23 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, const struct drm_display_mode *mode,
|
||||
return 0;
|
||||
}
|
||||
|
||||
+#define DSI_PHY_DELAY(fp, vp, mbps) DIV_ROUND_UP((fp) * (mbps) + 1000 * (vp), 8000)
|
||||
+
|
||||
static int
|
||||
dw_mipi_dsi_phy_get_timing(void *priv_data, unsigned int lane_mbps,
|
||||
struct dw_mipi_dsi_dphy_timing *timing)
|
||||
{
|
||||
- timing->clk_hs2lp = 0x40;
|
||||
- timing->clk_lp2hs = 0x40;
|
||||
- timing->data_hs2lp = 0x40;
|
||||
- timing->data_lp2hs = 0x40;
|
||||
+ /*
|
||||
+ * From STM32MP157 datasheet, valid for STM32F469, STM32F7x9, STM32H747
|
||||
+ * phy_clkhs2lp_time = (272+136*UI)/(8*UI)
|
||||
+ * phy_clklp2hs_time = (512+40*UI)/(8*UI)
|
||||
+ * phy_hs2lp_time = (192+64*UI)/(8*UI)
|
||||
+ * phy_lp2hs_time = (256+32*UI)/(8*UI)
|
||||
+ */
|
||||
+ timing->clk_hs2lp = DSI_PHY_DELAY(272, 136, lane_mbps);
|
||||
+ timing->clk_lp2hs = DSI_PHY_DELAY(512, 40, lane_mbps);
|
||||
+ timing->data_hs2lp = DSI_PHY_DELAY(192, 64, lane_mbps);
|
||||
+ timing->data_lp2hs = DSI_PHY_DELAY(256, 32, lane_mbps);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -419,7 +428,8 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev)
|
||||
dsi->dsi = dw_mipi_dsi_probe(pdev, &dw_mipi_dsi_stm_plat_data);
|
||||
if (IS_ERR(dsi->dsi)) {
|
||||
ret = PTR_ERR(dsi->dsi);
|
||||
|
|
@ -631,10 +932,139 @@ index 2e1f2664495d..164f79ef6269 100644
|
|||
}
|
||||
|
||||
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
|
||||
index 6e28f707092f..308755aa7b95 100644
|
||||
index 62488ac14..a7c85a922 100644
|
||||
--- a/drivers/gpu/drm/stm/ltdc.c
|
||||
+++ b/drivers/gpu/drm/stm/ltdc.c
|
||||
@@ -724,22 +724,44 @@ static int ltdc_plane_atomic_check(struct drm_plane *plane,
|
||||
@@ -195,6 +195,11 @@
|
||||
|
||||
#define NB_PF 8 /* Max nb of HW pixel format */
|
||||
|
||||
+#define DRM_ARGB_TO_LTDC_RGB24(bgcolor) \
|
||||
+ ((u32)(DRM_ARGB_RED(bgcolor, 8) << 16 \
|
||||
+ | DRM_ARGB_GREEN(bgcolor, 8) << 8 \
|
||||
+ | DRM_ARGB_BLUE(bgcolor, 8)))
|
||||
+
|
||||
enum ltdc_pix_fmt {
|
||||
PF_NONE,
|
||||
/* RGB formats */
|
||||
@@ -363,6 +368,15 @@ static inline u32 get_pixelformat_without_alpha(u32 drm)
|
||||
}
|
||||
}
|
||||
|
||||
+/*
|
||||
+ * All non-alpha color formats derived from native alpha color formats are
|
||||
+ * either characterized by a FourCC format code
|
||||
+ */
|
||||
+static inline u32 is_xrgb(u32 drm)
|
||||
+{
|
||||
+ return ((drm & 'X') == 'X' || (drm & ('X' << 8)) == ('X' << 8));
|
||||
+}
|
||||
+
|
||||
static irqreturn_t ltdc_irq_thread(int irq, void *arg)
|
||||
{
|
||||
struct drm_device *ddev = arg;
|
||||
@@ -430,7 +444,8 @@ static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
pm_runtime_get_sync(ddev->dev);
|
||||
|
||||
/* Sets the background color value */
|
||||
- reg_write(ldev->regs, LTDC_BCCR, BCCR_BCBLACK);
|
||||
+ reg_write(ldev->regs, LTDC_BCCR,
|
||||
+ DRM_ARGB_TO_LTDC_RGB24(crtc->state->bgcolor));
|
||||
|
||||
/* Enable IRQ */
|
||||
reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE);
|
||||
@@ -451,6 +466,9 @@ static void ltdc_crtc_atomic_disable(struct drm_crtc *crtc,
|
||||
|
||||
drm_crtc_vblank_off(crtc);
|
||||
|
||||
+ /* Reset background color */
|
||||
+ reg_write(ldev->regs, LTDC_BCCR, BCCR_BCBLACK);
|
||||
+
|
||||
/* disable IRQ */
|
||||
reg_clear(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE);
|
||||
|
||||
@@ -530,7 +548,6 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
|
||||
struct drm_encoder *encoder = NULL;
|
||||
struct drm_bridge *bridge = NULL;
|
||||
struct drm_display_mode *mode = &crtc->state->adjusted_mode;
|
||||
- struct videomode vm;
|
||||
u32 hsync, vsync, accum_hbp, accum_vbp, accum_act_w, accum_act_h;
|
||||
u32 total_width, total_height;
|
||||
u32 bus_flags = 0;
|
||||
@@ -539,20 +556,17 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
|
||||
|
||||
/* get encoder from crtc */
|
||||
drm_for_each_encoder(encoder, ddev)
|
||||
- if (encoder->crtc == crtc)
|
||||
- break;
|
||||
+ if (encoder->crtc == crtc) break;
|
||||
|
||||
if (encoder) {
|
||||
/* get bridge from encoder */
|
||||
list_for_each_entry(bridge, &encoder->bridge_chain, chain_node)
|
||||
- if (bridge->encoder == encoder)
|
||||
- break;
|
||||
+ if (bridge->encoder == encoder) break;
|
||||
|
||||
/* Get the connector from encoder */
|
||||
drm_connector_list_iter_begin(ddev, &iter);
|
||||
drm_for_each_connector_iter(connector, &iter)
|
||||
- if (connector->encoder == encoder)
|
||||
- break;
|
||||
+ if (connector->encoder == encoder) break;
|
||||
drm_connector_list_iter_end(&iter);
|
||||
}
|
||||
|
||||
@@ -569,31 +583,33 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
|
||||
}
|
||||
}
|
||||
|
||||
- drm_display_mode_to_videomode(mode, &vm);
|
||||
-
|
||||
DRM_DEBUG_DRIVER("CRTC:%d mode:%s\n", crtc->base.id, mode->name);
|
||||
- DRM_DEBUG_DRIVER("Video mode: %dx%d", vm.hactive, vm.vactive);
|
||||
+ DRM_DEBUG_DRIVER("Video mode: %dx%d", mode->hdisplay, mode->vdisplay);
|
||||
DRM_DEBUG_DRIVER(" hfp %d hbp %d hsl %d vfp %d vbp %d vsl %d\n",
|
||||
- vm.hfront_porch, vm.hback_porch, vm.hsync_len,
|
||||
- vm.vfront_porch, vm.vback_porch, vm.vsync_len);
|
||||
+ mode->hsync_start - mode->hdisplay,
|
||||
+ mode->htotal - mode->hsync_end,
|
||||
+ mode->hsync_end - mode->hsync_start,
|
||||
+ mode->vsync_start - mode->vdisplay,
|
||||
+ mode->vtotal - mode->vsync_end,
|
||||
+ mode->vsync_end - mode->vsync_start);
|
||||
|
||||
/* Convert video timings to ltdc timings */
|
||||
- hsync = vm.hsync_len - 1;
|
||||
- vsync = vm.vsync_len - 1;
|
||||
- accum_hbp = hsync + vm.hback_porch;
|
||||
- accum_vbp = vsync + vm.vback_porch;
|
||||
- accum_act_w = accum_hbp + vm.hactive;
|
||||
- accum_act_h = accum_vbp + vm.vactive;
|
||||
- total_width = accum_act_w + vm.hfront_porch;
|
||||
- total_height = accum_act_h + vm.vfront_porch;
|
||||
+ hsync = mode->hsync_end - mode->hsync_start - 1;
|
||||
+ vsync = mode->vsync_end - mode->vsync_start - 1;
|
||||
+ accum_hbp = mode->htotal - mode->hsync_start - 1;
|
||||
+ accum_vbp = mode->vtotal - mode->vsync_start - 1;
|
||||
+ accum_act_w = accum_hbp + mode->hdisplay;
|
||||
+ accum_act_h = accum_vbp + mode->vdisplay;
|
||||
+ total_width = mode->htotal - 1;
|
||||
+ total_height = mode->vtotal - 1;
|
||||
|
||||
/* Configures the HS, VS, DE and PC polarities. Default Active Low */
|
||||
val = 0;
|
||||
|
||||
- if (vm.flags & DISPLAY_FLAGS_HSYNC_HIGH)
|
||||
+ if (mode->flags & DRM_MODE_FLAG_PHSYNC)
|
||||
val |= GCR_HSPOL;
|
||||
|
||||
- if (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH)
|
||||
+ if (mode->flags & DRM_MODE_FLAG_PVSYNC)
|
||||
val |= GCR_VSPOL;
|
||||
|
||||
if (bus_flags & DRM_BUS_FLAG_DE_LOW)
|
||||
@@ -753,22 +769,44 @@ static int ltdc_plane_atomic_check(struct drm_plane *plane,
|
||||
struct drm_plane_state *state)
|
||||
{
|
||||
struct drm_framebuffer *fb = state->fb;
|
||||
|
|
@ -656,10 +1086,7 @@ index 6e28f707092f..308755aa7b95 100644
|
|||
+ src->y1 = state->src_y >> 16;
|
||||
+ src->x2 = (state->src_w >> 16) + src->x1 - 1;
|
||||
+ src->y2 = (state->src_h >> 16) + src->y1 - 1;
|
||||
|
||||
- /* Reject scaling */
|
||||
- if (src_w != state->crtc_w || src_h != state->crtc_h) {
|
||||
- DRM_ERROR("Scaling is not supported");
|
||||
+
|
||||
+ dst->x1 = state->crtc_x;
|
||||
+ dst->y1 = state->crtc_y;
|
||||
+ dst->x2 = state->crtc_w + dst->x1 - 1;
|
||||
|
|
@ -678,7 +1105,10 @@ index 6e28f707092f..308755aa7b95 100644
|
|||
+ if (crtc_state && (crtc_state->mode.hdisplay <= dst->x2 ||
|
||||
+ crtc_state->mode.vdisplay <= dst->y2))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
|
||||
- /* Reject scaling */
|
||||
- if (src_w != state->crtc_w || src_h != state->crtc_h) {
|
||||
- DRM_ERROR("Scaling is not supported");
|
||||
+ /* source sizes do not have to exceed destination sizes */
|
||||
+ if (dst->x2 - dst->x1 < src->x2 - src->x1 ||
|
||||
+ dst->y2 - dst->y1 < src->y2 - src->y1)
|
||||
|
|
@ -687,7 +1117,7 @@ index 6e28f707092f..308755aa7b95 100644
|
|||
|
||||
return 0;
|
||||
}
|
||||
@@ -749,44 +771,36 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
|
||||
@@ -778,44 +816,37 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
|
||||
{
|
||||
struct ltdc_device *ldev = plane_to_ltdc(plane);
|
||||
struct drm_plane_state *state = plane->state;
|
||||
|
|
@ -701,6 +1131,7 @@ index 6e28f707092f..308755aa7b95 100644
|
|||
- u32 y1 = state->crtc_y + state->crtc_h - 1;
|
||||
- u32 src_x, src_y, src_w, src_h;
|
||||
u32 val, pitch_in_bytes, line_length, paddr, ahbp, avbp, bpcr;
|
||||
+ u32 bgcolor = DRM_ARGB_TO_LTDC_RGB24(state->crtc->state->bgcolor);
|
||||
enum ltdc_pix_fmt pf;
|
||||
+ struct drm_rect dr;
|
||||
|
||||
|
|
@ -742,7 +1173,7 @@ index 6e28f707092f..308755aa7b95 100644
|
|||
reg_update_bits(ldev->regs, LTDC_L1WVPCR + lofs,
|
||||
LXWVPCR_WVSTPOS | LXWVPCR_WVSPPOS, val);
|
||||
|
||||
@@ -805,8 +819,8 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
|
||||
@@ -834,14 +865,14 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
|
||||
|
||||
/* Configures the color frame buffer pitch in bytes & line length */
|
||||
pitch_in_bytes = fb->pitches[0];
|
||||
|
|
@ -753,7 +1184,45 @@ index 6e28f707092f..308755aa7b95 100644
|
|||
val = ((pitch_in_bytes << 16) | line_length);
|
||||
reg_update_bits(ldev->regs, LTDC_L1CFBLR + lofs,
|
||||
LXCFBLR_CFBLL | LXCFBLR_CFBP, val);
|
||||
@@ -829,7 +843,7 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
|
||||
|
||||
/* Specifies the constant alpha value */
|
||||
- val = CONSTA_MAX;
|
||||
+ val = state->alpha >> 8;
|
||||
reg_update_bits(ldev->regs, LTDC_L1CACR + lofs, LXCACR_CONSTA, val);
|
||||
|
||||
/* Specifies the blending factors */
|
||||
@@ -849,16 +880,34 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
|
||||
if (!fb->format->has_alpha)
|
||||
val = BF1_CA | BF2_1CA;
|
||||
|
||||
- /* Manage hw-specific capabilities */
|
||||
- if (ldev->caps.non_alpha_only_l1 &&
|
||||
- plane->type != DRM_PLANE_TYPE_PRIMARY)
|
||||
- val = BF1_PAXCA | BF2_1PAXCA;
|
||||
+ /*
|
||||
+ * Manage hw-specific capabilities
|
||||
+ *
|
||||
+ * Depending on the hardware version, the background color can not be
|
||||
+ * properly displayed with non-alpha color formats derived from native
|
||||
+ * alpha color formats (such as XR24 or XR15) since the use of this
|
||||
+ * pixel format generates a non transparent layer. As a workaround,
|
||||
+ * the stage background color of the layer and the general background
|
||||
+ * color need to be synced.
|
||||
+ *
|
||||
+ * This is done by activating for all XRGB color format the default
|
||||
+ * color as the background color and then setting blending factor
|
||||
+ * accordingly.
|
||||
+ */
|
||||
+ if (ldev->caps.non_alpha_only_l1) {
|
||||
+ if (is_xrgb(fb->format->format)) {
|
||||
+ val = BF1_CA | BF2_1CA;
|
||||
+ reg_write(ldev->regs, LTDC_L1DCCR + lofs, bgcolor);
|
||||
+ } else {
|
||||
+ val = BF1_PAXCA | BF2_1PAXCA;
|
||||
+ }
|
||||
+ }
|
||||
|
||||
reg_update_bits(ldev->regs, LTDC_L1BFCR + lofs,
|
||||
LXBFCR_BF2 | LXBFCR_BF1, val);
|
||||
|
||||
/* Configures the frame buffer line number */
|
||||
|
|
@ -762,8 +1231,42 @@ index 6e28f707092f..308755aa7b95 100644
|
|||
reg_update_bits(ldev->regs, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, val);
|
||||
|
||||
/* Sets the FB address */
|
||||
@@ -992,6 +1041,8 @@ static struct drm_plane *ltdc_plane_create(struct drm_device *ddev,
|
||||
|
||||
drm_plane_helper_add(plane, <dc_plane_helper_funcs);
|
||||
|
||||
+ drm_plane_create_alpha_property(plane);
|
||||
+
|
||||
DRM_DEBUG_DRIVER("plane:%d created\n", plane->base.id);
|
||||
|
||||
return plane;
|
||||
@@ -1019,6 +1070,8 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
+ drm_plane_create_zpos_immutable_property(primary, 0);
|
||||
+
|
||||
ret = drm_crtc_init_with_planes(ddev, crtc, primary, NULL,
|
||||
<dc_crtc_funcs, NULL);
|
||||
if (ret) {
|
||||
@@ -1028,6 +1081,7 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
|
||||
|
||||
drm_crtc_helper_add(crtc, <dc_crtc_helper_funcs);
|
||||
|
||||
+ drm_crtc_add_bgcolor_property(crtc);
|
||||
drm_mode_crtc_set_gamma_size(crtc, CLUT_SIZE);
|
||||
drm_crtc_enable_color_mgmt(crtc, 0, false, CLUT_SIZE);
|
||||
|
||||
@@ -1041,6 +1095,7 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
|
||||
DRM_ERROR("Can not create overlay plane %d\n", i);
|
||||
goto cleanup;
|
||||
}
|
||||
+ drm_plane_create_zpos_immutable_property(overlay, i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
diff --git a/drivers/input/touchscreen/edt-ft5x06.c b/drivers/input/touchscreen/edt-ft5x06.c
|
||||
index 6ff81d48da86..1643ddf5f65e 100644
|
||||
index 6ff81d48d..1643ddf5f 100644
|
||||
--- a/drivers/input/touchscreen/edt-ft5x06.c
|
||||
+++ b/drivers/input/touchscreen/edt-ft5x06.c
|
||||
@@ -30,6 +30,8 @@
|
||||
|
|
@ -813,7 +1316,7 @@ index 6ff81d48da86..1643ddf5f65e 100644
|
|||
|
||||
dev_dbg(&client->dev,
|
||||
diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c
|
||||
index 6612f9e2d7e8..dee33d8dd9f6 100644
|
||||
index a06385c55..388544f2d 100644
|
||||
--- a/drivers/input/touchscreen/goodix.c
|
||||
+++ b/drivers/input/touchscreen/goodix.c
|
||||
@@ -21,6 +21,7 @@
|
||||
|
|
@ -824,7 +1327,7 @@ index 6612f9e2d7e8..dee33d8dd9f6 100644
|
|||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
@@ -1204,6 +1205,8 @@ static int goodix_ts_probe(struct i2c_client *client,
|
||||
@@ -1153,6 +1154,8 @@ static int goodix_ts_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct goodix_ts_data *ts;
|
||||
|
|
@ -833,7 +1336,7 @@ index 6612f9e2d7e8..dee33d8dd9f6 100644
|
|||
int error;
|
||||
|
||||
dev_dbg(&client->dev, "I2C Address: 0x%02x\n", client->addr);
|
||||
@@ -1303,6 +1306,17 @@ static int goodix_ts_probe(struct i2c_client *client,
|
||||
@@ -1252,6 +1255,17 @@ static int goodix_ts_probe(struct i2c_client *client,
|
||||
return error;
|
||||
}
|
||||
|
||||
|
|
@ -851,7 +1354,7 @@ index 6612f9e2d7e8..dee33d8dd9f6 100644
|
|||
return 0;
|
||||
}
|
||||
|
||||
@@ -1358,6 +1372,7 @@ static int __maybe_unused goodix_suspend(struct device *dev)
|
||||
@@ -1307,6 +1321,7 @@ static int __maybe_unused goodix_suspend(struct device *dev)
|
||||
* sooner, delay 58ms here.
|
||||
*/
|
||||
msleep(58);
|
||||
|
|
@ -859,8 +1362,57 @@ index 6612f9e2d7e8..dee33d8dd9f6 100644
|
|||
return 0;
|
||||
}
|
||||
|
||||
diff --git a/include/drm/drm_blend.h b/include/drm/drm_blend.h
|
||||
index 88bdfec3b..9e2538dd7 100644
|
||||
--- a/include/drm/drm_blend.h
|
||||
+++ b/include/drm/drm_blend.h
|
||||
@@ -58,4 +58,5 @@ int drm_atomic_normalize_zpos(struct drm_device *dev,
|
||||
struct drm_atomic_state *state);
|
||||
int drm_plane_create_blend_mode_property(struct drm_plane *plane,
|
||||
unsigned int supported_modes);
|
||||
+void drm_crtc_add_bgcolor_property(struct drm_crtc *crtc);
|
||||
#endif
|
||||
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
|
||||
index 59b51a09c..d6808aca9 100644
|
||||
--- a/include/drm/drm_crtc.h
|
||||
+++ b/include/drm/drm_crtc.h
|
||||
@@ -288,6 +288,18 @@ struct drm_crtc_state {
|
||||
*/
|
||||
struct drm_property_blob *gamma_lut;
|
||||
|
||||
+ /**
|
||||
+ * @bgcolor:
|
||||
+ *
|
||||
+ * RGB value representing the pipe's background color. The background
|
||||
+ * color (aka "canvas color") of a pipe is the color that will be used
|
||||
+ * for pixels not covered by a plane, or covered by transparent pixels
|
||||
+ * of a plane. The value here should be built via drm_argb();
|
||||
+ * individual color components can be extracted with desired precision
|
||||
+ * via the DRM_ARGB_*() macros.
|
||||
+ */
|
||||
+ u64 bgcolor;
|
||||
+
|
||||
/**
|
||||
* @target_vblank:
|
||||
*
|
||||
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
|
||||
index a18f73eb3..3e37a3a19 100644
|
||||
--- a/include/drm/drm_mode_config.h
|
||||
+++ b/include/drm/drm_mode_config.h
|
||||
@@ -861,6 +861,11 @@ struct drm_mode_config {
|
||||
*/
|
||||
struct drm_property *hdcp_content_type_property;
|
||||
|
||||
+ /**
|
||||
+ * @bgcolor_property: RGB background color for CRTC.
|
||||
+ */
|
||||
+ struct drm_property *bgcolor_property;
|
||||
+
|
||||
/* dumb ioctl parameters */
|
||||
uint32_t preferred_depth, prefer_shadow;
|
||||
|
||||
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
|
||||
index 863eda048265..7d845d86a474 100644
|
||||
index 863eda048..5042afb3d 100644
|
||||
--- a/include/uapi/drm/drm_mode.h
|
||||
+++ b/include/uapi/drm/drm_mode.h
|
||||
@@ -97,6 +97,12 @@ extern "C" {
|
||||
|
|
@ -876,6 +1428,41 @@ index 863eda048265..7d845d86a474 100644
|
|||
/* Picture aspect ratio options */
|
||||
#define DRM_MODE_PICTURE_ASPECT_NONE 0
|
||||
#define DRM_MODE_PICTURE_ASPECT_4_3 1
|
||||
@@ -1030,6 +1036,34 @@ struct drm_mode_rect {
|
||||
__s32 y2;
|
||||
};
|
||||
|
||||
+/*
|
||||
+ * Put ARGB values into a standard 64-bit representation that can be used
|
||||
+ * for ioctl parameters, inter-driver commmunication, etc. If the component
|
||||
+ * values being provided contain less than 16 bits of precision, they'll
|
||||
+ * be shifted into the most significant bits.
|
||||
+ */
|
||||
+static inline __u64
|
||||
+drm_argb(__u8 bpc, __u16 alpha, __u16 red, __u16 green, __u16 blue)
|
||||
+{
|
||||
+ int msb_shift = 16 - bpc;
|
||||
+
|
||||
+ return (__u64)alpha << msb_shift << 48 |
|
||||
+ (__u64)red << msb_shift << 32 |
|
||||
+ (__u64)green << msb_shift << 16 |
|
||||
+ (__u64)blue << msb_shift;
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
+ * Extract the specified number of bits of a specific color component from a
|
||||
+ * standard 64-bit ARGB value.
|
||||
+ */
|
||||
+#define DRM_ARGB_COMP(c, shift, numbits) \
|
||||
+ (__u16)(((c) & 0xFFFFull << (shift)) >> ((shift) + 16 - (numbits)))
|
||||
+#define DRM_ARGB_BLUE(c, numbits) DRM_ARGB_COMP(c, 0, numbits)
|
||||
+#define DRM_ARGB_GREEN(c, numbits) DRM_ARGB_COMP(c, 16, numbits)
|
||||
+#define DRM_ARGB_RED(c, numbits) DRM_ARGB_COMP(c, 32, numbits)
|
||||
+#define DRM_ARGB_ALPHA(c, numbits) DRM_ARGB_COMP(c, 48, numbits)
|
||||
+
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
--
|
||||
2.17.1
|
||||
|
||||
|
|
@ -1,9 +1,8 @@
|
|||
From 5c27ce1dc05fd740cc8f0f1d8072361ccab51a9f Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:02:36 +0100
|
||||
Subject: [PATCH 07/22] ARM 5.10.10-stm32mp1-r1 HWSPINLOCK
|
||||
From e6689ed5bee01020d4f2411e92c3741a06232c92 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:43 +0200
|
||||
Subject: [PATCH 07/23] ARM 5.10.61-stm32mp1-r2 HWSPINLOCK
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
Documentation/locking/hwspinlock.rst | 10 ++-
|
||||
drivers/hwspinlock/hwspinlock_core.c | 80 +++++++++++++++++++-----
|
||||
|
|
@ -12,7 +11,7 @@ Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
|||
4 files changed, 110 insertions(+), 42 deletions(-)
|
||||
|
||||
diff --git a/Documentation/locking/hwspinlock.rst b/Documentation/locking/hwspinlock.rst
|
||||
index 6f03713b7003..605bd2dc8a03 100644
|
||||
index 6f03713b7..605bd2dc8 100644
|
||||
--- a/Documentation/locking/hwspinlock.rst
|
||||
+++ b/Documentation/locking/hwspinlock.rst
|
||||
@@ -54,9 +54,11 @@ Should be called from a process context (might sleep).
|
||||
|
|
@ -45,7 +44,7 @@ index 6f03713b7003..605bd2dc8a03 100644
|
|||
};
|
||||
|
||||
diff --git a/drivers/hwspinlock/hwspinlock_core.c b/drivers/hwspinlock/hwspinlock_core.c
|
||||
index fd5f5c5a5244..a2197af8973d 100644
|
||||
index fd5f5c5a5..a2197af89 100644
|
||||
--- a/drivers/hwspinlock/hwspinlock_core.c
|
||||
+++ b/drivers/hwspinlock/hwspinlock_core.c
|
||||
@@ -29,6 +29,8 @@
|
||||
|
|
@ -230,7 +229,7 @@ index fd5f5c5a5244..a2197af8973d 100644
|
|||
return ret;
|
||||
}
|
||||
diff --git a/drivers/hwspinlock/hwspinlock_internal.h b/drivers/hwspinlock/hwspinlock_internal.h
|
||||
index 29892767bb7a..e1f9c9600635 100644
|
||||
index 29892767b..e1f9c9600 100644
|
||||
--- a/drivers/hwspinlock/hwspinlock_internal.h
|
||||
+++ b/drivers/hwspinlock/hwspinlock_internal.h
|
||||
@@ -35,11 +35,13 @@ struct hwspinlock_ops {
|
||||
|
|
@ -248,7 +247,7 @@ index 29892767bb7a..e1f9c9600635 100644
|
|||
};
|
||||
|
||||
diff --git a/drivers/hwspinlock/stm32_hwspinlock.c b/drivers/hwspinlock/stm32_hwspinlock.c
|
||||
index 3ad0ce0da4d9..6c3be33f3faf 100644
|
||||
index 3ad0ce0da..6c3be33f3 100644
|
||||
--- a/drivers/hwspinlock/stm32_hwspinlock.c
|
||||
+++ b/drivers/hwspinlock/stm32_hwspinlock.c
|
||||
@@ -54,8 +54,23 @@ static const struct hwspinlock_ops stm32_hwspinlock_ops = {
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,22 +1,21 @@
|
|||
From 4ceafa69af22aeb262fb8d2e0e3cd845773ce0ae Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:07:25 +0100
|
||||
Subject: [PATCH 09/22] ARM 5.10.10-stm32mp1-r1 MAILBOX-REMOTEPROC-RPMSG
|
||||
From 471f33cca896724288eed3ab00e022aab3302b08 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:45 +0200
|
||||
Subject: [PATCH 09/23] ARM 5.10.61-stm32mp1-r2 MAILBOX-REMOTEPROC-RPMSG
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
Documentation/staging/remoteproc.rst | 22 +
|
||||
drivers/mailbox/Kconfig | 7 +
|
||||
drivers/mailbox/Makefile | 2 +
|
||||
drivers/mailbox/arm-smc-mailbox.c | 166 ++++++
|
||||
drivers/remoteproc/Kconfig | 28 +
|
||||
drivers/remoteproc/Kconfig | 29 +
|
||||
drivers/remoteproc/Makefile | 3 +
|
||||
drivers/remoteproc/remoteproc_core.c | 19 +-
|
||||
drivers/remoteproc/rproc_srm_core.c | 303 ++++++++++
|
||||
drivers/remoteproc/rproc_srm_core.h | 98 ++++
|
||||
drivers/remoteproc/rproc_srm_dev.c | 744 +++++++++++++++++++++++++
|
||||
drivers/remoteproc/stm32_rproc.c | 364 ++++++++----
|
||||
drivers/remoteproc/tee_remoteproc.c | 380 +++++++++++++
|
||||
drivers/remoteproc/stm32_rproc.c | 346 ++++++++----
|
||||
drivers/remoteproc/tee_remoteproc.c | 378 +++++++++++++
|
||||
drivers/rpmsg/Kconfig | 9 +
|
||||
drivers/rpmsg/Makefile | 1 +
|
||||
drivers/rpmsg/rpmsg_core.c | 19 +
|
||||
|
|
@ -25,8 +24,8 @@ Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
|||
drivers/rpmsg/virtio_rpmsg_bus.c | 11 +
|
||||
include/linux/mailbox/arm-smccc-mbox.h | 20 +
|
||||
include/linux/rpmsg.h | 9 +
|
||||
include/linux/tee_remoteproc.h | 106 ++++
|
||||
21 files changed, 2540 insertions(+), 115 deletions(-)
|
||||
include/linux/tee_remoteproc.h | 101 ++++
|
||||
21 files changed, 2516 insertions(+), 115 deletions(-)
|
||||
create mode 100644 drivers/mailbox/arm-smc-mailbox.c
|
||||
create mode 100644 drivers/remoteproc/rproc_srm_core.c
|
||||
create mode 100644 drivers/remoteproc/rproc_srm_core.h
|
||||
|
|
@ -37,7 +36,7 @@ Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
|||
create mode 100644 include/linux/tee_remoteproc.h
|
||||
|
||||
diff --git a/Documentation/staging/remoteproc.rst b/Documentation/staging/remoteproc.rst
|
||||
index 9cccd3dd6a4b..c2367e3c0b19 100644
|
||||
index 9cccd3dd6..c2367e3c0 100644
|
||||
--- a/Documentation/staging/remoteproc.rst
|
||||
+++ b/Documentation/staging/remoteproc.rst
|
||||
@@ -357,3 +357,25 @@ Of course, RSC_VDEV resource entries are only good enough for static
|
||||
|
|
@ -67,7 +66,7 @@ index 9cccd3dd6a4b..c2367e3c0b19 100644
|
|||
+The resources handled by the SRM are defined in the DeviceTree: please read
|
||||
+Documentation/devicetree/bindings/remoteproc/rproc-srm.txt for details.
|
||||
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
|
||||
index 05b1009e2820..3d388bf2d6f6 100644
|
||||
index 05b1009e2..3d388bf2d 100644
|
||||
--- a/drivers/mailbox/Kconfig
|
||||
+++ b/drivers/mailbox/Kconfig
|
||||
@@ -16,6 +16,13 @@ config ARM_MHU
|
||||
|
|
@ -85,7 +84,7 @@ index 05b1009e2820..3d388bf2d6f6 100644
|
|||
tristate "i.MX Mailbox"
|
||||
depends on ARCH_MXC || COMPILE_TEST
|
||||
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
|
||||
index 2e06e02b2e03..24841a298f4a 100644
|
||||
index 2e06e02b2..24841a298 100644
|
||||
--- a/drivers/mailbox/Makefile
|
||||
+++ b/drivers/mailbox/Makefile
|
||||
@@ -7,6 +7,8 @@ obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
|
||||
|
|
@ -99,7 +98,7 @@ index 2e06e02b2e03..24841a298f4a 100644
|
|||
obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
|
||||
diff --git a/drivers/mailbox/arm-smc-mailbox.c b/drivers/mailbox/arm-smc-mailbox.c
|
||||
new file mode 100644
|
||||
index 000000000000..a6ec56f41f7f
|
||||
index 000000000..a6ec56f41
|
||||
--- /dev/null
|
||||
+++ b/drivers/mailbox/arm-smc-mailbox.c
|
||||
@@ -0,0 +1,166 @@
|
||||
|
|
@ -270,7 +269,7 @@ index 000000000000..a6ec56f41f7f
|
|||
+MODULE_DESCRIPTION("Generic ARM smc mailbox driver");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
|
||||
index d99548fb5dde..cffac49af045 100644
|
||||
index d99548fb5..d3253dc6f 100644
|
||||
--- a/drivers/remoteproc/Kconfig
|
||||
+++ b/drivers/remoteproc/Kconfig
|
||||
@@ -23,6 +23,25 @@ config REMOTEPROC_CDEV
|
||||
|
|
@ -299,13 +298,21 @@ index d99548fb5dde..cffac49af045 100644
|
|||
config IMX_REMOTEPROC
|
||||
tristate "IMX6/7 remoteproc support"
|
||||
depends on ARCH_MXC
|
||||
@@ -288,6 +307,15 @@ config TI_K3_R5_REMOTEPROC
|
||||
@@ -252,6 +271,7 @@ config STM32_RPROC
|
||||
depends on ARCH_STM32
|
||||
depends on REMOTEPROC
|
||||
select MAILBOX
|
||||
+ select TEE_REMOTEPROC
|
||||
help
|
||||
Say y here to support STM32 MCU processors via the
|
||||
remote processor framework.
|
||||
@@ -288,6 +308,15 @@ config TI_K3_R5_REMOTEPROC
|
||||
It's safe to say N here if you're not interested in utilizing
|
||||
a slave processor.
|
||||
|
||||
+
|
||||
+config TEE_REMOTEPROC
|
||||
+ tristate "trusted firmware Support by a Trusted Application"
|
||||
+ tristate "trusted firmware support by a trusted application"
|
||||
+ depends on OPTEE
|
||||
+ help
|
||||
+ Support for trusted remote processors firmware. The firmware
|
||||
|
|
@ -316,7 +323,7 @@ index d99548fb5dde..cffac49af045 100644
|
|||
|
||||
endmenu
|
||||
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
|
||||
index da2ace4ec86c..9f2eb094c509 100644
|
||||
index da2ace4ec..9f2eb094c 100644
|
||||
--- a/drivers/remoteproc/Makefile
|
||||
+++ b/drivers/remoteproc/Makefile
|
||||
@@ -11,6 +11,9 @@ remoteproc-y += remoteproc_sysfs.o
|
||||
|
|
@ -330,7 +337,7 @@ index da2ace4ec86c..9f2eb094c509 100644
|
|||
obj-$(CONFIG_INGENIC_VPU_RPROC) += ingenic_rproc.o
|
||||
obj-$(CONFIG_MTK_SCP) += mtk_scp.o mtk_scp_ipi.o
|
||||
diff --git a/drivers/remoteproc/remoteproc_core.c b/drivers/remoteproc/remoteproc_core.c
|
||||
index dab2c0f5caf0..316acd156b0b 100644
|
||||
index 47924d5ed..99bdc6eb4 100644
|
||||
--- a/drivers/remoteproc/remoteproc_core.c
|
||||
+++ b/drivers/remoteproc/remoteproc_core.c
|
||||
@@ -37,6 +37,7 @@
|
||||
|
|
@ -384,7 +391,7 @@ index dab2c0f5caf0..316acd156b0b 100644
|
|||
/*
|
||||
* Remind ourselves the remote processor has been attached to rather
|
||||
* than booted by the remoteproc core. This is important because the
|
||||
@@ -2297,6 +2312,8 @@ int rproc_del(struct rproc *rproc)
|
||||
@@ -2296,6 +2311,8 @@ int rproc_del(struct rproc *rproc)
|
||||
list_del_rcu(&rproc->node);
|
||||
mutex_unlock(&rproc_list_mutex);
|
||||
|
||||
|
|
@ -395,7 +402,7 @@ index dab2c0f5caf0..316acd156b0b 100644
|
|||
|
||||
diff --git a/drivers/remoteproc/rproc_srm_core.c b/drivers/remoteproc/rproc_srm_core.c
|
||||
new file mode 100644
|
||||
index 000000000000..fc61e8b35686
|
||||
index 000000000..fc61e8b35
|
||||
--- /dev/null
|
||||
+++ b/drivers/remoteproc/rproc_srm_core.c
|
||||
@@ -0,0 +1,303 @@
|
||||
|
|
@ -704,7 +711,7 @@ index 000000000000..fc61e8b35686
|
|||
+MODULE_LICENSE("GPL v2");
|
||||
diff --git a/drivers/remoteproc/rproc_srm_core.h b/drivers/remoteproc/rproc_srm_core.h
|
||||
new file mode 100644
|
||||
index 000000000000..7dffdb38f4d4
|
||||
index 000000000..7dffdb38f
|
||||
--- /dev/null
|
||||
+++ b/drivers/remoteproc/rproc_srm_core.h
|
||||
@@ -0,0 +1,98 @@
|
||||
|
|
@ -808,7 +815,7 @@ index 000000000000..7dffdb38f4d4
|
|||
+#endif
|
||||
diff --git a/drivers/remoteproc/rproc_srm_dev.c b/drivers/remoteproc/rproc_srm_dev.c
|
||||
new file mode 100644
|
||||
index 000000000000..9dad0820f263
|
||||
index 000000000..9dad0820f
|
||||
--- /dev/null
|
||||
+++ b/drivers/remoteproc/rproc_srm_dev.c
|
||||
@@ -0,0 +1,744 @@
|
||||
|
|
@ -1557,7 +1564,7 @@ index 000000000000..9dad0820f263
|
|||
+MODULE_DESCRIPTION("Remoteproc System Resource Manager driver - dev");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c
|
||||
index d2414cc1d90d..f5a65eea9cdc 100644
|
||||
index d2414cc1d..9e9f89895 100644
|
||||
--- a/drivers/remoteproc/stm32_rproc.c
|
||||
+++ b/drivers/remoteproc/stm32_rproc.c
|
||||
@@ -20,13 +20,11 @@
|
||||
|
|
@ -1598,26 +1605,17 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
struct stm32_syscon pdds;
|
||||
struct stm32_syscon m4_state;
|
||||
struct stm32_syscon rsctbl;
|
||||
@@ -87,10 +92,17 @@ struct stm32_rproc {
|
||||
@@ -87,7 +92,8 @@ struct stm32_rproc {
|
||||
struct stm32_rproc_mem *rmems;
|
||||
struct stm32_mbox mb[MBOX_NB_MBX];
|
||||
struct workqueue_struct *workqueue;
|
||||
- bool secured_soc;
|
||||
+ bool secured_fw;
|
||||
+ bool fw_loaded;
|
||||
+ struct tee_rproc *trproc;
|
||||
void __iomem *rsc_va;
|
||||
};
|
||||
|
||||
+struct stm32_rproc_conf {
|
||||
+ bool secured_fw;
|
||||
+ struct rproc_ops *ops;
|
||||
+};
|
||||
+
|
||||
static int stm32_rproc_pa_to_da(struct rproc *rproc, phys_addr_t pa, u64 *da)
|
||||
{
|
||||
unsigned int i;
|
||||
@@ -207,15 +219,139 @@ static int stm32_rproc_mbox_idx(struct rproc *rproc, const unsigned char *name)
|
||||
@@ -207,15 +213,139 @@ static int stm32_rproc_mbox_idx(struct rproc *rproc, const unsigned char *name)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -1727,14 +1725,14 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
+
|
||||
+ return tee_rproc_get_loaded_rsc_table(ddata->trproc);
|
||||
+}
|
||||
+
|
||||
|
||||
+static int stm32_rproc_tee_start(struct rproc *rproc)
|
||||
+{
|
||||
+ struct stm32_rproc *ddata = rproc->priv;
|
||||
+
|
||||
+ return tee_rproc_start(ddata->trproc);
|
||||
+}
|
||||
|
||||
+
|
||||
+static int stm32_rproc_tee_attach(struct rproc *rproc)
|
||||
+{
|
||||
+ /* Nothing to do, remote proc already started by the secured context */
|
||||
|
|
@ -1760,7 +1758,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
static int stm32_rproc_parse_memory_regions(struct rproc *rproc)
|
||||
{
|
||||
struct device *dev = rproc->dev.parent;
|
||||
@@ -274,12 +410,21 @@ static int stm32_rproc_parse_memory_regions(struct rproc *rproc)
|
||||
@@ -274,12 +404,21 @@ static int stm32_rproc_parse_memory_regions(struct rproc *rproc)
|
||||
|
||||
static int stm32_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
|
||||
{
|
||||
|
|
@ -1784,7 +1782,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
}
|
||||
|
||||
static irqreturn_t stm32_rproc_wdg(int irq, void *data)
|
||||
@@ -370,8 +515,13 @@ static int stm32_rproc_request_mbox(struct rproc *rproc)
|
||||
@@ -370,8 +509,13 @@ static int stm32_rproc_request_mbox(struct rproc *rproc)
|
||||
|
||||
ddata->mb[i].chan = mbox_request_channel_byname(cl, name);
|
||||
if (IS_ERR(ddata->mb[i].chan)) {
|
||||
|
|
@ -1799,7 +1797,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
dev_warn(dev, "cannot get %s mbox\n", name);
|
||||
ddata->mb[i].chan = NULL;
|
||||
}
|
||||
@@ -390,30 +540,6 @@ static int stm32_rproc_request_mbox(struct rproc *rproc)
|
||||
@@ -390,30 +534,6 @@ static int stm32_rproc_request_mbox(struct rproc *rproc)
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
|
|
@ -1830,7 +1828,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
static void stm32_rproc_add_coredump_trace(struct rproc *rproc)
|
||||
{
|
||||
struct rproc_debug_trace *trace;
|
||||
@@ -453,40 +579,34 @@ static int stm32_rproc_start(struct rproc *rproc)
|
||||
@@ -453,40 +573,34 @@ static int stm32_rproc_start(struct rproc *rproc)
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1882,7 +1880,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
|
||||
err = reset_control_assert(ddata->rst);
|
||||
if (err) {
|
||||
@@ -494,29 +614,8 @@ static int stm32_rproc_stop(struct rproc *rproc)
|
||||
@@ -494,29 +608,8 @@ static int stm32_rproc_stop(struct rproc *rproc)
|
||||
return err;
|
||||
}
|
||||
|
||||
|
|
@ -1913,7 +1911,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
}
|
||||
|
||||
static void stm32_rproc_kick(struct rproc *rproc, int vqid)
|
||||
@@ -553,8 +652,36 @@ static struct rproc_ops st_rproc_ops = {
|
||||
@@ -553,8 +646,19 @@ static struct rproc_ops st_rproc_ops = {
|
||||
.get_boot_addr = rproc_elf_get_boot_addr,
|
||||
};
|
||||
|
||||
|
|
@ -1927,31 +1925,14 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
+ .sanity_check = stm32_rproc_tee_elf_sanity_check,
|
||||
+ .load = stm32_rproc_tee_elf_load,
|
||||
+};
|
||||
+
|
||||
+static const struct stm32_rproc_conf stm32_rproc_default_conf = {
|
||||
+ .secured_fw = false,
|
||||
+ .ops = &st_rproc_ops,
|
||||
+};
|
||||
+
|
||||
+static const struct stm32_rproc_conf stm32_rproc_tee_conf = {
|
||||
+ .secured_fw = true,
|
||||
+ .ops = &st_rproc_tee_ops,
|
||||
+};
|
||||
+
|
||||
static const struct of_device_id stm32_rproc_match[] = {
|
||||
- { .compatible = "st,stm32mp1-m4" },
|
||||
+ {
|
||||
+ .compatible = "st,stm32mp1-m4",
|
||||
+ .data = &stm32_rproc_default_conf,
|
||||
+ },
|
||||
+ {
|
||||
+ .compatible = "st,stm32mp1-m4_optee",
|
||||
+ .data = &stm32_rproc_tee_conf,
|
||||
+ },
|
||||
+ {.compatible = "st,stm32mp1-m4",},
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, stm32_rproc_match);
|
||||
@@ -586,21 +713,18 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev,
|
||||
@@ -586,21 +690,18 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev,
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np = dev->of_node;
|
||||
|
|
@ -1977,7 +1958,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
|
||||
ddata->wdg_irq = irq;
|
||||
|
||||
@@ -612,36 +736,15 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev,
|
||||
@@ -612,36 +713,15 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev,
|
||||
dev_info(dev, "wdg irq registered\n");
|
||||
}
|
||||
|
||||
|
|
@ -1986,7 +1967,11 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
- dev_err(dev, "failed to get mcu reset\n");
|
||||
- return PTR_ERR(ddata->rst);
|
||||
- }
|
||||
-
|
||||
+ ddata->rst = devm_reset_control_get(dev, "mcu_rst");
|
||||
+ if (IS_ERR(ddata->rst))
|
||||
+ return dev_err_probe(dev, PTR_ERR(ddata->rst),
|
||||
+ "failed to get mcu_reset\n");
|
||||
|
||||
- /*
|
||||
- * if platform is secured the hold boot bit must be written by
|
||||
- * smc call and read normally.
|
||||
|
|
@ -2004,11 +1989,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
- return err;
|
||||
- }
|
||||
- ddata->secured_soc = tzen & tz.mask;
|
||||
+ ddata->rst = devm_reset_control_get(dev, "mcu_rst");
|
||||
+ if (IS_ERR(ddata->rst))
|
||||
+ return dev_err_probe(dev, PTR_ERR(ddata->rst),
|
||||
+ "failed to get mcu_reset\n");
|
||||
|
||||
-
|
||||
- err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot",
|
||||
- &ddata->hold_boot);
|
||||
- if (err) {
|
||||
|
|
@ -2022,73 +2003,68 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
|
||||
err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds);
|
||||
if (err)
|
||||
@@ -766,6 +869,8 @@ static int stm32_rproc_probe(struct platform_device *pdev)
|
||||
@@ -766,6 +846,7 @@ static int stm32_rproc_probe(struct platform_device *pdev)
|
||||
struct device *dev = &pdev->dev;
|
||||
struct stm32_rproc *ddata;
|
||||
struct device_node *np = dev->of_node;
|
||||
+ const struct of_device_id *of_id;
|
||||
+ const struct stm32_rproc_conf *conf;
|
||||
+ struct tee_rproc *trproc;
|
||||
struct rproc *rproc;
|
||||
unsigned int state;
|
||||
int ret;
|
||||
@@ -774,12 +879,18 @@ static int stm32_rproc_probe(struct platform_device *pdev)
|
||||
@@ -774,11 +855,32 @@ static int stm32_rproc_probe(struct platform_device *pdev)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
|
||||
+ of_id = of_match_device(stm32_rproc_match, &pdev->dev);
|
||||
+ if (of_id)
|
||||
+ conf = (const struct stm32_rproc_conf *)of_id->data;
|
||||
+ else
|
||||
+ return -EINVAL;
|
||||
- if (!rproc)
|
||||
- return -ENOMEM;
|
||||
+ trproc = tee_rproc_register(dev, STM32_MP1_FW_ID);
|
||||
+ if (!IS_ERR_OR_NULL(trproc)) {
|
||||
+ /*
|
||||
+ * Delagate the firmware management to the secure context. The
|
||||
+ * firmware loaded has to be signed.
|
||||
+ */
|
||||
+ dev_info(dev, "Support of signed firmware only\n");
|
||||
+
|
||||
+ rproc = rproc_alloc(dev, np->name, conf->ops, NULL, sizeof(*ddata));
|
||||
if (!rproc)
|
||||
return -ENOMEM;
|
||||
|
||||
ddata = rproc->priv;
|
||||
-
|
||||
+ ddata->secured_fw = conf->secured_fw;
|
||||
rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
|
||||
|
||||
ret = stm32_rproc_parse_dt(pdev, ddata, &rproc->auto_boot);
|
||||
@@ -820,12 +931,25 @@ static int stm32_rproc_probe(struct platform_device *pdev)
|
||||
if (ret)
|
||||
goto free_wkq;
|
||||
|
||||
+ if (ddata->secured_fw) {
|
||||
+ ddata->trproc = tee_rproc_register(dev, rproc,
|
||||
+ STM32_MP1_FW_ID);
|
||||
+ if (IS_ERR(ddata->trproc)) {
|
||||
+ ret = PTR_ERR(ddata->trproc);
|
||||
+ dev_err_probe(dev, ret, "TEE rproc device not found\n");
|
||||
+ goto free_mb;
|
||||
+ }
|
||||
+ } else {
|
||||
+ if (PTR_ERR(trproc) == -EPROBE_DEFER)
|
||||
+ return PTR_ERR(trproc);
|
||||
+ trproc = NULL;
|
||||
+ }
|
||||
+
|
||||
ret = rproc_add(rproc);
|
||||
if (ret)
|
||||
- goto free_mb;
|
||||
+ rproc = rproc_alloc(dev, np->name,
|
||||
+ trproc ? &st_rproc_tee_ops : &st_rproc_ops,
|
||||
+ NULL, sizeof(*ddata));
|
||||
+ if (!rproc) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto free_tee;
|
||||
+ }
|
||||
|
||||
return 0;
|
||||
ddata = rproc->priv;
|
||||
+ ddata->trproc = trproc;
|
||||
+ if (trproc)
|
||||
+ ddata->trproc->rproc = rproc;
|
||||
|
||||
rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
|
||||
|
||||
@@ -838,6 +940,10 @@ static int stm32_rproc_probe(struct platform_device *pdev)
|
||||
device_init_wakeup(dev, false);
|
||||
}
|
||||
rproc_free(rproc);
|
||||
+free_tee:
|
||||
+ if (trproc)
|
||||
+ tee_rproc_unregister(trproc);
|
||||
+
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -859,10 +965,21 @@ static int stm32_rproc_remove(struct platform_device *pdev)
|
||||
device_init_wakeup(dev, false);
|
||||
}
|
||||
rproc_free(rproc);
|
||||
+ if (ddata->trproc)
|
||||
+ tee_rproc_unregister(ddata->trproc);
|
||||
free_mb:
|
||||
stm32_rproc_free_mbox(rproc);
|
||||
free_wkq:
|
||||
@@ -851,6 +975,8 @@ static int stm32_rproc_remove(struct platform_device *pdev)
|
||||
rproc_shutdown(rproc);
|
||||
|
||||
rproc_del(rproc);
|
||||
+ if (ddata->trproc)
|
||||
+ tee_rproc_unregister(ddata->trproc);
|
||||
stm32_rproc_free_mbox(rproc);
|
||||
destroy_workqueue(ddata->workqueue);
|
||||
|
||||
@@ -863,6 +989,15 @@ static int stm32_rproc_remove(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -2104,7 +2080,7 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
static int __maybe_unused stm32_rproc_suspend(struct device *dev)
|
||||
{
|
||||
struct rproc *rproc = dev_get_drvdata(dev);
|
||||
@@ -891,6 +1026,7 @@ static SIMPLE_DEV_PM_OPS(stm32_rproc_pm_ops,
|
||||
@@ -891,6 +1008,7 @@ static SIMPLE_DEV_PM_OPS(stm32_rproc_pm_ops,
|
||||
static struct platform_driver stm32_rproc_driver = {
|
||||
.probe = stm32_rproc_probe,
|
||||
.remove = stm32_rproc_remove,
|
||||
|
|
@ -2114,10 +2090,10 @@ index d2414cc1d90d..f5a65eea9cdc 100644
|
|||
.pm = &stm32_rproc_pm_ops,
|
||||
diff --git a/drivers/remoteproc/tee_remoteproc.c b/drivers/remoteproc/tee_remoteproc.c
|
||||
new file mode 100644
|
||||
index 000000000000..67d924c95871
|
||||
index 000000000..690cb86f6
|
||||
--- /dev/null
|
||||
+++ b/drivers/remoteproc/tee_remoteproc.c
|
||||
@@ -0,0 +1,380 @@
|
||||
@@ -0,0 +1,378 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
+/*
|
||||
+ * Copyright (C) STMicroelectronics 2020 - All Rights Reserved
|
||||
|
|
@ -2371,8 +2347,7 @@ index 000000000000..67d924c95871
|
|||
+ {}
|
||||
+};
|
||||
+
|
||||
+struct tee_rproc *tee_rproc_register(struct device *dev, struct rproc *rproc,
|
||||
+ unsigned int fw_id)
|
||||
+struct tee_rproc *tee_rproc_register(struct device *dev, unsigned int fw_id)
|
||||
+{
|
||||
+ struct tee_client_device *rproc_tee_device;
|
||||
+ struct tee_ioctl_open_session_arg sess_arg;
|
||||
|
|
@ -2406,7 +2381,6 @@ index 000000000000..67d924c95871
|
|||
+ return ERR_PTR(ret);
|
||||
+ }
|
||||
+
|
||||
+ trproc->rproc = rproc;
|
||||
+ trproc->parent = dev;
|
||||
+ trproc->fw_id = fw_id;
|
||||
+ trproc->session_id = sess_arg.session;
|
||||
|
|
@ -2448,7 +2422,7 @@ index 000000000000..67d924c95871
|
|||
+ pvt_data.ctx = tee_client_open_context(NULL, tee_ctx_match, NULL,
|
||||
+ NULL);
|
||||
+ if (IS_ERR(pvt_data.ctx))
|
||||
+ return -ENODEV;
|
||||
+ return PTR_ERR(pvt_data.ctx);
|
||||
+
|
||||
+ pvt_data.dev = dev;
|
||||
+ INIT_LIST_HEAD(&pvt_data.sessions);
|
||||
|
|
@ -2499,7 +2473,7 @@ index 000000000000..67d924c95871
|
|||
+MODULE_AUTHOR("Arnaud Pouliquen <arnaud.pouliquen@st.com>");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
diff --git a/drivers/rpmsg/Kconfig b/drivers/rpmsg/Kconfig
|
||||
index f96716893c2a..7c8053aa968e 100644
|
||||
index f96716893..7c8053aa9 100644
|
||||
--- a/drivers/rpmsg/Kconfig
|
||||
+++ b/drivers/rpmsg/Kconfig
|
||||
@@ -64,4 +64,13 @@ config RPMSG_VIRTIO
|
||||
|
|
@ -2517,7 +2491,7 @@ index f96716893c2a..7c8053aa968e 100644
|
|||
+
|
||||
endmenu
|
||||
diff --git a/drivers/rpmsg/Makefile b/drivers/rpmsg/Makefile
|
||||
index ffe932ef6050..26a197365679 100644
|
||||
index ffe932ef6..26a197365 100644
|
||||
--- a/drivers/rpmsg/Makefile
|
||||
+++ b/drivers/rpmsg/Makefile
|
||||
@@ -7,4 +7,5 @@ obj-$(CONFIG_RPMSG_QCOM_GLINK) += qcom_glink.o
|
||||
|
|
@ -2527,7 +2501,7 @@ index ffe932ef6050..26a197365679 100644
|
|||
+obj-$(CONFIG_RPMSG_TTY) += rpmsg_tty.o
|
||||
obj-$(CONFIG_RPMSG_VIRTIO) += virtio_rpmsg_bus.o
|
||||
diff --git a/drivers/rpmsg/rpmsg_core.c b/drivers/rpmsg/rpmsg_core.c
|
||||
index 91de940896e3..380500872352 100644
|
||||
index 91de94089..380500872 100644
|
||||
--- a/drivers/rpmsg/rpmsg_core.c
|
||||
+++ b/drivers/rpmsg/rpmsg_core.c
|
||||
@@ -283,6 +283,25 @@ int rpmsg_trysend_offchannel(struct rpmsg_endpoint *ept, u32 src, u32 dst,
|
||||
|
|
@ -2557,7 +2531,7 @@ index 91de940896e3..380500872352 100644
|
|||
* match a rpmsg channel with a channel info struct.
|
||||
* this is used to make sure we're not creating rpmsg devices for channels
|
||||
diff --git a/drivers/rpmsg/rpmsg_internal.h b/drivers/rpmsg/rpmsg_internal.h
|
||||
index 3fc83cd50e98..244292540e58 100644
|
||||
index 3fc83cd50..244292540 100644
|
||||
--- a/drivers/rpmsg/rpmsg_internal.h
|
||||
+++ b/drivers/rpmsg/rpmsg_internal.h
|
||||
@@ -47,6 +47,7 @@ struct rpmsg_device_ops {
|
||||
|
|
@ -2578,7 +2552,7 @@ index 3fc83cd50e98..244292540e58 100644
|
|||
int rpmsg_register_device(struct rpmsg_device *rpdev);
|
||||
diff --git a/drivers/rpmsg/rpmsg_tty.c b/drivers/rpmsg/rpmsg_tty.c
|
||||
new file mode 100644
|
||||
index 000000000000..b7bd1196630d
|
||||
index 000000000..b7bd11966
|
||||
--- /dev/null
|
||||
+++ b/drivers/rpmsg/rpmsg_tty.c
|
||||
@@ -0,0 +1,342 @@
|
||||
|
|
@ -2925,7 +2899,7 @@ index 000000000000..b7bd1196630d
|
|||
+MODULE_DESCRIPTION("virtio remote processor messaging tty driver");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
diff --git a/drivers/rpmsg/virtio_rpmsg_bus.c b/drivers/rpmsg/virtio_rpmsg_bus.c
|
||||
index 7d7ed4e5cce7..b8e60b34c258 100644
|
||||
index 7d7ed4e5c..b8e60b34c 100644
|
||||
--- a/drivers/rpmsg/virtio_rpmsg_bus.c
|
||||
+++ b/drivers/rpmsg/virtio_rpmsg_bus.c
|
||||
@@ -181,6 +181,7 @@ static int virtio_rpmsg_trysendto(struct rpmsg_endpoint *ept, void *data,
|
||||
|
|
@ -2962,7 +2936,7 @@ index 7d7ed4e5cce7..b8e60b34c258 100644
|
|||
{
|
||||
diff --git a/include/linux/mailbox/arm-smccc-mbox.h b/include/linux/mailbox/arm-smccc-mbox.h
|
||||
new file mode 100644
|
||||
index 000000000000..d35fb89a77f5
|
||||
index 000000000..d35fb89a7
|
||||
--- /dev/null
|
||||
+++ b/include/linux/mailbox/arm-smccc-mbox.h
|
||||
@@ -0,0 +1,20 @@
|
||||
|
|
@ -2987,7 +2961,7 @@ index 000000000000..d35fb89a77f5
|
|||
+
|
||||
+#endif /* _LINUX_ARM_SMCCC_MBOX_H_ */
|
||||
diff --git a/include/linux/rpmsg.h b/include/linux/rpmsg.h
|
||||
index 9fe156d1c018..2af7674035aa 100644
|
||||
index 9fe156d1c..2af767403 100644
|
||||
--- a/include/linux/rpmsg.h
|
||||
+++ b/include/linux/rpmsg.h
|
||||
@@ -135,6 +135,7 @@ int rpmsg_trysend_offchannel(struct rpmsg_endpoint *ept, u32 src, u32 dst,
|
||||
|
|
@ -3015,10 +2989,10 @@ index 9fe156d1c018..2af7674035aa 100644
|
|||
/* use a macro to avoid include chaining to get THIS_MODULE */
|
||||
diff --git a/include/linux/tee_remoteproc.h b/include/linux/tee_remoteproc.h
|
||||
new file mode 100644
|
||||
index 000000000000..5d2d6ae492d0
|
||||
index 000000000..5ba0b6116
|
||||
--- /dev/null
|
||||
+++ b/include/linux/tee_remoteproc.h
|
||||
@@ -0,0 +1,106 @@
|
||||
@@ -0,0 +1,101 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
+/*
|
||||
+ * Copyright(c) 2020 STMicroelectronics 2020
|
||||
|
|
@ -3051,8 +3025,7 @@ index 000000000000..5d2d6ae492d0
|
|||
+
|
||||
+#if IS_ENABLED(CONFIG_TEE_REMOTEPROC)
|
||||
+
|
||||
+struct tee_rproc *tee_rproc_register(struct device *dev, struct rproc *rproc,
|
||||
+ unsigned int fw_id);
|
||||
+struct tee_rproc *tee_rproc_register(struct device *dev, unsigned int fw_id);
|
||||
+int tee_rproc_unregister(struct tee_rproc *trproc);
|
||||
+
|
||||
+int tee_rproc_load_fw(struct tee_rproc *trproc, const struct firmware *fw);
|
||||
|
|
@ -3064,13 +3037,9 @@ index 000000000000..5d2d6ae492d0
|
|||
+#else
|
||||
+
|
||||
+static inline struct tee_rproc *tee_rproc_register(struct device *dev,
|
||||
+ struct rproc *rproc,
|
||||
+ unsigned int fw_id)
|
||||
+{
|
||||
+ /* This shouldn't be possible */
|
||||
+ WARN_ON(1);
|
||||
+
|
||||
+ return NULL;
|
||||
+ return ERR_PTR(-ENODEV);
|
||||
+}
|
||||
+
|
||||
+static inline int tee_rproc_unregister(struct tee_rproc *trproc)
|
||||
|
|
@ -1,13 +1,11 @@
|
|||
From 88453f29216e4dc473683b0fa9fe5e3e7ae0bff2 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:11:20 +0100
|
||||
Subject: [PATCH 10/22] ARM 5.10.10-stm32mp1-r1 MEDIA-SOC-THERMAL
|
||||
From 75eede33771d5a5da7fcccae80f2b2682b4897b3 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:46 +0200
|
||||
Subject: [PATCH 10/23] ARM 5.10.61-stm32mp1-r2 MEDIA-SOC-THERMAL
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
drivers/media/cec/platform/Makefile | 1 +
|
||||
drivers/media/i2c/ov5640.c | 111 +++++++---
|
||||
drivers/media/platform/stm32/stm32-dcmi.c | 122 +++++++++--
|
||||
drivers/media/platform/stm32/stm32-dcmi.c | 173 +++++++++++++---
|
||||
drivers/media/v4l2-core/v4l2-fwnode.c | 3 +
|
||||
drivers/soc/Kconfig | 1 +
|
||||
drivers/soc/Makefile | 1 +
|
||||
|
|
@ -18,26 +16,15 @@ Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
|||
drivers/thermal/st/stm_thermal.c | 30 +--
|
||||
include/dt-bindings/soc/stm32-hdp.h | 108 ++++++++++
|
||||
include/media/v4l2-fwnode.h | 2 +
|
||||
13 files changed, 784 insertions(+), 68 deletions(-)
|
||||
12 files changed, 824 insertions(+), 78 deletions(-)
|
||||
create mode 100644 drivers/soc/st/Kconfig
|
||||
create mode 100644 drivers/soc/st/Makefile
|
||||
create mode 100644 drivers/soc/st/stm32_hdp.c
|
||||
create mode 100644 drivers/soc/st/stm32_pm_domain.c
|
||||
create mode 100644 include/dt-bindings/soc/stm32-hdp.h
|
||||
|
||||
diff --git a/drivers/media/cec/platform/Makefile b/drivers/media/cec/platform/Makefile
|
||||
index 3a947159b25a..ea6f8ee8161c 100644
|
||||
--- a/drivers/media/cec/platform/Makefile
|
||||
+++ b/drivers/media/cec/platform/Makefile
|
||||
@@ -10,5 +10,6 @@ obj-$(CONFIG_CEC_MESON_AO) += meson/
|
||||
obj-$(CONFIG_CEC_SAMSUNG_S5P) += s5p/
|
||||
obj-$(CONFIG_CEC_SECO) += seco/
|
||||
obj-$(CONFIG_CEC_STI) += sti/
|
||||
+obj-$(CONFIG_CEC_STM32) += stm32/
|
||||
obj-$(CONFIG_CEC_TEGRA) += tegra/
|
||||
|
||||
diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
|
||||
index 8f0812e85901..d7d36ad863ea 100644
|
||||
index 8f0812e85..d7d36ad86 100644
|
||||
--- a/drivers/media/i2c/ov5640.c
|
||||
+++ b/drivers/media/i2c/ov5640.c
|
||||
@@ -65,6 +65,7 @@
|
||||
|
|
@ -338,7 +325,7 @@ index 8f0812e85901..d7d36ad863ea 100644
|
|||
ret = hdl->error;
|
||||
goto free_ctrls;
|
||||
diff --git a/drivers/media/platform/stm32/stm32-dcmi.c b/drivers/media/platform/stm32/stm32-dcmi.c
|
||||
index fd1c41cba52f..60ef8a65f16c 100644
|
||||
index fd1c41cba..af7fe3e37 100644
|
||||
--- a/drivers/media/platform/stm32/stm32-dcmi.c
|
||||
+++ b/drivers/media/platform/stm32/stm32-dcmi.c
|
||||
@@ -95,6 +95,9 @@ enum state {
|
||||
|
|
@ -351,7 +338,16 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
#define TIMEOUT_MS 1000
|
||||
|
||||
#define OVERRUN_ERROR_THRESHOLD 3
|
||||
@@ -157,6 +160,7 @@ struct stm32_dcmi {
|
||||
@@ -120,7 +123,7 @@ struct dcmi_framesize {
|
||||
struct dcmi_buf {
|
||||
struct vb2_v4l2_buffer vb;
|
||||
bool prepared;
|
||||
- dma_addr_t paddr;
|
||||
+ struct sg_table sgt;
|
||||
size_t size;
|
||||
struct list_head list;
|
||||
};
|
||||
@@ -157,11 +160,13 @@ struct stm32_dcmi {
|
||||
struct vb2_queue queue;
|
||||
|
||||
struct v4l2_fwnode_bus_parallel bus;
|
||||
|
|
@ -359,7 +355,13 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
struct completion complete;
|
||||
struct clk *mclk;
|
||||
enum state state;
|
||||
@@ -324,7 +328,7 @@ static int dcmi_start_dma(struct stm32_dcmi *dcmi,
|
||||
struct dma_chan *dma_chan;
|
||||
dma_cookie_t dma_cookie;
|
||||
+ u32 dma_max_burst;
|
||||
u32 misr;
|
||||
int errors_count;
|
||||
int overrun_count;
|
||||
@@ -324,20 +329,19 @@ static int dcmi_start_dma(struct stm32_dcmi *dcmi,
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -368,6 +370,22 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
* dmaengine_prep_slave_single() and dmaengine_submit()
|
||||
* by locking the whole DMA submission sequence
|
||||
*/
|
||||
mutex_lock(&dcmi->dma_lock);
|
||||
|
||||
/* Prepare a DMA transaction */
|
||||
- desc = dmaengine_prep_slave_single(dcmi->dma_chan, buf->paddr,
|
||||
- buf->size,
|
||||
+ desc = dmaengine_prep_slave_sg(dcmi->dma_chan, buf->sgt.sgl,
|
||||
+ buf->sgt.nents,
|
||||
DMA_DEV_TO_MEM,
|
||||
DMA_PREP_INTERRUPT);
|
||||
if (!desc) {
|
||||
- dev_err(dcmi->dev, "%s: DMA dmaengine_prep_slave_single failed for buffer phy=%pad size=%zu\n",
|
||||
- __func__, &buf->paddr, buf->size);
|
||||
+ dev_err(dcmi->dev, "%s: DMA dmaengine_prep_slave_sg failed\n", __func__);
|
||||
mutex_unlock(&dcmi->dma_lock);
|
||||
return -EINVAL;
|
||||
}
|
||||
@@ -438,7 +442,7 @@ static void dcmi_process_jpeg(struct stm32_dcmi *dcmi)
|
||||
}
|
||||
|
||||
|
|
@ -377,7 +395,59 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
|
||||
/* Restart capture */
|
||||
if (dcmi_restart_capture(dcmi))
|
||||
@@ -777,6 +781,23 @@ static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
|
||||
@@ -529,6 +533,10 @@ static int dcmi_buf_prepare(struct vb2_buffer *vb)
|
||||
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
||||
struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
|
||||
unsigned long size;
|
||||
+ unsigned int num_sgs;
|
||||
+ dma_addr_t dma_buf;
|
||||
+ struct scatterlist *sg;
|
||||
+ int i, ret;
|
||||
|
||||
size = dcmi->fmt.fmt.pix.sizeimage;
|
||||
|
||||
@@ -542,15 +550,35 @@ static int dcmi_buf_prepare(struct vb2_buffer *vb)
|
||||
|
||||
if (!buf->prepared) {
|
||||
/* Get memory addresses */
|
||||
- buf->paddr =
|
||||
- vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
|
||||
buf->size = vb2_plane_size(&buf->vb.vb2_buf, 0);
|
||||
- buf->prepared = true;
|
||||
+ if (buf->size <= dcmi->dma_max_burst)
|
||||
+ num_sgs = 1;
|
||||
+ else
|
||||
+ num_sgs = DIV_ROUND_UP(buf->size, dcmi->dma_max_burst);
|
||||
+
|
||||
+ ret = sg_alloc_table(&buf->sgt, num_sgs, GFP_ATOMIC);
|
||||
+ if (ret) {
|
||||
+ dev_err(dcmi->dev, "sg table alloc failed\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
|
||||
- vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
|
||||
+ dma_buf = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
|
||||
|
||||
dev_dbg(dcmi->dev, "buffer[%d] phy=%pad size=%zu\n",
|
||||
- vb->index, &buf->paddr, buf->size);
|
||||
+ vb->index, &dma_buf, buf->size);
|
||||
+
|
||||
+ for_each_sg(buf->sgt.sgl, sg, num_sgs, i) {
|
||||
+ size_t bytes = min_t(size_t, size, dcmi->dma_max_burst);
|
||||
+
|
||||
+ sg_dma_address(sg) = dma_buf;
|
||||
+ sg_dma_len(sg) = bytes;
|
||||
+ dma_buf += bytes;
|
||||
+ size -= bytes;
|
||||
+ }
|
||||
+
|
||||
+ buf->prepared = true;
|
||||
+
|
||||
+ vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
|
||||
}
|
||||
|
||||
return 0;
|
||||
@@ -777,6 +805,23 @@ static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
|
||||
if (dcmi->bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
|
||||
val |= CR_PCKPOL;
|
||||
|
||||
|
|
@ -401,7 +471,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
reg_write(dcmi->regs, DCMI_CR, val);
|
||||
|
||||
/* Set crop */
|
||||
@@ -784,8 +805,31 @@ static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
|
||||
@@ -784,8 +829,31 @@ static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
|
||||
dcmi_set_crop(dcmi);
|
||||
|
||||
/* Enable jpeg capture */
|
||||
|
|
@ -435,7 +505,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
|
||||
/* Enable dcmi */
|
||||
reg_set(dcmi->regs, DCMI_CR, CR_ENABLE);
|
||||
@@ -882,7 +926,7 @@ static void dcmi_stop_streaming(struct vb2_queue *vq)
|
||||
@@ -882,7 +950,7 @@ static void dcmi_stop_streaming(struct vb2_queue *vq)
|
||||
|
||||
/* Stop all pending DMA operations */
|
||||
mutex_lock(&dcmi->dma_lock);
|
||||
|
|
@ -444,7 +514,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
mutex_unlock(&dcmi->dma_lock);
|
||||
|
||||
pm_runtime_put(dcmi->dev);
|
||||
@@ -1067,8 +1111,9 @@ static int dcmi_set_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f)
|
||||
@@ -1067,8 +1135,9 @@ static int dcmi_set_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
@ -456,7 +526,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
dcmi->do_crop = false;
|
||||
|
||||
/* pix to mbus format */
|
||||
@@ -1574,6 +1619,22 @@ static const struct dcmi_format dcmi_formats[] = {
|
||||
@@ -1574,6 +1643,22 @@ static const struct dcmi_format dcmi_formats[] = {
|
||||
.fourcc = V4L2_PIX_FMT_JPEG,
|
||||
.mbus_code = MEDIA_BUS_FMT_JPEG_1X8,
|
||||
.bpp = 1,
|
||||
|
|
@ -479,7 +549,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
},
|
||||
};
|
||||
|
||||
@@ -1592,6 +1653,11 @@ static int dcmi_formats_init(struct stm32_dcmi *dcmi)
|
||||
@@ -1592,6 +1677,11 @@ static int dcmi_formats_init(struct stm32_dcmi *dcmi)
|
||||
if (dcmi_formats[i].mbus_code != mbus_code.code)
|
||||
continue;
|
||||
|
||||
|
|
@ -491,7 +561,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
/* Code supported, have we got this fourcc yet? */
|
||||
for (j = 0; j < num_fmts; j++)
|
||||
if (sd_fmts[j]->fourcc ==
|
||||
@@ -1745,6 +1811,15 @@ static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
|
||||
@@ -1745,6 +1835,15 @@ static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
|
||||
|
||||
dev_dbg(dcmi->dev, "Subdev \"%s\" bound\n", subdev->name);
|
||||
|
||||
|
|
@ -507,7 +577,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
/*
|
||||
* Link this sub-device to DCMI, it could be
|
||||
* a parallel camera sensor or a bridge
|
||||
@@ -1757,10 +1832,11 @@ static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
|
||||
@@ -1757,10 +1856,11 @@ static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
|
||||
&dcmi->vdev->entity, 0,
|
||||
MEDIA_LNK_FL_IMMUTABLE |
|
||||
MEDIA_LNK_FL_ENABLED);
|
||||
|
|
@ -521,7 +591,15 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
dev_dbg(dcmi->dev, "DCMI is now linked to \"%s\"\n",
|
||||
subdev->name);
|
||||
|
||||
@@ -1851,7 +1927,9 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
@@ -1835,6 +1935,7 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
struct stm32_dcmi *dcmi;
|
||||
struct vb2_queue *q;
|
||||
struct dma_chan *chan;
|
||||
+ struct dma_slave_caps caps;
|
||||
struct clk *mclk;
|
||||
int irq;
|
||||
int ret = 0;
|
||||
@@ -1851,7 +1952,9 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
|
||||
dcmi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
|
||||
if (IS_ERR(dcmi->rstc)) {
|
||||
|
|
@ -532,7 +610,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
return PTR_ERR(dcmi->rstc);
|
||||
}
|
||||
|
||||
@@ -1873,9 +1951,18 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
@@ -1873,9 +1976,18 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
dev_err(&pdev->dev, "CSI bus not supported\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
@ -551,7 +629,20 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq <= 0)
|
||||
@@ -1972,15 +2059,6 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
@@ -1917,6 +2029,12 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
+ dcmi->dma_max_burst = UINT_MAX;
|
||||
+ ret = dma_get_slave_caps(chan, &caps);
|
||||
+ if (!ret && caps.max_sg_burst)
|
||||
+ dcmi->dma_max_burst = caps.max_sg_burst *
|
||||
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
|
||||
+
|
||||
spin_lock_init(&dcmi->irqlock);
|
||||
mutex_init(&dcmi->lock);
|
||||
mutex_init(&dcmi->dma_lock);
|
||||
@@ -1972,15 +2090,6 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
}
|
||||
dcmi->vdev->entity.flags |= MEDIA_ENT_FL_DEFAULT;
|
||||
|
||||
|
|
@ -567,7 +658,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
/* Buffer queue */
|
||||
q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
|
||||
q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
|
||||
@@ -2001,7 +2079,7 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
@@ -2001,7 +2110,7 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
|
||||
ret = dcmi_graph_init(dcmi);
|
||||
if (ret < 0)
|
||||
|
|
@ -576,7 +667,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
|
||||
/* Reset device */
|
||||
ret = reset_control_assert(dcmi->rstc);
|
||||
@@ -2027,7 +2105,10 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
@@ -2027,7 +2136,10 @@ static int dcmi_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
|
||||
err_cleanup:
|
||||
|
|
@ -587,7 +678,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
err_media_entity_cleanup:
|
||||
media_entity_cleanup(&dcmi->vdev->entity);
|
||||
err_device_release:
|
||||
@@ -2049,6 +2130,7 @@ static int dcmi_remove(struct platform_device *pdev)
|
||||
@@ -2049,6 +2161,7 @@ static int dcmi_remove(struct platform_device *pdev)
|
||||
|
||||
v4l2_async_notifier_unregister(&dcmi->notifier);
|
||||
v4l2_async_notifier_cleanup(&dcmi->notifier);
|
||||
|
|
@ -596,7 +687,7 @@ index fd1c41cba52f..60ef8a65f16c 100644
|
|||
v4l2_device_unregister(&dcmi->v4l2_dev);
|
||||
media_device_cleanup(&dcmi->mdev);
|
||||
diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c
|
||||
index dfc53d11053f..7d0e2f5d1700 100644
|
||||
index dfc53d110..7d0e2f5d1 100644
|
||||
--- a/drivers/media/v4l2-core/v4l2-fwnode.c
|
||||
+++ b/drivers/media/v4l2-core/v4l2-fwnode.c
|
||||
@@ -356,6 +356,9 @@ v4l2_fwnode_endpoint_parse_parallel_bus(struct fwnode_handle *fwnode,
|
||||
|
|
@ -610,7 +701,7 @@ index dfc53d11053f..7d0e2f5d1700 100644
|
|||
default:
|
||||
bus->flags = flags;
|
||||
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
|
||||
index 425ab6f7e375..30afdfbfd9cc 100644
|
||||
index 425ab6f7e..30afdfbfd 100644
|
||||
--- a/drivers/soc/Kconfig
|
||||
+++ b/drivers/soc/Kconfig
|
||||
@@ -15,6 +15,7 @@ source "drivers/soc/renesas/Kconfig"
|
||||
|
|
@ -622,7 +713,7 @@ index 425ab6f7e375..30afdfbfd9cc 100644
|
|||
source "drivers/soc/tegra/Kconfig"
|
||||
source "drivers/soc/ti/Kconfig"
|
||||
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
|
||||
index 36452bed86ef..6b957db9a9bb 100644
|
||||
index 36452bed8..6b957db9a 100644
|
||||
--- a/drivers/soc/Makefile
|
||||
+++ b/drivers/soc/Makefile
|
||||
@@ -21,6 +21,7 @@ obj-y += renesas/
|
||||
|
|
@ -635,7 +726,7 @@ index 36452bed86ef..6b957db9a9bb 100644
|
|||
obj-y += ti/
|
||||
diff --git a/drivers/soc/st/Kconfig b/drivers/soc/st/Kconfig
|
||||
new file mode 100644
|
||||
index 000000000000..8ab604999db4
|
||||
index 000000000..8ab604999
|
||||
--- /dev/null
|
||||
+++ b/drivers/soc/st/Kconfig
|
||||
@@ -0,0 +1,17 @@
|
||||
|
|
@ -658,7 +749,7 @@ index 000000000000..8ab604999db4
|
|||
+endif # ARCH_STM32
|
||||
diff --git a/drivers/soc/st/Makefile b/drivers/soc/st/Makefile
|
||||
new file mode 100644
|
||||
index 000000000000..85905b7688ed
|
||||
index 000000000..85905b768
|
||||
--- /dev/null
|
||||
+++ b/drivers/soc/st/Makefile
|
||||
@@ -0,0 +1,2 @@
|
||||
|
|
@ -666,7 +757,7 @@ index 000000000000..85905b7688ed
|
|||
+obj-$(CONFIG_STM32_HDP) += stm32_hdp.o
|
||||
diff --git a/drivers/soc/st/stm32_hdp.c b/drivers/soc/st/stm32_hdp.c
|
||||
new file mode 100644
|
||||
index 000000000000..47687ebd1ffd
|
||||
index 000000000..47687ebd1
|
||||
--- /dev/null
|
||||
+++ b/drivers/soc/st/stm32_hdp.c
|
||||
@@ -0,0 +1,242 @@
|
||||
|
|
@ -914,7 +1005,7 @@ index 000000000000..47687ebd1ffd
|
|||
+module_platform_driver(hdp_driver);
|
||||
diff --git a/drivers/soc/st/stm32_pm_domain.c b/drivers/soc/st/stm32_pm_domain.c
|
||||
new file mode 100644
|
||||
index 000000000000..0386624c20f2
|
||||
index 000000000..0386624c2
|
||||
--- /dev/null
|
||||
+++ b/drivers/soc/st/stm32_pm_domain.c
|
||||
@@ -0,0 +1,212 @@
|
||||
|
|
@ -1131,7 +1222,7 @@ index 000000000000..0386624c20f2
|
|||
+}
|
||||
+core_initcall(stm32_pm_domains_init);
|
||||
diff --git a/drivers/thermal/st/stm_thermal.c b/drivers/thermal/st/stm_thermal.c
|
||||
index 5fd3fb8912a6..1e065a3323f9 100644
|
||||
index 5fd3fb891..1e065a332 100644
|
||||
--- a/drivers/thermal/st/stm_thermal.c
|
||||
+++ b/drivers/thermal/st/stm_thermal.c
|
||||
@@ -82,8 +82,7 @@
|
||||
|
|
@ -1215,7 +1306,7 @@ index 5fd3fb8912a6..1e065a3323f9 100644
|
|||
|
||||
diff --git a/include/dt-bindings/soc/stm32-hdp.h b/include/dt-bindings/soc/stm32-hdp.h
|
||||
new file mode 100644
|
||||
index 000000000000..d98665327281
|
||||
index 000000000..d98665327
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/soc/stm32-hdp.h
|
||||
@@ -0,0 +1,108 @@
|
||||
|
|
@ -1328,7 +1419,7 @@ index 000000000000..d98665327281
|
|||
+
|
||||
+#endif /* _DT_BINDINGS_STM32_HDP_H */
|
||||
diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h
|
||||
index ed0840f3d5df..598822e23e9e 100644
|
||||
index ed0840f3d..598822e23 100644
|
||||
--- a/include/media/v4l2-fwnode.h
|
||||
+++ b/include/media/v4l2-fwnode.h
|
||||
@@ -49,11 +49,13 @@ struct v4l2_fwnode_bus_mipi_csi2 {
|
||||
|
|
@ -1,9 +1,8 @@
|
|||
From 55dcc42c73d9d2c733972cd89bbbbb6d75b7d942 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:12:12 +0100
|
||||
Subject: [PATCH 11/22] ARM 5.10.10-stm32mp1-r1 MFD
|
||||
From a8b88220ea06e256ca6268be9856a8bbe522b0b5 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:47 +0200
|
||||
Subject: [PATCH 11/23] ARM 5.10.61-stm32mp1-r2 MFD
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
drivers/mfd/Kconfig | 10 +
|
||||
drivers/mfd/Makefile | 1 +
|
||||
|
|
@ -16,10 +15,10 @@ Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
|||
create mode 100644 drivers/mfd/stm32-pwr.c
|
||||
|
||||
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
|
||||
index 4789507f325b..2917b4466f74 100644
|
||||
index b8847ae04..16449cfc8 100644
|
||||
--- a/drivers/mfd/Kconfig
|
||||
+++ b/drivers/mfd/Kconfig
|
||||
@@ -2052,6 +2052,16 @@ config MFD_STPMIC1
|
||||
@@ -2053,6 +2053,16 @@ config MFD_STPMIC1
|
||||
To compile this driver as a module, choose M here: the
|
||||
module will be called stpmic1.
|
||||
|
||||
|
|
@ -37,7 +36,7 @@ index 4789507f325b..2917b4466f74 100644
|
|||
tristate "Support for STMicroelectronics Multi-Function eXpander (STMFX)"
|
||||
depends on I2C
|
||||
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
|
||||
index 1780019d2474..90ffa501ae2d 100644
|
||||
index 1780019d2..90ffa501a 100644
|
||||
--- a/drivers/mfd/Makefile
|
||||
+++ b/drivers/mfd/Makefile
|
||||
@@ -255,6 +255,7 @@ obj-$(CONFIG_MFD_SUN4I_GPADC) += sun4i-gpadc.o
|
||||
|
|
@ -50,7 +49,7 @@ index 1780019d2474..90ffa501ae2d 100644
|
|||
obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
|
||||
diff --git a/drivers/mfd/stm32-pwr.c b/drivers/mfd/stm32-pwr.c
|
||||
new file mode 100644
|
||||
index 000000000000..5c130603d554
|
||||
index 000000000..5c130603d
|
||||
--- /dev/null
|
||||
+++ b/drivers/mfd/stm32-pwr.c
|
||||
@@ -0,0 +1,402 @@
|
||||
|
|
@ -457,7 +456,7 @@ index 000000000000..5c130603d554
|
|||
+arch_initcall(stm32_pwr_init);
|
||||
+module_exit(stm32_pwr_exit);
|
||||
diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c
|
||||
index 988e2ba6dd0f..39b2fc952b7d 100644
|
||||
index 988e2ba6d..39b2fc952 100644
|
||||
--- a/drivers/mfd/stmfx.c
|
||||
+++ b/drivers/mfd/stmfx.c
|
||||
@@ -81,13 +81,11 @@ static struct mfd_cell stmfx_cells[] = {
|
||||
|
|
@ -475,7 +474,7 @@ index 988e2ba6dd0f..39b2fc952b7d 100644
|
|||
.resources = stmfx_ts_resources,
|
||||
.num_resources = ARRAY_SIZE(stmfx_ts_resources),
|
||||
diff --git a/drivers/mfd/stpmic1.c b/drivers/mfd/stpmic1.c
|
||||
index eb3da558c3fb..40eef5d18b90 100644
|
||||
index eb3da558c..40eef5d18 100644
|
||||
--- a/drivers/mfd/stpmic1.c
|
||||
+++ b/drivers/mfd/stpmic1.c
|
||||
@@ -170,6 +170,9 @@ static int stpmic1_suspend(struct device *dev)
|
||||
|
|
@ -499,7 +498,7 @@ index eb3da558c3fb..40eef5d18b90 100644
|
|||
|
||||
return 0;
|
||||
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c
|
||||
index 3b2b93c5bbcb..507572b091ab 100644
|
||||
index 3b2b93c5b..507572b09 100644
|
||||
--- a/drivers/mfd/wm8994-core.c
|
||||
+++ b/drivers/mfd/wm8994-core.c
|
||||
@@ -185,6 +185,12 @@ static int wm8994_resume(struct device *dev)
|
||||
|
|
@ -516,7 +515,7 @@ index 3b2b93c5bbcb..507572b091ab 100644
|
|||
wm8994->supplies);
|
||||
if (ret != 0) {
|
||||
diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h
|
||||
index f8db83aedb2b..f48f04dc4187 100644
|
||||
index f8db83aed..f48f04dc4 100644
|
||||
--- a/include/linux/mfd/stm32-timers.h
|
||||
+++ b/include/linux/mfd/stm32-timers.h
|
||||
@@ -31,6 +31,7 @@
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
From b1ce5fb5a80db8945c9496f8ad9a74280d31ecf8 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:47 +0200
|
||||
Subject: [PATCH 12/23] ARM 5.10.61-stm32mp1-r2 MMC
|
||||
|
||||
---
|
||||
drivers/mmc/core/mmc_test.c | 2 +-
|
||||
drivers/mmc/host/mmci.c | 3 ---
|
||||
2 files changed, 1 insertion(+), 4 deletions(-)
|
||||
|
||||
diff --git a/drivers/mmc/core/mmc_test.c b/drivers/mmc/core/mmc_test.c
|
||||
index 152e7525e..b1f0d04f9 100644
|
||||
--- a/drivers/mmc/core/mmc_test.c
|
||||
+++ b/drivers/mmc/core/mmc_test.c
|
||||
@@ -2124,7 +2124,7 @@ static int mmc_test_rw_multiple(struct mmc_test_card *test,
|
||||
if (mmc_can_erase(test->card) &&
|
||||
tdata->prepare & MMC_TEST_PREP_ERASE) {
|
||||
ret = mmc_erase(test->card, dev_addr,
|
||||
- size / 512, MMC_SECURE_ERASE_ARG);
|
||||
+ size / 512, test->card->erase_arg);
|
||||
if (ret)
|
||||
ret = mmc_erase(test->card, dev_addr,
|
||||
size / 512, MMC_ERASE_ARG);
|
||||
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
|
||||
index 9bde0def1..fa6d85190 100644
|
||||
--- a/drivers/mmc/host/mmci.c
|
||||
+++ b/drivers/mmc/host/mmci.c
|
||||
@@ -2104,9 +2104,6 @@ static int mmci_probe(struct amba_device *dev,
|
||||
host->stop_abort.arg = 0;
|
||||
host->stop_abort.flags = MMC_RSP_R1B | MMC_CMD_AC;
|
||||
|
||||
- /* We support these PM capabilities. */
|
||||
- mmc->pm_caps |= MMC_PM_KEEP_POWER;
|
||||
-
|
||||
/*
|
||||
* We can do SGIO
|
||||
*/
|
||||
--
|
||||
2.17.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,20 +1,20 @@
|
|||
From f9e34d8836c280d291e1779bf50f895f55a1e8fc Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:16:53 +0100
|
||||
Subject: [PATCH 14/22] ARM 5.10.10-stm32mp1-r1 PERF
|
||||
From 000853359feed98e3d2f08d2fc1cc94e8e51fa2d Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:48 +0200
|
||||
Subject: [PATCH 14/23] ARM 5.10.61-stm32mp1-r2 PERF
|
||||
|
||||
---
|
||||
Documentation/admin-guide/perf/index.rst | 1 +
|
||||
.../admin-guide/perf/stm32-ddr-pmu.rst | 44 ++
|
||||
drivers/perf/Kconfig | 7 +
|
||||
drivers/perf/Makefile | 1 +
|
||||
drivers/perf/stm32_ddr_pmu.c | 428 ++++++++++++++++++
|
||||
5 files changed, 481 insertions(+)
|
||||
drivers/perf/stm32_ddr_pmu.c | 429 ++++++++++++++++++
|
||||
5 files changed, 482 insertions(+)
|
||||
create mode 100644 Documentation/admin-guide/perf/stm32-ddr-pmu.rst
|
||||
create mode 100644 drivers/perf/stm32_ddr_pmu.c
|
||||
|
||||
diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst
|
||||
index 5a8f2529a033..9f68f68be161 100644
|
||||
index 5a8f2529a..9f68f68be 100644
|
||||
--- a/Documentation/admin-guide/perf/index.rst
|
||||
+++ b/Documentation/admin-guide/perf/index.rst
|
||||
@@ -11,6 +11,7 @@ Performance monitor support
|
||||
|
|
@ -27,7 +27,7 @@ index 5a8f2529a033..9f68f68be161 100644
|
|||
xgene-pmu
|
||||
diff --git a/Documentation/admin-guide/perf/stm32-ddr-pmu.rst b/Documentation/admin-guide/perf/stm32-ddr-pmu.rst
|
||||
new file mode 100644
|
||||
index 000000000000..db647fc1acad
|
||||
index 000000000..db647fc1a
|
||||
--- /dev/null
|
||||
+++ b/Documentation/admin-guide/perf/stm32-ddr-pmu.rst
|
||||
@@ -0,0 +1,44 @@
|
||||
|
|
@ -76,7 +76,7 @@ index 000000000000..db647fc1acad
|
|||
+ 20.021068551 seconds time elapsed
|
||||
+
|
||||
diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig
|
||||
index 130327ff0b0e..a62a26fc516a 100644
|
||||
index 130327ff0..a62a26fc5 100644
|
||||
--- a/drivers/perf/Kconfig
|
||||
+++ b/drivers/perf/Kconfig
|
||||
@@ -106,6 +106,13 @@ config QCOM_L3_PMU
|
||||
|
|
@ -94,7 +94,7 @@ index 130327ff0b0e..a62a26fc516a 100644
|
|||
tristate "Cavium ThunderX2 SoC PMU UNCORE"
|
||||
depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA
|
||||
diff --git a/drivers/perf/Makefile b/drivers/perf/Makefile
|
||||
index 5365fd56f88f..7f2b7c5f9216 100644
|
||||
index 5365fd56f..7f2b7c5f9 100644
|
||||
--- a/drivers/perf/Makefile
|
||||
+++ b/drivers/perf/Makefile
|
||||
@@ -10,6 +10,7 @@ obj-$(CONFIG_FSL_IMX8_DDR_PMU) += fsl_imx8_ddr_perf.o
|
||||
|
|
@ -107,10 +107,10 @@ index 5365fd56f88f..7f2b7c5f9216 100644
|
|||
obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o
|
||||
diff --git a/drivers/perf/stm32_ddr_pmu.c b/drivers/perf/stm32_ddr_pmu.c
|
||||
new file mode 100644
|
||||
index 000000000000..ee7a33083e02
|
||||
index 000000000..a6a2c5479
|
||||
--- /dev/null
|
||||
+++ b/drivers/perf/stm32_ddr_pmu.c
|
||||
@@ -0,0 +1,428 @@
|
||||
@@ -0,0 +1,429 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * This file is the STM32 DDR performance monitor (DDRPERFM) driver
|
||||
|
|
@ -524,6 +524,7 @@ index 000000000000..ee7a33083e02
|
|||
+ { .compatible = "st,stm32-ddr-pmu" },
|
||||
+ { },
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, stm32_ddr_pmu_of_match);
|
||||
+
|
||||
+static struct platform_driver stm32_ddr_pmu_driver = {
|
||||
+ .driver = {
|
||||
|
|
@ -1,27 +1,25 @@
|
|||
From 731c37c7d36e13cac98e1c872657c03613fc5259 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:14:10 +0100
|
||||
Subject: [PATCH 15/22] ARM 5.10.10-stm32mp1-r1 PHY-USB
|
||||
From a936dc53617e4f56a85fc96fb7dd4567261a160d Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:49 +0200
|
||||
Subject: [PATCH 15/23] ARM 5.10.61-stm32mp1-r2 PHY-USB
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
drivers/phy/st/phy-stm32-usbphyc.c | 499 +++++++++++++++++++++++++----
|
||||
drivers/phy/st/phy-stm32-usbphyc.c | 509 +++++++++++++++++++++++++----
|
||||
drivers/usb/core/hcd.c | 9 +-
|
||||
drivers/usb/core/phy.c | 22 +-
|
||||
drivers/usb/core/phy.h | 6 +-
|
||||
drivers/usb/dwc2/core.c | 123 ++++---
|
||||
drivers/usb/dwc2/core.h | 4 +
|
||||
drivers/usb/dwc2/drd.c | 21 +-
|
||||
drivers/usb/dwc2/gadget.c | 5 +-
|
||||
drivers/usb/dwc2/hcd.c | 6 +-
|
||||
drivers/usb/dwc2/params.c | 8 +
|
||||
drivers/usb/dwc2/core.h | 14 +
|
||||
drivers/usb/dwc2/drd.c | 37 ++-
|
||||
drivers/usb/dwc2/gadget.c | 6 +-
|
||||
drivers/usb/dwc2/hcd.c | 7 +-
|
||||
drivers/usb/dwc2/params.c | 24 ++
|
||||
drivers/usb/dwc2/platform.c | 47 ++-
|
||||
drivers/usb/host/ehci-platform.c | 16 +-
|
||||
drivers/usb/typec/stusb160x.c | 11 +-
|
||||
13 files changed, 615 insertions(+), 162 deletions(-)
|
||||
12 files changed, 662 insertions(+), 158 deletions(-)
|
||||
|
||||
diff --git a/drivers/phy/st/phy-stm32-usbphyc.c b/drivers/phy/st/phy-stm32-usbphyc.c
|
||||
index 2b3639cba51a..5f169d5c669e 100644
|
||||
index 2b3639cba..f21160659 100644
|
||||
--- a/drivers/phy/st/phy-stm32-usbphyc.c
|
||||
+++ b/drivers/phy/st/phy-stm32-usbphyc.c
|
||||
@@ -7,8 +7,9 @@
|
||||
|
|
@ -147,7 +145,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
#define PLL_FVCO_MHZ 2880
|
||||
#define PLL_INFF_MIN_RATE_HZ 19200000
|
||||
#define PLL_INFF_MAX_RATE_HZ 38400000
|
||||
@@ -58,7 +135,7 @@ struct pll_params {
|
||||
@@ -58,9 +135,10 @@ struct pll_params {
|
||||
struct stm32_usbphyc_phy {
|
||||
struct phy *phy;
|
||||
struct stm32_usbphyc *usbphyc;
|
||||
|
|
@ -155,8 +153,11 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
+ struct regulator *vbus;
|
||||
u32 index;
|
||||
bool active;
|
||||
+ u32 tune;
|
||||
};
|
||||
@@ -70,6 +147,10 @@ struct stm32_usbphyc {
|
||||
|
||||
struct stm32_usbphyc {
|
||||
@@ -70,6 +148,10 @@ struct stm32_usbphyc {
|
||||
struct reset_control *rst;
|
||||
struct stm32_usbphyc_phy **phys;
|
||||
int nphys;
|
||||
|
|
@ -167,7 +168,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
int switch_setup;
|
||||
};
|
||||
|
||||
@@ -83,6 +164,41 @@ static inline void stm32_usbphyc_clr_bits(void __iomem *reg, u32 bits)
|
||||
@@ -83,6 +165,41 @@ static inline void stm32_usbphyc_clr_bits(void __iomem *reg, u32 bits)
|
||||
writel_relaxed(readl_relaxed(reg) & ~bits, reg);
|
||||
}
|
||||
|
||||
|
|
@ -209,7 +210,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
static void stm32_usbphyc_get_pll_params(u32 clk_rate,
|
||||
struct pll_params *pll_params)
|
||||
{
|
||||
@@ -142,83 +258,106 @@ static int stm32_usbphyc_pll_init(struct stm32_usbphyc *usbphyc)
|
||||
@@ -142,83 +259,106 @@ static int stm32_usbphyc_pll_init(struct stm32_usbphyc *usbphyc)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -294,28 +295,28 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
-
|
||||
return 0;
|
||||
-}
|
||||
|
||||
-
|
||||
-static int stm32_usbphyc_pll_disable(struct stm32_usbphyc *usbphyc)
|
||||
-{
|
||||
- void __iomem *pll_reg = usbphyc->base + STM32_USBPHYC_PLL;
|
||||
+reg_disable:
|
||||
+ stm32_usbphyc_regulators_disable(usbphyc);
|
||||
|
||||
-
|
||||
- /* Check if other phy port active */
|
||||
- if (stm32_usbphyc_has_one_phy_active(usbphyc))
|
||||
- return 0;
|
||||
+dec_n_pll_cons:
|
||||
+ atomic_dec(&usbphyc->n_pll_cons);
|
||||
|
||||
- stm32_usbphyc_clr_bits(pll_reg, PLLEN);
|
||||
- /* Wait for minimum width of powerdown pulse (ENABLE = Low) */
|
||||
- udelay(PLL_PWR_DOWN_TIME_US);
|
||||
-
|
||||
+reg_disable:
|
||||
+ stm32_usbphyc_regulators_disable(usbphyc);
|
||||
|
||||
- if (readl_relaxed(pll_reg) & PLLEN) {
|
||||
- dev_err(usbphyc->dev, "PLL not reset\n");
|
||||
- return -EIO;
|
||||
- }
|
||||
-
|
||||
+dec_n_pll_cons:
|
||||
+ atomic_dec(&usbphyc->n_pll_cons);
|
||||
|
||||
- return 0;
|
||||
+ return ret;
|
||||
}
|
||||
|
|
@ -354,7 +355,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
}
|
||||
|
||||
static int stm32_usbphyc_phy_exit(struct phy *phy)
|
||||
@@ -235,14 +374,20 @@ static int stm32_usbphyc_phy_power_on(struct phy *phy)
|
||||
@@ -235,14 +375,20 @@ static int stm32_usbphyc_phy_power_on(struct phy *phy)
|
||||
{
|
||||
struct stm32_usbphyc_phy *usbphyc_phy = phy_get_drvdata(phy);
|
||||
|
||||
|
|
@ -377,7 +378,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
}
|
||||
|
||||
static const struct phy_ops stm32_usbphyc_phy_ops = {
|
||||
@@ -253,6 +398,162 @@ static const struct phy_ops stm32_usbphyc_phy_ops = {
|
||||
@@ -253,6 +399,163 @@ static const struct phy_ops stm32_usbphyc_phy_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
|
|
@ -443,9 +444,10 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
+static void stm32_usbphyc_phy_tuning(struct stm32_usbphyc *usbphyc,
|
||||
+ struct device_node *np, u32 index)
|
||||
+{
|
||||
+ struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys[index];
|
||||
+ struct device_node *tune_np;
|
||||
+ u32 reg = STM32_USBPHYC_TUNE(index);
|
||||
+ u32 otpcomp, val, tune = 0;
|
||||
+ u32 otpcomp, val;
|
||||
+ int ret;
|
||||
+
|
||||
+ tune_np = of_parse_phandle(np, "st,phy-tuning", 0);
|
||||
|
|
@ -458,25 +460,25 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
+ ret = of_property_read_u32(tune_np, "st,current-boost", &val);
|
||||
+ if (!ret && val < BOOST_MAX) {
|
||||
+ val = (val == BOOST_2_MA) ? 1 : 0;
|
||||
+ tune |= INCURREN | FIELD_PREP(INCURRINT, val);
|
||||
+ usbphyc_phy->tune |= INCURREN | FIELD_PREP(INCURRINT, val);
|
||||
+ } else if (ret != -EINVAL) {
|
||||
+ dev_warn(usbphyc->dev,
|
||||
+ "phy%d: invalid st,current-boost value\n", index);
|
||||
+ }
|
||||
+
|
||||
+ if (!of_property_read_bool(tune_np, "st,no-lsfs-fb-cap"))
|
||||
+ tune |= LFSCAPEN;
|
||||
+ usbphyc_phy->tune |= LFSCAPEN;
|
||||
+
|
||||
+ if (of_property_read_bool(tune_np, "st,hs-slew-ctrl"))
|
||||
+ tune |= HSDRVSLEW;
|
||||
+ usbphyc_phy->tune |= HSDRVSLEW;
|
||||
+
|
||||
+ ret = of_property_read_u32(tune_np, "st,hs-dc-level", &val);
|
||||
+ if (!ret && val < DC_MAX) {
|
||||
+ if (val == DC_MINUS_5_TO_7_MV) {
|
||||
+ tune |= HSDRVDCCUR;
|
||||
+ usbphyc_phy->tune |= HSDRVDCCUR;
|
||||
+ } else {
|
||||
+ val = (val == DC_PLUS_10_TO_14_MV) ? 1 : 0;
|
||||
+ tune |= HSDRVCURINCR | FIELD_PREP(HSDRVDCLEV, val);
|
||||
+ usbphyc_phy->tune |= HSDRVCURINCR | FIELD_PREP(HSDRVDCLEV, val);
|
||||
+ }
|
||||
+ } else if (ret != -EINVAL) {
|
||||
+ dev_warn(usbphyc->dev,
|
||||
|
|
@ -484,63 +486,63 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
+ }
|
||||
+
|
||||
+ if (of_property_read_bool(tune_np, "st,fs-rftime-tuning"))
|
||||
+ tune |= FSDRVRFADJ;
|
||||
+ usbphyc_phy->tune |= FSDRVRFADJ;
|
||||
+
|
||||
+ if (of_property_read_bool(tune_np, "st,hs-rftime-reduction"))
|
||||
+ tune |= HSDRVRFRED;
|
||||
+ usbphyc_phy->tune |= HSDRVRFRED;
|
||||
+
|
||||
+ ret = of_property_read_u32(tune_np, "st,hs-current-trim", &val);
|
||||
+ if (!ret && val < CUR_MAX)
|
||||
+ tune |= FIELD_PREP(HSDRVCHKITRM, val);
|
||||
+ usbphyc_phy->tune |= FIELD_PREP(HSDRVCHKITRM, val);
|
||||
+ else if (ret != -EINVAL)
|
||||
+ dev_warn(usbphyc->dev,
|
||||
+ "phy%d: invalid st,hs-current-trim value\n", index);
|
||||
+
|
||||
+ ret = of_property_read_u32(tune_np, "st,hs-impedance-trim", &val);
|
||||
+ if (!ret && val < IMP_MAX)
|
||||
+ tune |= FIELD_PREP(HSDRVCHKZTRM, val);
|
||||
+ usbphyc_phy->tune |= FIELD_PREP(HSDRVCHKZTRM, val);
|
||||
+ else if (ret != -EINVAL)
|
||||
+ dev_warn(usbphyc->dev,
|
||||
+ "phy%d: invalid hs-impedance-trim value\n", index);
|
||||
+
|
||||
+ ret = of_property_read_u32(tune_np, "st,squelch-level", &val);
|
||||
+ if (!ret && val < SQLCH_MAX)
|
||||
+ tune |= FIELD_PREP(SQLCHCTL, val);
|
||||
+ usbphyc_phy->tune |= FIELD_PREP(SQLCHCTL, val);
|
||||
+ else if (ret != -EINVAL)
|
||||
+ dev_warn(usbphyc->dev,
|
||||
+ "phy%d: invalid st,squelch-level value\n", index);
|
||||
+
|
||||
+ if (of_property_read_bool(tune_np, "st,hs-rx-gain-eq"))
|
||||
+ tune |= HDRXGNEQEN;
|
||||
+ usbphyc_phy->tune |= HDRXGNEQEN;
|
||||
+
|
||||
+ ret = of_property_read_u32(tune_np, "st,hs-rx-offset", &val);
|
||||
+ if (!ret && val < RX_OFFSET_MAX)
|
||||
+ tune |= FIELD_PREP(HSRXOFF, val);
|
||||
+ usbphyc_phy->tune |= FIELD_PREP(HSRXOFF, val);
|
||||
+ else if (ret != -EINVAL)
|
||||
+ dev_warn(usbphyc->dev,
|
||||
+ "phy%d: invalid st,hs-rx-offset value\n", index);
|
||||
+
|
||||
+ if (of_property_read_bool(tune_np, "st,no-hs-ftime-ctrl"))
|
||||
+ tune |= HSFALLPREEM;
|
||||
+ usbphyc_phy->tune |= HSFALLPREEM;
|
||||
+
|
||||
+ if (!of_property_read_bool(tune_np, "st,no-lsfs-sc"))
|
||||
+ tune |= SHTCCTCTLPROT;
|
||||
+ usbphyc_phy->tune |= SHTCCTCTLPROT;
|
||||
+
|
||||
+ if (of_property_read_bool(tune_np, "st,hs-tx-staggering"))
|
||||
+ tune |= STAGSEL;
|
||||
+ usbphyc_phy->tune |= STAGSEL;
|
||||
+
|
||||
+ of_node_put(tune_np);
|
||||
+
|
||||
+ /* Restore OTP compensation code */
|
||||
+ tune |= FIELD_PREP(OTPCOMP, otpcomp);
|
||||
+ usbphyc_phy->tune |= FIELD_PREP(OTPCOMP, otpcomp);
|
||||
+
|
||||
+ writel_relaxed(tune, usbphyc->base + reg);
|
||||
+ writel_relaxed(usbphyc_phy->tune, usbphyc->base + reg);
|
||||
+}
|
||||
+
|
||||
static void stm32_usbphyc_switch_setup(struct stm32_usbphyc *usbphyc,
|
||||
u32 utmi_switch)
|
||||
{
|
||||
@@ -313,7 +614,7 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
@@ -313,7 +616,7 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
struct device_node *child, *np = dev->of_node;
|
||||
struct resource *res;
|
||||
struct phy_provider *phy_provider;
|
||||
|
|
@ -549,7 +551,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
int ret, port = 0;
|
||||
|
||||
usbphyc = devm_kzalloc(dev, sizeof(*usbphyc), GFP_KERNEL);
|
||||
@@ -328,11 +629,8 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
@@ -328,11 +631,8 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(usbphyc->base);
|
||||
|
||||
usbphyc->clk = devm_clk_get(dev, NULL);
|
||||
|
|
@ -563,7 +565,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
|
||||
ret = clk_prepare_enable(usbphyc->clk);
|
||||
if (ret) {
|
||||
@@ -345,6 +643,23 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
@@ -345,6 +645,23 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
reset_control_assert(usbphyc->rst);
|
||||
udelay(2);
|
||||
reset_control_deassert(usbphyc->rst);
|
||||
|
|
@ -587,7 +589,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
}
|
||||
|
||||
usbphyc->switch_setup = -EINVAL;
|
||||
@@ -356,11 +671,26 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
@@ -356,11 +673,26 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
goto clk_disable;
|
||||
}
|
||||
|
||||
|
|
@ -615,7 +617,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
|
||||
phy = devm_phy_create(dev, child, &stm32_usbphyc_phy_ops);
|
||||
if (IS_ERR(phy)) {
|
||||
@@ -378,24 +708,15 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
@@ -378,18 +710,6 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
goto put_child;
|
||||
}
|
||||
|
||||
|
|
@ -634,16 +636,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
ret = of_property_read_u32(child, "reg", &index);
|
||||
if (ret || index > usbphyc->nphys) {
|
||||
dev_err(&phy->dev, "invalid reg property: %d\n", ret);
|
||||
goto put_child;
|
||||
}
|
||||
|
||||
+ /* Configure phy tuning */
|
||||
+ stm32_usbphyc_phy_tuning(usbphyc, child, index);
|
||||
+
|
||||
usbphyc->phys[port] = usbphyc_phy;
|
||||
phy_set_bus_width(phy, 8);
|
||||
phy_set_drvdata(phy, usbphyc_phy);
|
||||
@@ -405,6 +726,14 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
@@ -405,6 +725,17 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
usbphyc->phys[port]->index = index;
|
||||
usbphyc->phys[port]->active = false;
|
||||
|
||||
|
|
@ -654,11 +647,14 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
+ goto put_child;
|
||||
+ usbphyc->phys[port]->vbus = NULL;
|
||||
+ }
|
||||
+
|
||||
+ /* Configure phy tuning */
|
||||
+ stm32_usbphyc_phy_tuning(usbphyc, child, index);
|
||||
+
|
||||
port++;
|
||||
}
|
||||
|
||||
@@ -416,6 +745,13 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
@@ -416,6 +747,13 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
goto clk_disable;
|
||||
}
|
||||
|
||||
|
|
@ -672,7 +668,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
version = readl_relaxed(usbphyc->base + STM32_USBPHYC_VERSION);
|
||||
dev_info(dev, "registered rev:%lu.%lu\n",
|
||||
FIELD_GET(MAJREV, version), FIELD_GET(MINREV, version));
|
||||
@@ -433,12 +769,34 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
@@ -433,12 +771,42 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
|
||||
static int stm32_usbphyc_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct stm32_usbphyc *usbphyc = dev_get_drvdata(&pdev->dev);
|
||||
|
|
@ -694,10 +690,18 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
+static int stm32_usbphyc_resume(struct device *dev)
|
||||
+{
|
||||
+ struct stm32_usbphyc *usbphyc = dev_get_drvdata(dev);
|
||||
+ struct stm32_usbphyc_phy *usbphyc_phy;
|
||||
+ int port;
|
||||
+
|
||||
+ if (usbphyc->switch_setup >= 0)
|
||||
+ stm32_usbphyc_switch_setup(usbphyc, usbphyc->switch_setup);
|
||||
+
|
||||
+ for (port = 0; port < usbphyc->nphys; port++) {
|
||||
+ usbphyc_phy = usbphyc->phys[port];
|
||||
+ if (usbphyc_phy->tune)
|
||||
+ writel_relaxed(usbphyc_phy->tune, usbphyc->base + STM32_USBPHYC_TUNE(port));
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+#endif
|
||||
|
|
@ -707,7 +711,7 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
static const struct of_device_id stm32_usbphyc_of_match[] = {
|
||||
{ .compatible = "st,stm32mp1-usbphyc", },
|
||||
{ },
|
||||
@@ -451,6 +809,7 @@ static struct platform_driver stm32_usbphyc_driver = {
|
||||
@@ -451,6 +819,7 @@ static struct platform_driver stm32_usbphyc_driver = {
|
||||
.driver = {
|
||||
.of_match_table = stm32_usbphyc_of_match,
|
||||
.name = "stm32-usbphyc",
|
||||
|
|
@ -716,10 +720,10 @@ index 2b3639cba51a..5f169d5c669e 100644
|
|||
};
|
||||
module_platform_driver(stm32_usbphyc_driver);
|
||||
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
|
||||
index 2c6b9578a7d3..7765fb216128 100644
|
||||
index 99908d8d2..5290a47b4 100644
|
||||
--- a/drivers/usb/core/hcd.c
|
||||
+++ b/drivers/usb/core/hcd.c
|
||||
@@ -2131,7 +2131,8 @@ int hcd_bus_suspend(struct usb_device *rhdev, pm_message_t msg)
|
||||
@@ -2138,7 +2138,8 @@ int hcd_bus_suspend(struct usb_device *rhdev, pm_message_t msg)
|
||||
|
||||
if (!PMSG_IS_AUTO(msg))
|
||||
usb_phy_roothub_suspend(hcd->self.sysdev,
|
||||
|
|
@ -729,7 +733,7 @@ index 2c6b9578a7d3..7765fb216128 100644
|
|||
|
||||
/* Did we race with a root-hub wakeup event? */
|
||||
if (rhdev->do_remote_wakeup) {
|
||||
@@ -2172,7 +2173,8 @@ int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg)
|
||||
@@ -2179,7 +2180,8 @@ int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg)
|
||||
|
||||
if (!PMSG_IS_AUTO(msg)) {
|
||||
status = usb_phy_roothub_resume(hcd->self.sysdev,
|
||||
|
|
@ -739,7 +743,7 @@ index 2c6b9578a7d3..7765fb216128 100644
|
|||
if (status)
|
||||
return status;
|
||||
}
|
||||
@@ -2217,7 +2219,8 @@ int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg)
|
||||
@@ -2224,7 +2226,8 @@ int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg)
|
||||
}
|
||||
} else {
|
||||
hcd->state = old_state;
|
||||
|
|
@ -750,7 +754,7 @@ index 2c6b9578a7d3..7765fb216128 100644
|
|||
"resume", status);
|
||||
if (status != -ESHUTDOWN)
|
||||
diff --git a/drivers/usb/core/phy.c b/drivers/usb/core/phy.c
|
||||
index fb1588e7c282..746615aa1b2d 100644
|
||||
index fb1588e7c..746615aa1 100644
|
||||
--- a/drivers/usb/core/phy.c
|
||||
+++ b/drivers/usb/core/phy.c
|
||||
@@ -212,34 +212,36 @@ void usb_phy_roothub_power_off(struct usb_phy_roothub *phy_roothub)
|
||||
|
|
@ -801,7 +805,7 @@ index fb1588e7c282..746615aa1b2d 100644
|
|||
|
||||
return err;
|
||||
diff --git a/drivers/usb/core/phy.h b/drivers/usb/core/phy.h
|
||||
index 20a267cd986b..3df4ddbb6046 100644
|
||||
index 20a267cd9..3df4ddbb6 100644
|
||||
--- a/drivers/usb/core/phy.h
|
||||
+++ b/drivers/usb/core/phy.h
|
||||
@@ -23,8 +23,10 @@ int usb_phy_roothub_power_on(struct usb_phy_roothub *phy_roothub);
|
||||
|
|
@ -818,7 +822,7 @@ index 20a267cd986b..3df4ddbb6046 100644
|
|||
|
||||
#endif /* __USB_CORE_PHY_H_ */
|
||||
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
|
||||
index fec17a2d2447..6f9236d4dd38 100644
|
||||
index 15911ac75..997b14c05 100644
|
||||
--- a/drivers/usb/dwc2/core.c
|
||||
+++ b/drivers/usb/dwc2/core.c
|
||||
@@ -83,6 +83,7 @@ int dwc2_backup_global_registers(struct dwc2_hsotg *hsotg)
|
||||
|
|
@ -1006,10 +1010,28 @@ index fec17a2d2447..6f9236d4dd38 100644
|
|||
|
||||
/**
|
||||
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
|
||||
index 7161344c6522..80bd2900e20a 100644
|
||||
index 641e4251c..21d1fc490 100644
|
||||
--- a/drivers/usb/dwc2/core.h
|
||||
+++ b/drivers/usb/dwc2/core.h
|
||||
@@ -685,6 +685,7 @@ struct dwc2_hw_params {
|
||||
@@ -240,6 +240,9 @@ enum dwc2_ep0_state {
|
||||
* 1 - SRP Only capable
|
||||
* 2 - No HNP/SRP capable (always available)
|
||||
* Defaults to best available option (0, 1, then 2)
|
||||
+ * @otg_rev: The OTG revision number the device is compliant with,
|
||||
+ * in binary-coded decimal (i.e. 2.0 is 0200H).
|
||||
+ * (see struct usb_otg_caps)
|
||||
* @host_dma: Specifies whether to use slave or DMA mode for accessing
|
||||
* the data FIFOs. The driver will automatically detect the
|
||||
* value for this parameter if none is specified.
|
||||
@@ -452,6 +455,7 @@ struct dwc2_core_params {
|
||||
#define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE 1
|
||||
#define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE 2
|
||||
|
||||
+ u16 otg_rev;
|
||||
u8 phy_type;
|
||||
#define DWC2_PHY_TYPE_PARAM_FS 0
|
||||
#define DWC2_PHY_TYPE_PARAM_UTMI 1
|
||||
@@ -687,6 +691,7 @@ struct dwc2_hw_params {
|
||||
* @grxfsiz: Backup of GRXFSIZ register
|
||||
* @gnptxfsiz: Backup of GNPTXFSIZ register
|
||||
* @gi2cctl: Backup of GI2CCTL register
|
||||
|
|
@ -1017,7 +1039,7 @@ index 7161344c6522..80bd2900e20a 100644
|
|||
* @glpmcfg: Backup of GLPMCFG register
|
||||
* @gdfifocfg: Backup of GDFIFOCFG register
|
||||
* @pcgcctl: Backup of PCGCCTL register
|
||||
@@ -701,6 +702,7 @@ struct dwc2_gregs_backup {
|
||||
@@ -703,6 +708,7 @@ struct dwc2_gregs_backup {
|
||||
u32 grxfsiz;
|
||||
u32 gnptxfsiz;
|
||||
u32 gi2cctl;
|
||||
|
|
@ -1025,7 +1047,41 @@ index 7161344c6522..80bd2900e20a 100644
|
|||
u32 glpmcfg;
|
||||
u32 pcgcctl;
|
||||
u32 pcgcctl1;
|
||||
@@ -1329,6 +1331,8 @@ void dwc2_disable_global_interrupts(struct dwc2_hsotg *hcd);
|
||||
@@ -863,6 +869,8 @@ struct dwc2_hregs_backup {
|
||||
* - USB_DR_MODE_HOST
|
||||
* - USB_DR_MODE_OTG
|
||||
* @role_sw: usb_role_switch handle
|
||||
+ * @role_sw_default_mode: default operation mode of controller while usb role
|
||||
+ * is USB_ROLE_NONE
|
||||
* @hcd_enabled: Host mode sub-driver initialization indicator.
|
||||
* @gadget_enabled: Peripheral mode sub-driver initialization indicator.
|
||||
* @ll_hw_enabled: Status of low-level hardware resources.
|
||||
@@ -1046,6 +1054,8 @@ struct dwc2_hregs_backup {
|
||||
* @new_connection: Used in host mode. True if there are new connected
|
||||
* device
|
||||
* @enabled: Indicates the enabling state of controller
|
||||
+ * @dw_otg_caps: OTG caps from the platform parameters, used to setup the
|
||||
+ * gadget structure.
|
||||
*
|
||||
*/
|
||||
struct dwc2_hsotg {
|
||||
@@ -1058,6 +1068,7 @@ struct dwc2_hsotg {
|
||||
enum usb_otg_state op_state;
|
||||
enum usb_dr_mode dr_mode;
|
||||
struct usb_role_switch *role_sw;
|
||||
+ enum usb_dr_mode role_sw_default_mode;
|
||||
unsigned int hcd_enabled:1;
|
||||
unsigned int gadget_enabled:1;
|
||||
unsigned int ll_hw_enabled:1;
|
||||
@@ -1211,6 +1222,7 @@ struct dwc2_hsotg {
|
||||
unsigned int remote_wakeup_allowed:1;
|
||||
struct dwc2_hsotg_ep *eps_in[MAX_EPS_CHANNELS];
|
||||
struct dwc2_hsotg_ep *eps_out[MAX_EPS_CHANNELS];
|
||||
+ struct usb_otg_caps dw_otg_caps;
|
||||
#endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
|
||||
};
|
||||
|
||||
@@ -1331,6 +1343,8 @@ void dwc2_disable_global_interrupts(struct dwc2_hsotg *hcd);
|
||||
|
||||
void dwc2_hib_restore_common(struct dwc2_hsotg *hsotg, int rem_wakeup,
|
||||
int is_host);
|
||||
|
|
@ -1035,7 +1091,7 @@ index 7161344c6522..80bd2900e20a 100644
|
|||
int dwc2_restore_global_registers(struct dwc2_hsotg *hsotg);
|
||||
|
||||
diff --git a/drivers/usb/dwc2/drd.c b/drivers/usb/dwc2/drd.c
|
||||
index 2d4176f5788e..27202eb05bde 100644
|
||||
index 2d4176f57..9e78d98da 100644
|
||||
--- a/drivers/usb/dwc2/drd.c
|
||||
+++ b/drivers/usb/dwc2/drd.c
|
||||
@@ -7,6 +7,7 @@
|
||||
|
|
@ -1046,8 +1102,14 @@ index 2d4176f5788e..27202eb05bde 100644
|
|||
#include <linux/iopoll.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/usb/role.h>
|
||||
@@ -25,9 +26,9 @@ static void dwc2_ovr_init(struct dwc2_hsotg *hsotg)
|
||||
@@ -23,11 +24,15 @@ static void dwc2_ovr_init(struct dwc2_hsotg *hsotg)
|
||||
gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN | GOTGCTL_VBVALOEN;
|
||||
gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS;
|
||||
gotgctl &= ~(GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL);
|
||||
+ if (hsotg->role_sw_default_mode == USB_DR_MODE_HOST)
|
||||
+ gotgctl |= GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL;
|
||||
+ else if (hsotg->role_sw_default_mode == USB_DR_MODE_PERIPHERAL)
|
||||
+ gotgctl |= GOTGCTL_BVALOVAL | GOTGCTL_VBVALOVAL;
|
||||
dwc2_writel(hsotg, gotgctl, GOTGCTL);
|
||||
|
||||
- dwc2_force_mode(hsotg, false);
|
||||
|
|
@ -1058,7 +1120,23 @@ index 2d4176f5788e..27202eb05bde 100644
|
|||
}
|
||||
|
||||
static int dwc2_ovr_avalid(struct dwc2_hsotg *hsotg, bool valid)
|
||||
@@ -86,6 +87,19 @@ static int dwc2_drd_role_sw_set(struct usb_role_switch *sw, enum usb_role role)
|
||||
@@ -39,6 +44,7 @@ static int dwc2_ovr_avalid(struct dwc2_hsotg *hsotg, bool valid)
|
||||
(!valid && !(gotgctl & GOTGCTL_ASESVLD)))
|
||||
return -EALREADY;
|
||||
|
||||
+ gotgctl &= ~GOTGCTL_BVALOVAL;
|
||||
if (valid)
|
||||
gotgctl |= GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL;
|
||||
else
|
||||
@@ -57,6 +63,7 @@ static int dwc2_ovr_bvalid(struct dwc2_hsotg *hsotg, bool valid)
|
||||
(!valid && !(gotgctl & GOTGCTL_BSESVLD)))
|
||||
return -EALREADY;
|
||||
|
||||
+ gotgctl &= ~GOTGCTL_AVALOVAL;
|
||||
if (valid)
|
||||
gotgctl |= GOTGCTL_BVALOVAL | GOTGCTL_VBVALOVAL;
|
||||
else
|
||||
@@ -86,6 +93,19 @@ static int dwc2_drd_role_sw_set(struct usb_role_switch *sw, enum usb_role role)
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -1078,7 +1156,7 @@ index 2d4176f5788e..27202eb05bde 100644
|
|||
spin_lock_irqsave(&hsotg->lock, flags);
|
||||
|
||||
if (role == USB_ROLE_HOST) {
|
||||
@@ -110,6 +124,9 @@ static int dwc2_drd_role_sw_set(struct usb_role_switch *sw, enum usb_role role)
|
||||
@@ -110,6 +130,9 @@ static int dwc2_drd_role_sw_set(struct usb_role_switch *sw, enum usb_role role)
|
||||
/* This will raise a Connector ID Status Change Interrupt */
|
||||
dwc2_force_mode(hsotg, role == USB_ROLE_HOST);
|
||||
|
||||
|
|
@ -1088,11 +1166,33 @@ index 2d4176f5788e..27202eb05bde 100644
|
|||
dev_dbg(hsotg->dev, "%s-session valid\n",
|
||||
role == USB_ROLE_NONE ? "No" :
|
||||
role == USB_ROLE_HOST ? "A" : "B");
|
||||
@@ -121,11 +144,21 @@ int dwc2_drd_init(struct dwc2_hsotg *hsotg)
|
||||
{
|
||||
struct usb_role_switch_desc role_sw_desc = {0};
|
||||
struct usb_role_switch *role_sw;
|
||||
+ const char *str;
|
||||
int ret;
|
||||
|
||||
if (!device_property_read_bool(hsotg->dev, "usb-role-switch"))
|
||||
return 0;
|
||||
|
||||
+ hsotg->role_sw_default_mode = USB_DR_MODE_UNKNOWN;
|
||||
+ ret = device_property_read_string(hsotg->dev, "role-switch-default-mode", &str);
|
||||
+ if (!ret) {
|
||||
+ if (!strncmp(str, "host", strlen("host")))
|
||||
+ hsotg->role_sw_default_mode = USB_DR_MODE_HOST;
|
||||
+ else if (!strncmp(str, "peripheral", strlen("peripheral")))
|
||||
+ hsotg->role_sw_default_mode = USB_DR_MODE_PERIPHERAL;
|
||||
+ }
|
||||
+
|
||||
role_sw_desc.driver_data = hsotg;
|
||||
role_sw_desc.fwnode = dev_fwnode(hsotg->dev);
|
||||
role_sw_desc.set = dwc2_drd_role_sw_set;
|
||||
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
|
||||
index 0a0d11151cfb..780187454251 100644
|
||||
index b06286f13..9f6baef56 100644
|
||||
--- a/drivers/usb/dwc2/gadget.c
|
||||
+++ b/drivers/usb/dwc2/gadget.c
|
||||
@@ -3565,7 +3565,8 @@ void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg)
|
||||
@@ -3562,7 +3562,8 @@ void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg)
|
||||
void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg)
|
||||
{
|
||||
/* remove the soft-disconnect and let's go */
|
||||
|
|
@ -1102,7 +1202,15 @@ index 0a0d11151cfb..780187454251 100644
|
|||
}
|
||||
|
||||
/**
|
||||
@@ -4982,7 +4983,7 @@ int dwc2_hsotg_suspend(struct dwc2_hsotg *hsotg)
|
||||
@@ -4892,6 +4893,7 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg)
|
||||
hsotg->gadget.max_speed = USB_SPEED_HIGH;
|
||||
hsotg->gadget.ops = &dwc2_hsotg_gadget_ops;
|
||||
hsotg->gadget.name = dev_name(dev);
|
||||
+ hsotg->gadget.otg_caps = &hsotg->dw_otg_caps;
|
||||
hsotg->remote_wakeup_allowed = 0;
|
||||
|
||||
if (hsotg->params.lpm)
|
||||
@@ -5000,7 +5002,7 @@ int dwc2_hsotg_suspend(struct dwc2_hsotg *hsotg)
|
||||
hsotg->gadget.speed = USB_SPEED_UNKNOWN;
|
||||
spin_unlock_irqrestore(&hsotg->lock, flags);
|
||||
|
||||
|
|
@ -1112,10 +1220,10 @@ index 0a0d11151cfb..780187454251 100644
|
|||
dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep);
|
||||
if (hsotg->eps_out[ep])
|
||||
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
|
||||
index e9ac215b9663..a953f7b2e3a3 100644
|
||||
index 6af1dcbc3..71d5ca1a7 100644
|
||||
--- a/drivers/usb/dwc2/hcd.c
|
||||
+++ b/drivers/usb/dwc2/hcd.c
|
||||
@@ -1735,7 +1735,8 @@ static void dwc2_hcd_cleanup_channels(struct dwc2_hsotg *hsotg)
|
||||
@@ -1736,7 +1736,8 @@ static void dwc2_hcd_cleanup_channels(struct dwc2_hsotg *hsotg)
|
||||
* release_channel_ddma(), which is called from ep_disable when
|
||||
* device disconnects
|
||||
*/
|
||||
|
|
@ -1125,7 +1233,7 @@ index e9ac215b9663..a953f7b2e3a3 100644
|
|||
}
|
||||
/* All channels have been freed, mark them available */
|
||||
if (hsotg->params.uframe_sched) {
|
||||
@@ -3611,7 +3612,8 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
|
||||
@@ -3612,7 +3613,8 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
|
||||
if (wvalue != USB_PORT_FEAT_TEST && (!windex || windex > 1))
|
||||
goto error;
|
||||
|
||||
|
|
@ -1135,11 +1243,35 @@ index e9ac215b9663..a953f7b2e3a3 100644
|
|||
/*
|
||||
* The port is disconnected, which means the core is
|
||||
* either in device mode or it soon will be. Just
|
||||
@@ -3698,6 +3700,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
|
||||
hprt0 &= ~HPRT0_TSTCTL_MASK;
|
||||
hprt0 |= (windex >> 8) << HPRT0_TSTCTL_SHIFT;
|
||||
dwc2_writel(hsotg, hprt0, HPRT0);
|
||||
+ hsotg->test_mode = windex >> 8;
|
||||
break;
|
||||
|
||||
default:
|
||||
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
|
||||
index 267543c3dc38..92df3d620f7d 100644
|
||||
index 267543c3d..49a677ba6 100644
|
||||
--- a/drivers/usb/dwc2/params.c
|
||||
+++ b/drivers/usb/dwc2/params.c
|
||||
@@ -177,7 +177,10 @@ static void dwc2_set_stm32mp15_fsotg_params(struct dwc2_hsotg *hsotg)
|
||||
@@ -36,6 +36,7 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of_device.h>
|
||||
+#include <linux/usb/of.h>
|
||||
|
||||
#include "core.h"
|
||||
|
||||
@@ -168,6 +169,7 @@ static void dwc2_set_stm32mp15_fsotg_params(struct dwc2_hsotg *hsotg)
|
||||
struct dwc2_core_params *p = &hsotg->params;
|
||||
|
||||
p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
|
||||
+ p->otg_rev = 0x200;
|
||||
p->speed = DWC2_SPEED_PARAM_FULL;
|
||||
p->host_rx_fifo_size = 128;
|
||||
p->host_nperio_tx_fifo_size = 96;
|
||||
@@ -177,7 +179,10 @@ static void dwc2_set_stm32mp15_fsotg_params(struct dwc2_hsotg *hsotg)
|
||||
p->i2c_enable = false;
|
||||
p->activate_stm_fs_transceiver = true;
|
||||
p->activate_stm_id_vb_detection = true;
|
||||
|
|
@ -1150,7 +1282,12 @@ index 267543c3dc38..92df3d620f7d 100644
|
|||
}
|
||||
|
||||
static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg)
|
||||
@@ -189,7 +192,12 @@ static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg)
|
||||
@@ -185,11 +190,17 @@ static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg)
|
||||
struct dwc2_core_params *p = &hsotg->params;
|
||||
|
||||
p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
|
||||
+ p->otg_rev = 0x200;
|
||||
p->activate_stm_id_vb_detection = !device_property_read_bool(hsotg->dev, "usb-role-switch");
|
||||
p->host_rx_fifo_size = 440;
|
||||
p->host_nperio_tx_fifo_size = 256;
|
||||
p->host_perio_tx_fifo_size = 256;
|
||||
|
|
@ -1163,8 +1300,61 @@ index 267543c3dc38..92df3d620f7d 100644
|
|||
}
|
||||
|
||||
const struct of_device_id dwc2_of_match_table[] = {
|
||||
@@ -231,18 +242,25 @@ static void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg)
|
||||
switch (hsotg->hw_params.op_mode) {
|
||||
case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
|
||||
val = DWC2_CAP_PARAM_HNP_SRP_CAPABLE;
|
||||
+ hsotg->dw_otg_caps.hnp_support = true;
|
||||
+ hsotg->dw_otg_caps.srp_support = true;
|
||||
break;
|
||||
case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
|
||||
case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
|
||||
case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
|
||||
val = DWC2_CAP_PARAM_SRP_ONLY_CAPABLE;
|
||||
+ hsotg->dw_otg_caps.hnp_support = false;
|
||||
+ hsotg->dw_otg_caps.srp_support = true;
|
||||
break;
|
||||
default:
|
||||
val = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
|
||||
+ hsotg->dw_otg_caps.hnp_support = false;
|
||||
+ hsotg->dw_otg_caps.srp_support = false;
|
||||
break;
|
||||
}
|
||||
|
||||
hsotg->params.otg_cap = val;
|
||||
+ hsotg->dw_otg_caps.otg_rev = hsotg->params.otg_rev;
|
||||
}
|
||||
|
||||
static void dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg)
|
||||
@@ -450,6 +468,9 @@ static void dwc2_get_device_properties(struct dwc2_hsotg *hsotg)
|
||||
}
|
||||
}
|
||||
|
||||
+ if (hsotg->dr_mode == USB_DR_MODE_OTG)
|
||||
+ of_usb_update_otg_caps(hsotg->dev->of_node, &hsotg->dw_otg_caps);
|
||||
+
|
||||
if (of_find_property(hsotg->dev->of_node, "disable-over-current", NULL))
|
||||
p->oc_disable = true;
|
||||
}
|
||||
@@ -469,6 +490,7 @@ static void dwc2_check_param_otg_cap(struct dwc2_hsotg *hsotg)
|
||||
case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
|
||||
case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
|
||||
case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
|
||||
+ hsotg->dw_otg_caps.hnp_support = false;
|
||||
break;
|
||||
default:
|
||||
valid = 0;
|
||||
@@ -477,6 +499,8 @@ static void dwc2_check_param_otg_cap(struct dwc2_hsotg *hsotg)
|
||||
break;
|
||||
case DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE:
|
||||
/* always valid */
|
||||
+ hsotg->dw_otg_caps.hnp_support = false;
|
||||
+ hsotg->dw_otg_caps.srp_support = false;
|
||||
break;
|
||||
default:
|
||||
valid = 0;
|
||||
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
|
||||
index 5f18acac7406..f0964babf260 100644
|
||||
index 5f18acac7..f0964babf 100644
|
||||
--- a/drivers/usb/dwc2/platform.c
|
||||
+++ b/drivers/usb/dwc2/platform.c
|
||||
@@ -224,8 +224,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
|
||||
|
|
@ -1271,7 +1461,7 @@ index 5f18acac7406..f0964babf260 100644
|
|||
dwc2_drd_resume(dwc2);
|
||||
|
||||
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
|
||||
index a48dd3fac153..5017913ce6cb 100644
|
||||
index a48dd3fac..5017913ce 100644
|
||||
--- a/drivers/usb/host/ehci-platform.c
|
||||
+++ b/drivers/usb/host/ehci-platform.c
|
||||
@@ -35,6 +35,7 @@
|
||||
|
|
@ -1332,42 +1522,6 @@ index a48dd3fac153..5017913ce6cb 100644
|
|||
if (pdata->power_on) {
|
||||
int err = pdata->power_on(pdev);
|
||||
if (err < 0)
|
||||
diff --git a/drivers/usb/typec/stusb160x.c b/drivers/usb/typec/stusb160x.c
|
||||
index d21750bbbb44..a7b51bf4af18 100644
|
||||
--- a/drivers/usb/typec/stusb160x.c
|
||||
+++ b/drivers/usb/typec/stusb160x.c
|
||||
@@ -739,10 +739,6 @@ static int stusb160x_probe(struct i2c_client *client)
|
||||
typec_set_pwr_opmode(chip->port, chip->pwr_opmode);
|
||||
|
||||
if (client->irq) {
|
||||
- ret = stusb160x_irq_init(chip, client->irq);
|
||||
- if (ret)
|
||||
- goto port_unregister;
|
||||
-
|
||||
chip->role_sw = fwnode_usb_role_switch_get(fwnode);
|
||||
if (IS_ERR(chip->role_sw)) {
|
||||
ret = PTR_ERR(chip->role_sw);
|
||||
@@ -752,6 +748,10 @@ static int stusb160x_probe(struct i2c_client *client)
|
||||
ret);
|
||||
goto port_unregister;
|
||||
}
|
||||
+
|
||||
+ ret = stusb160x_irq_init(chip, client->irq);
|
||||
+ if (ret)
|
||||
+ goto role_sw_put;
|
||||
} else {
|
||||
/*
|
||||
* If Source or Dual power role, need to enable VDD supply
|
||||
@@ -775,6 +775,9 @@ static int stusb160x_probe(struct i2c_client *client)
|
||||
|
||||
return 0;
|
||||
|
||||
+role_sw_put:
|
||||
+ if (chip->role_sw)
|
||||
+ usb_role_switch_put(chip->role_sw);
|
||||
port_unregister:
|
||||
typec_unregister_port(chip->port);
|
||||
all_reg_disable:
|
||||
--
|
||||
2.17.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,27 +1,26 @@
|
|||
From c40d4d83b3de542be7d64b88f0c842ebecc9a6b2 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:09:52 +0100
|
||||
Subject: [PATCH 17/22] ARM 5.10.10-stm32mp1-r1 RESET-RTC-WATCHDOG
|
||||
From 32651dddd362b90d443aa3e6f15b699d0e1ad26c Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:50 +0200
|
||||
Subject: [PATCH 17/23] ARM 5.10.61-stm32mp1-r2 RESET-RTC-WATCHDOG
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
drivers/reset/Kconfig | 6 -
|
||||
drivers/reset/Makefile | 1 -
|
||||
drivers/reset/reset-stm32mp1.c | 115 -------------
|
||||
drivers/reset/reset-stm32mp1.c | 115 -----------
|
||||
drivers/rtc/Kconfig | 1 +
|
||||
drivers/rtc/rtc-stm32.c | 180 ++++++++++++++++----
|
||||
drivers/rtc/rtc-stm32.c | 214 +++++++++++++++-----
|
||||
drivers/watchdog/stm32_iwdg.c | 13 +-
|
||||
include/dt-bindings/reset/stm32mp1-resets.h | 15 ++
|
||||
include/dt-bindings/rtc/rtc-stm32.h | 13 ++
|
||||
8 files changed, 183 insertions(+), 161 deletions(-)
|
||||
8 files changed, 202 insertions(+), 176 deletions(-)
|
||||
delete mode 100644 drivers/reset/reset-stm32mp1.c
|
||||
create mode 100644 include/dt-bindings/rtc/rtc-stm32.h
|
||||
|
||||
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
|
||||
index 07d162b179fc..c3186d80c33e 100644
|
||||
index 147543ad3..6c1409b38 100644
|
||||
--- a/drivers/reset/Kconfig
|
||||
+++ b/drivers/reset/Kconfig
|
||||
@@ -180,12 +180,6 @@ config RESET_SIMPLE
|
||||
@@ -182,12 +182,6 @@ config RESET_SIMPLE
|
||||
- Allwinner SoCs
|
||||
- ZTE's zx2967 family
|
||||
|
||||
|
|
@ -35,7 +34,7 @@ index 07d162b179fc..c3186d80c33e 100644
|
|||
bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
|
||||
default ARCH_SOCFPGA
|
||||
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
|
||||
index 16947610cc3b..b2c9eff41d3b 100644
|
||||
index 16947610c..b2c9eff41 100644
|
||||
--- a/drivers/reset/Makefile
|
||||
+++ b/drivers/reset/Makefile
|
||||
@@ -24,7 +24,6 @@ obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o
|
||||
|
|
@ -48,7 +47,7 @@ index 16947610cc3b..b2c9eff41d3b 100644
|
|||
obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
|
||||
diff --git a/drivers/reset/reset-stm32mp1.c b/drivers/reset/reset-stm32mp1.c
|
||||
deleted file mode 100644
|
||||
index b221a28041fa..000000000000
|
||||
index b221a2804..000000000
|
||||
--- a/drivers/reset/reset-stm32mp1.c
|
||||
+++ /dev/null
|
||||
@@ -1,115 +0,0 @@
|
||||
|
|
@ -168,10 +167,10 @@ index b221a28041fa..000000000000
|
|||
-
|
||||
-builtin_platform_driver(stm32_reset_driver);
|
||||
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
|
||||
index 65ad9d0b47ab..f2a4d7c633c8 100644
|
||||
index 33e4ecd6c..65619e077 100644
|
||||
--- a/drivers/rtc/Kconfig
|
||||
+++ b/drivers/rtc/Kconfig
|
||||
@@ -1884,6 +1884,7 @@ config RTC_DRV_R7301
|
||||
@@ -1885,6 +1885,7 @@ config RTC_DRV_R7301
|
||||
config RTC_DRV_STM32
|
||||
tristate "STM32 RTC"
|
||||
select REGMAP_MMIO
|
||||
|
|
@ -180,7 +179,7 @@ index 65ad9d0b47ab..f2a4d7c633c8 100644
|
|||
help
|
||||
If you say yes here you get support for the STM32 On-Chip
|
||||
diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
|
||||
index d774aa18f57a..7fd6347691bb 100644
|
||||
index d096b58cd..ffab177ed 100644
|
||||
--- a/drivers/rtc/rtc-stm32.c
|
||||
+++ b/drivers/rtc/rtc-stm32.c
|
||||
@@ -6,6 +6,8 @@
|
||||
|
|
@ -333,7 +332,48 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
|
||||
{
|
||||
const struct stm32_rtc_registers *regs = &rtc->data->regs;
|
||||
@@ -547,7 +642,8 @@ static void stm32_rtc_clear_events(struct stm32_rtc *rtc,
|
||||
@@ -160,10 +255,9 @@ static int stm32_rtc_enter_init_mode(struct stm32_rtc *rtc)
|
||||
* slowest rtc_ck frequency may be 32kHz and highest should be
|
||||
* 1MHz, we poll every 10 us with a timeout of 100ms.
|
||||
*/
|
||||
- return readl_relaxed_poll_timeout_atomic(
|
||||
- rtc->base + regs->isr,
|
||||
- isr, (isr & STM32_RTC_ISR_INITF),
|
||||
- 10, 100000);
|
||||
+ return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr, isr,
|
||||
+ (isr & STM32_RTC_ISR_INITF),
|
||||
+ 10, 100000);
|
||||
}
|
||||
|
||||
return 0;
|
||||
@@ -448,16 +542,16 @@ static int stm32_rtc_valid_alrm(struct stm32_rtc *rtc, struct rtc_time *tm)
|
||||
* M-D-Y H:M:S < alarm <= (M+1)-D-Y H:M:S
|
||||
* with a specific case for December...
|
||||
*/
|
||||
- if ((((tm->tm_year > cur_year) &&
|
||||
- (tm->tm_mon == 0x1) && (cur_mon == 0x12)) ||
|
||||
- ((tm->tm_year == cur_year) &&
|
||||
- (tm->tm_mon <= cur_mon + 1))) &&
|
||||
- ((tm->tm_mday > cur_day) ||
|
||||
- ((tm->tm_mday == cur_day) &&
|
||||
- ((tm->tm_hour > cur_hour) ||
|
||||
- ((tm->tm_hour == cur_hour) && (tm->tm_min > cur_min)) ||
|
||||
- ((tm->tm_hour == cur_hour) && (tm->tm_min == cur_min) &&
|
||||
- (tm->tm_sec >= cur_sec))))))
|
||||
+ if (((tm->tm_year > cur_year &&
|
||||
+ tm->tm_mon == 0x1 && cur_mon == 0x12) ||
|
||||
+ (tm->tm_year == cur_year &&
|
||||
+ tm->tm_mon <= cur_mon + 1)) &&
|
||||
+ (tm->tm_mday > cur_day ||
|
||||
+ (tm->tm_mday == cur_day &&
|
||||
+ (tm->tm_hour > cur_hour ||
|
||||
+ (tm->tm_hour == cur_hour && tm->tm_min > cur_min) ||
|
||||
+ (tm->tm_hour == cur_hour && tm->tm_min == cur_min &&
|
||||
+ tm->tm_sec >= cur_sec)))))
|
||||
return 0;
|
||||
|
||||
return -EINVAL;
|
||||
@@ -547,7 +641,8 @@ static void stm32_rtc_clear_events(struct stm32_rtc *rtc,
|
||||
static const struct stm32_rtc_data stm32_rtc_data = {
|
||||
.has_pclk = false,
|
||||
.need_dbp = true,
|
||||
|
|
@ -343,7 +383,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
.regs = {
|
||||
.tr = 0x00,
|
||||
.dr = 0x04,
|
||||
@@ -558,6 +654,7 @@ static const struct stm32_rtc_data stm32_rtc_data = {
|
||||
@@ -558,6 +653,7 @@ static const struct stm32_rtc_data stm32_rtc_data = {
|
||||
.wpr = 0x24,
|
||||
.sr = 0x0C, /* set to ISR offset to ease alarm management */
|
||||
.scr = UNDEF_REG,
|
||||
|
|
@ -351,7 +391,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
.verr = UNDEF_REG,
|
||||
},
|
||||
.events = {
|
||||
@@ -569,7 +666,8 @@ static const struct stm32_rtc_data stm32_rtc_data = {
|
||||
@@ -569,7 +665,8 @@ static const struct stm32_rtc_data stm32_rtc_data = {
|
||||
static const struct stm32_rtc_data stm32h7_rtc_data = {
|
||||
.has_pclk = true,
|
||||
.need_dbp = true,
|
||||
|
|
@ -361,7 +401,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
.regs = {
|
||||
.tr = 0x00,
|
||||
.dr = 0x04,
|
||||
@@ -580,6 +678,7 @@ static const struct stm32_rtc_data stm32h7_rtc_data = {
|
||||
@@ -580,6 +677,7 @@ static const struct stm32_rtc_data stm32h7_rtc_data = {
|
||||
.wpr = 0x24,
|
||||
.sr = 0x0C, /* set to ISR offset to ease alarm management */
|
||||
.scr = UNDEF_REG,
|
||||
|
|
@ -369,7 +409,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
.verr = UNDEF_REG,
|
||||
},
|
||||
.events = {
|
||||
@@ -600,7 +699,8 @@ static void stm32mp1_rtc_clear_events(struct stm32_rtc *rtc,
|
||||
@@ -600,7 +698,8 @@ static void stm32mp1_rtc_clear_events(struct stm32_rtc *rtc,
|
||||
static const struct stm32_rtc_data stm32mp1_data = {
|
||||
.has_pclk = true,
|
||||
.need_dbp = false,
|
||||
|
|
@ -379,7 +419,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
.regs = {
|
||||
.tr = 0x00,
|
||||
.dr = 0x04,
|
||||
@@ -611,6 +711,7 @@ static const struct stm32_rtc_data stm32mp1_data = {
|
||||
@@ -611,6 +710,7 @@ static const struct stm32_rtc_data stm32mp1_data = {
|
||||
.wpr = 0x24,
|
||||
.sr = 0x50,
|
||||
.scr = 0x5C,
|
||||
|
|
@ -387,32 +427,45 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
.verr = 0x3F4,
|
||||
},
|
||||
.events = {
|
||||
@@ -641,11 +742,20 @@ static int stm32_rtc_init(struct platform_device *pdev,
|
||||
@@ -641,18 +741,32 @@ static int stm32_rtc_init(struct platform_device *pdev,
|
||||
pred_a_max = STM32_RTC_PRER_PRED_A >> STM32_RTC_PRER_PRED_A_SHIFT;
|
||||
pred_s_max = STM32_RTC_PRER_PRED_S >> STM32_RTC_PRER_PRED_S_SHIFT;
|
||||
|
||||
- for (pred_a = pred_a_max; pred_a + 1 > 0; pred_a--) {
|
||||
- pred_s = (rate / (pred_a + 1)) - 1;
|
||||
+ if (rate > (pred_a_max + 1) * (pred_s_max + 1)) {
|
||||
+ dev_err(&pdev->dev, "rtc_ck rate is too high: %dHz\n", rate);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ if (rtc->data->need_accuracy) {
|
||||
+ for (pred_a = 0; pred_a <= pred_a_max; pred_a++) {
|
||||
+ pred_s = (rate / (pred_a + 1)) - 1;
|
||||
+
|
||||
+ if (((pred_s + 1) * (pred_a + 1)) == rate)
|
||||
|
||||
- if (((pred_s + 1) * (pred_a + 1)) == rate)
|
||||
- break;
|
||||
+ if (pred_s <= pred_s_max && ((pred_s + 1) * (pred_a + 1)) == rate)
|
||||
+ break;
|
||||
+ }
|
||||
+ } else {
|
||||
+ for (pred_a = pred_a_max; pred_a + 1 > 0; pred_a--) {
|
||||
+ pred_s = (rate / (pred_a + 1)) - 1;
|
||||
|
||||
- if (((pred_s + 1) * (pred_a + 1)) == rate)
|
||||
- break;
|
||||
+
|
||||
+ if (((pred_s + 1) * (pred_a + 1)) == rate)
|
||||
+ break;
|
||||
+ }
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -736,13 +846,15 @@ static int stm32_rtc_probe(struct platform_device *pdev)
|
||||
* Can't find a 1Hz, so give priority to RTC power consumption
|
||||
* by choosing the higher possible value for prediv_a
|
||||
*/
|
||||
- if ((pred_s > pred_s_max) || (pred_a > pred_a_max)) {
|
||||
+ if (pred_s > pred_s_max || pred_a > pred_a_max) {
|
||||
pred_a = pred_a_max;
|
||||
pred_s = (rate / (pred_a + 1)) - 1;
|
||||
|
||||
@@ -736,13 +850,15 @@ static int stm32_rtc_probe(struct platform_device *pdev)
|
||||
} else {
|
||||
rtc->pclk = devm_clk_get(&pdev->dev, "pclk");
|
||||
if (IS_ERR(rtc->pclk)) {
|
||||
|
|
@ -425,12 +478,12 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
}
|
||||
if (IS_ERR(rtc->rtc_ck)) {
|
||||
- dev_err(&pdev->dev, "no rtc_ck clock");
|
||||
+ if (PTR_ERR(rtc->pclk) != -EPROBE_DEFER)
|
||||
+ if (PTR_ERR(rtc->rtc_ck) != -EPROBE_DEFER)
|
||||
+ dev_err(&pdev->dev, "no rtc_ck clock");
|
||||
return PTR_ERR(rtc->rtc_ck);
|
||||
}
|
||||
|
||||
@@ -779,19 +891,12 @@ static int stm32_rtc_probe(struct platform_device *pdev)
|
||||
@@ -779,19 +895,12 @@ static int stm32_rtc_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
ret = device_init_wakeup(&pdev->dev, true);
|
||||
|
|
@ -455,7 +508,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
|
||||
platform_set_drvdata(pdev, rtc);
|
||||
|
||||
@@ -814,6 +919,21 @@ static int stm32_rtc_probe(struct platform_device *pdev)
|
||||
@@ -814,6 +923,21 @@ static int stm32_rtc_probe(struct platform_device *pdev)
|
||||
goto err;
|
||||
}
|
||||
|
||||
|
|
@ -477,7 +530,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
/*
|
||||
* If INITS flag is reset (calendar year field set to 0x00), calendar
|
||||
* must be initialized
|
||||
@@ -850,6 +970,9 @@ static int stm32_rtc_remove(struct platform_device *pdev)
|
||||
@@ -852,6 +976,9 @@ static int stm32_rtc_remove(struct platform_device *pdev)
|
||||
const struct stm32_rtc_registers *regs = &rtc->data->regs;
|
||||
unsigned int cr;
|
||||
|
||||
|
|
@ -487,7 +540,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
/* Disable interrupts */
|
||||
stm32_rtc_wpr_unlock(rtc);
|
||||
cr = readl_relaxed(rtc->base + regs->cr);
|
||||
@@ -879,9 +1002,6 @@ static int stm32_rtc_suspend(struct device *dev)
|
||||
@@ -881,9 +1008,6 @@ static int stm32_rtc_suspend(struct device *dev)
|
||||
if (rtc->data->has_pclk)
|
||||
clk_disable_unprepare(rtc->pclk);
|
||||
|
||||
|
|
@ -497,7 +550,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
return 0;
|
||||
}
|
||||
|
||||
@@ -903,15 +1023,13 @@ static int stm32_rtc_resume(struct device *dev)
|
||||
@@ -905,15 +1029,13 @@ static int stm32_rtc_resume(struct device *dev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -517,7 +570,7 @@ index d774aa18f57a..7fd6347691bb 100644
|
|||
static struct platform_driver stm32_rtc_driver = {
|
||||
.probe = stm32_rtc_probe,
|
||||
diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c
|
||||
index 25188d6bbe15..a3436c296c97 100644
|
||||
index 25188d6bb..a3436c296 100644
|
||||
--- a/drivers/watchdog/stm32_iwdg.c
|
||||
+++ b/drivers/watchdog/stm32_iwdg.c
|
||||
@@ -162,18 +162,15 @@ static int stm32_iwdg_clk_init(struct platform_device *pdev,
|
||||
|
|
@ -545,7 +598,7 @@ index 25188d6bbe15..a3436c296c97 100644
|
|||
ret = clk_prepare_enable(wdt->clk_pclk);
|
||||
if (ret) {
|
||||
diff --git a/include/dt-bindings/reset/stm32mp1-resets.h b/include/dt-bindings/reset/stm32mp1-resets.h
|
||||
index f0c3aaef67a0..f3a0ed317835 100644
|
||||
index f0c3aaef6..f3a0ed317 100644
|
||||
--- a/include/dt-bindings/reset/stm32mp1-resets.h
|
||||
+++ b/include/dt-bindings/reset/stm32mp1-resets.h
|
||||
@@ -7,6 +7,7 @@
|
||||
|
|
@ -577,7 +630,7 @@ index f0c3aaef67a0..f3a0ed317835 100644
|
|||
#endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */
|
||||
diff --git a/include/dt-bindings/rtc/rtc-stm32.h b/include/dt-bindings/rtc/rtc-stm32.h
|
||||
new file mode 100644
|
||||
index 000000000000..4373c4dea587
|
||||
index 000000000..4373c4dea
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/rtc/rtc-stm32.h
|
||||
@@ -0,0 +1,13 @@
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
From 51f0826032cee1b8cb0a1597c0a8d60b0042109d Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:17:18 +0100
|
||||
Subject: [PATCH 18/22] ARM 5.10.10-stm32mp1-r1 SCMI
|
||||
From 03fe6061e18768eee7b247999cecaad2280098cf Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:51 +0200
|
||||
Subject: [PATCH 18/23] ARM 5.10.61-stm32mp1-r2 SCMI
|
||||
|
||||
---
|
||||
drivers/firmware/arm_scmi/base.c | 2 +-
|
||||
|
|
@ -14,7 +14,7 @@ Subject: [PATCH 18/22] ARM 5.10.10-stm32mp1-r1 SCMI
|
|||
7 files changed, 16 insertions(+), 13 deletions(-)
|
||||
|
||||
diff --git a/drivers/firmware/arm_scmi/base.c b/drivers/firmware/arm_scmi/base.c
|
||||
index 017e5d8bd869..a70b10ebaf45 100644
|
||||
index 017e5d8bd..a70b10eba 100644
|
||||
--- a/drivers/firmware/arm_scmi/base.c
|
||||
+++ b/drivers/firmware/arm_scmi/base.c
|
||||
@@ -183,7 +183,7 @@ static int scmi_base_implementation_list_get(const struct scmi_handle *handle,
|
||||
|
|
@ -27,7 +27,7 @@ index 017e5d8bd869..a70b10ebaf45 100644
|
|||
break;
|
||||
|
||||
diff --git a/drivers/firmware/arm_scmi/bus.c b/drivers/firmware/arm_scmi/bus.c
|
||||
index 1377ec76a45d..8ea04b069129 100644
|
||||
index def8a84d1..33d1a6c79 100644
|
||||
--- a/drivers/firmware/arm_scmi/bus.c
|
||||
+++ b/drivers/firmware/arm_scmi/bus.c
|
||||
@@ -60,11 +60,6 @@ static int scmi_protocol_init(int protocol_id, struct scmi_handle *handle)
|
||||
|
|
@ -54,7 +54,7 @@ index 1377ec76a45d..8ea04b069129 100644
|
|||
}
|
||||
|
||||
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
|
||||
index 4645677d86f1..c348a6f2eb29 100644
|
||||
index 4645677d8..c348a6f2e 100644
|
||||
--- a/drivers/firmware/arm_scmi/clock.c
|
||||
+++ b/drivers/firmware/arm_scmi/clock.c
|
||||
@@ -161,7 +161,7 @@ scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id,
|
||||
|
|
@ -67,7 +67,7 @@ index 4645677d86f1..c348a6f2eb29 100644
|
|||
goto err;
|
||||
|
||||
diff --git a/drivers/firmware/arm_scmi/common.h b/drivers/firmware/arm_scmi/common.h
|
||||
index 65063fa948d4..98e642b591c5 100644
|
||||
index 34b7ae798..9fa5c0022 100644
|
||||
--- a/drivers/firmware/arm_scmi/common.h
|
||||
+++ b/drivers/firmware/arm_scmi/common.h
|
||||
@@ -143,6 +143,8 @@ struct scmi_xfer {
|
||||
|
|
@ -80,10 +80,10 @@ index 65063fa948d4..98e642b591c5 100644
|
|||
struct scmi_xfer *xfer);
|
||||
int scmi_xfer_get_init(const struct scmi_handle *h, u8 msg_id, u8 prot_id,
|
||||
diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c
|
||||
index 3dfd8b6a0ebf..479f67d2377b 100644
|
||||
index 763223248..2b3ce604f 100644
|
||||
--- a/drivers/firmware/arm_scmi/driver.c
|
||||
+++ b/drivers/firmware/arm_scmi/driver.c
|
||||
@@ -410,6 +410,16 @@ void scmi_reset_rx_to_maxsz(const struct scmi_handle *handle,
|
||||
@@ -415,6 +415,16 @@ void scmi_reset_rx_to_maxsz(const struct scmi_handle *handle,
|
||||
xfer->rx.len = info->desc->max_msg_size;
|
||||
}
|
||||
|
||||
|
|
@ -101,7 +101,7 @@ index 3dfd8b6a0ebf..479f67d2377b 100644
|
|||
|
||||
/**
|
||||
diff --git a/drivers/firmware/arm_scmi/perf.c b/drivers/firmware/arm_scmi/perf.c
|
||||
index 82fb3babff72..7bea0f6464ff 100644
|
||||
index 82fb3babf..7bea0f646 100644
|
||||
--- a/drivers/firmware/arm_scmi/perf.c
|
||||
+++ b/drivers/firmware/arm_scmi/perf.c
|
||||
@@ -281,7 +281,7 @@ scmi_perf_describe_levels_get(const struct scmi_handle *handle, u32 domain,
|
||||
|
|
@ -114,7 +114,7 @@ index 82fb3babff72..7bea0f6464ff 100644
|
|||
break;
|
||||
|
||||
diff --git a/drivers/firmware/arm_scmi/sensors.c b/drivers/firmware/arm_scmi/sensors.c
|
||||
index b4232d611033..6dae881be774 100644
|
||||
index b4232d611..6dae881be 100644
|
||||
--- a/drivers/firmware/arm_scmi/sensors.c
|
||||
+++ b/drivers/firmware/arm_scmi/sensors.c
|
||||
@@ -134,7 +134,7 @@ static int scmi_sensor_description_get(const struct scmi_handle *handle,
|
||||
|
|
@ -1,17 +1,19 @@
|
|||
From f934df539b8cdfa58cb512b439749dba32a42932 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:16:24 +0100
|
||||
Subject: [PATCH 19/22] ARM 5.10.10-stm32mp1-r1 SOUND
|
||||
From e8a701ceba6fdf12989b38212c510bfdfea5c830 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:51 +0200
|
||||
Subject: [PATCH 19/23] ARM 5.10.61-stm32mp1-r2 SOUND
|
||||
|
||||
---
|
||||
sound/soc/codecs/Kconfig | 2 +-
|
||||
sound/soc/codecs/wm8994.c | 81 ++++++++-
|
||||
sound/soc/stm/stm32_i2s.c | 310 +++++++++++++++++++++++++++++-----
|
||||
sound/soc/stm/stm32_adfsdm.c | 11 +-
|
||||
sound/soc/stm/stm32_i2s.c | 316 +++++++++++++++++++++++++++++-----
|
||||
sound/soc/stm/stm32_sai_sub.c | 4 +-
|
||||
4 files changed, 344 insertions(+), 53 deletions(-)
|
||||
sound/soc/stm/stm32_spdifrx.c | 4 +
|
||||
6 files changed, 361 insertions(+), 57 deletions(-)
|
||||
|
||||
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
|
||||
index 34c6dd04b85a..3afc5d1f074d 100644
|
||||
index 34c6dd04b..3afc5d1f0 100644
|
||||
--- a/sound/soc/codecs/Kconfig
|
||||
+++ b/sound/soc/codecs/Kconfig
|
||||
@@ -1642,7 +1642,7 @@ config SND_SOC_WM8993
|
||||
|
|
@ -24,7 +26,7 @@ index 34c6dd04b85a..3afc5d1f074d 100644
|
|||
config SND_SOC_WM8995
|
||||
tristate
|
||||
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
|
||||
index f57884113406..6d30b438ba0f 100644
|
||||
index f57884113..6d30b438b 100644
|
||||
--- a/sound/soc/codecs/wm8994.c
|
||||
+++ b/sound/soc/codecs/wm8994.c
|
||||
@@ -7,6 +7,7 @@
|
||||
|
|
@ -175,11 +177,47 @@ index f57884113406..6d30b438ba0f 100644
|
|||
if (control->revision < 4) {
|
||||
snd_soc_dapm_new_controls(dapm, wm8994_lateclk_revd_widgets,
|
||||
ARRAY_SIZE(wm8994_lateclk_revd_widgets));
|
||||
diff --git a/sound/soc/stm/stm32_adfsdm.c b/sound/soc/stm/stm32_adfsdm.c
|
||||
index c4031988f..a67cadc03 100644
|
||||
--- a/sound/soc/stm/stm32_adfsdm.c
|
||||
+++ b/sound/soc/stm/stm32_adfsdm.c
|
||||
@@ -12,7 +12,7 @@
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/slab.h>
|
||||
-
|
||||
+#include <linux/pm_runtime.h>
|
||||
#include <linux/iio/iio.h>
|
||||
#include <linux/iio/consumer.h>
|
||||
#include <linux/iio/adc/stm32-dfsdm-adc.h>
|
||||
@@ -353,15 +353,20 @@ static int stm32_adfsdm_probe(struct platform_device *pdev)
|
||||
#endif
|
||||
|
||||
ret = snd_soc_add_component(component, NULL, 0);
|
||||
- if (ret < 0)
|
||||
+ if (ret < 0) {
|
||||
dev_err(&pdev->dev, "%s: Failed to register PCM platform\n",
|
||||
__func__);
|
||||
+ return ret;
|
||||
+ }
|
||||
|
||||
- return ret;
|
||||
+ pm_runtime_enable(&pdev->dev);
|
||||
+
|
||||
+ return 0;
|
||||
}
|
||||
|
||||
static int stm32_adfsdm_remove(struct platform_device *pdev)
|
||||
{
|
||||
+ pm_runtime_disable(&pdev->dev);
|
||||
snd_soc_unregister_component(&pdev->dev);
|
||||
|
||||
return 0;
|
||||
diff --git a/sound/soc/stm/stm32_i2s.c b/sound/soc/stm/stm32_i2s.c
|
||||
index 7c4d63c33f15..7d1672cf78cc 100644
|
||||
index 7c4d63c33..f324ce974 100644
|
||||
--- a/sound/soc/stm/stm32_i2s.c
|
||||
+++ b/sound/soc/stm/stm32_i2s.c
|
||||
@@ -8,6 +8,7 @@
|
||||
@@ -8,10 +8,12 @@
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/clk.h>
|
||||
|
|
@ -187,7 +225,12 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
#include <linux/delay.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of_irq.h>
|
||||
@@ -196,6 +197,9 @@ enum i2s_datlen {
|
||||
#include <linux/of_platform.h>
|
||||
+#include <linux/pm_runtime.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/reset.h>
|
||||
#include <linux/spinlock.h>
|
||||
@@ -196,6 +198,9 @@ enum i2s_datlen {
|
||||
#define STM32_I2S_IS_MASTER(x) ((x)->ms_flg == I2S_MS_MASTER)
|
||||
#define STM32_I2S_IS_SLAVE(x) ((x)->ms_flg == I2S_MS_SLAVE)
|
||||
|
||||
|
|
@ -197,7 +240,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
/**
|
||||
* struct stm32_i2s_data - private data of I2S
|
||||
* @regmap_conf: I2S register map configuration pointer
|
||||
@@ -206,6 +210,7 @@ enum i2s_datlen {
|
||||
@@ -206,6 +211,7 @@ enum i2s_datlen {
|
||||
* @dma_data_rx: dma configuration data for tx channel
|
||||
* @substream: PCM substream data pointer
|
||||
* @i2sclk: kernel clock feeding the I2S clock generator
|
||||
|
|
@ -205,7 +248,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
* @pclk: peripheral clock driving bus interface
|
||||
* @x8kclk: I2S parent clock for sampling frequencies multiple of 8kHz
|
||||
* @x11kclk: I2S parent clock for sampling frequencies multiple of 11kHz
|
||||
@@ -215,6 +220,9 @@ enum i2s_datlen {
|
||||
@@ -215,6 +221,9 @@ enum i2s_datlen {
|
||||
* @irq_lock: prevent race condition with IRQ
|
||||
* @mclk_rate: master clock frequency (Hz)
|
||||
* @fmt: DAI protocol
|
||||
|
|
@ -215,7 +258,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
* @refcount: keep count of opened streams on I2S
|
||||
* @ms_flg: master mode flag.
|
||||
*/
|
||||
@@ -227,6 +235,7 @@ struct stm32_i2s_data {
|
||||
@@ -227,6 +236,7 @@ struct stm32_i2s_data {
|
||||
struct snd_dmaengine_dai_dma_data dma_data_rx;
|
||||
struct snd_pcm_substream *substream;
|
||||
struct clk *i2sclk;
|
||||
|
|
@ -223,7 +266,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
struct clk *pclk;
|
||||
struct clk *x8kclk;
|
||||
struct clk *x11kclk;
|
||||
@@ -236,10 +245,210 @@ struct stm32_i2s_data {
|
||||
@@ -236,10 +246,210 @@ struct stm32_i2s_data {
|
||||
spinlock_t irq_lock; /* used to prevent race condition with IRQ */
|
||||
unsigned int mclk_rate;
|
||||
unsigned int fmt;
|
||||
|
|
@ -434,7 +477,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
static irqreturn_t stm32_i2s_isr(int irq, void *devid)
|
||||
{
|
||||
struct stm32_i2s_data *i2s = (struct stm32_i2s_data *)devid;
|
||||
@@ -405,18 +614,46 @@ static int stm32_i2s_set_sysclk(struct snd_soc_dai *cpu_dai,
|
||||
@@ -405,18 +615,46 @@ static int stm32_i2s_set_sysclk(struct snd_soc_dai *cpu_dai,
|
||||
int clk_id, unsigned int freq, int dir)
|
||||
{
|
||||
struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
|
||||
|
|
@ -488,7 +531,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
}
|
||||
|
||||
static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
|
||||
@@ -424,11 +661,10 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
|
||||
@@ -424,11 +662,10 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
|
||||
{
|
||||
struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
|
||||
unsigned long i2s_clock_rate;
|
||||
|
|
@ -502,7 +545,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
|
||||
if (!(rate % 11025))
|
||||
clk_set_parent(i2s->i2sclk, i2s->x11kclk);
|
||||
@@ -449,7 +685,10 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
|
||||
@@ -449,7 +686,10 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
|
||||
* dsp mode : div = i2s_clk / (nb_bits x ws)
|
||||
*/
|
||||
if (i2s->mclk_rate) {
|
||||
|
|
@ -514,10 +557,11 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
} else {
|
||||
frame_len = 32;
|
||||
if ((i2s->fmt & SND_SOC_DAIFMT_FORMAT_MASK) ==
|
||||
@@ -462,34 +701,13 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
|
||||
@@ -461,35 +701,14 @@ static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai,
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
nb_bits = frame_len * ((cgfr & I2S_CGFR_CHLEN) + 1);
|
||||
- nb_bits = frame_len * ((cgfr & I2S_CGFR_CHLEN) + 1);
|
||||
- tmp = DIV_ROUND_CLOSEST(i2s_clock_rate, (nb_bits * rate));
|
||||
- }
|
||||
-
|
||||
|
|
@ -539,6 +583,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
- if (((div == 1) && odd) || (div > I2S_CGFR_I2SDIV_MAX)) {
|
||||
- dev_err(cpu_dai->dev, "Wrong divider setting\n");
|
||||
- return -EINVAL;
|
||||
+ nb_bits = frame_len * (FIELD_GET(I2S_CGFR_CHLEN, cgfr) + 1);
|
||||
+ ret = stm32_i2s_calc_clk_div(i2s, i2s_clock_rate,
|
||||
+ (nb_bits * rate));
|
||||
+ if (ret)
|
||||
|
|
@ -554,7 +599,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
@@ -694,9 +912,6 @@ static void stm32_i2s_shutdown(struct snd_pcm_substream *substream,
|
||||
@@ -694,9 +913,6 @@ static void stm32_i2s_shutdown(struct snd_pcm_substream *substream,
|
||||
struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
|
||||
unsigned long flags;
|
||||
|
||||
|
|
@ -564,7 +609,7 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
clk_disable_unprepare(i2s->i2sclk);
|
||||
|
||||
spin_lock_irqsave(&i2s->irq_lock, flags);
|
||||
@@ -861,6 +1076,13 @@ static int stm32_i2s_parse_dt(struct platform_device *pdev,
|
||||
@@ -861,6 +1077,13 @@ static int stm32_i2s_parse_dt(struct platform_device *pdev,
|
||||
return PTR_ERR(i2s->x11kclk);
|
||||
}
|
||||
|
||||
|
|
@ -578,7 +623,15 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
/* Get irqs */
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq < 0)
|
||||
@@ -906,16 +1128,16 @@ static int stm32_i2s_probe(struct platform_device *pdev)
|
||||
@@ -892,6 +1115,7 @@ static int stm32_i2s_remove(struct platform_device *pdev)
|
||||
{
|
||||
snd_dmaengine_pcm_unregister(&pdev->dev);
|
||||
snd_soc_unregister_component(&pdev->dev);
|
||||
+ pm_runtime_disable(&pdev->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -906,16 +1130,16 @@ static int stm32_i2s_probe(struct platform_device *pdev)
|
||||
if (!i2s)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
@ -599,8 +652,17 @@ index 7c4d63c33f15..7d1672cf78cc 100644
|
|||
ret = stm32_i2s_dais_init(pdev, i2s);
|
||||
if (ret)
|
||||
return ret;
|
||||
@@ -974,6 +1198,8 @@ static int stm32_i2s_probe(struct platform_device *pdev)
|
||||
FIELD_GET(I2S_VERR_MIN_MASK, val));
|
||||
}
|
||||
|
||||
+ pm_runtime_enable(&pdev->dev);
|
||||
+
|
||||
return ret;
|
||||
|
||||
error:
|
||||
diff --git a/sound/soc/stm/stm32_sai_sub.c b/sound/soc/stm/stm32_sai_sub.c
|
||||
index 3aa1cf262402..780f48138985 100644
|
||||
index 3aa1cf262..780f48138 100644
|
||||
--- a/sound/soc/stm/stm32_sai_sub.c
|
||||
+++ b/sound/soc/stm/stm32_sai_sub.c
|
||||
@@ -1294,7 +1294,7 @@ static struct snd_soc_dai_driver stm32_sai_playback_dai = {
|
||||
|
|
@ -621,6 +683,35 @@ index 3aa1cf262402..780f48138985 100644
|
|||
.rate_min = 8000,
|
||||
.rate_max = 192000,
|
||||
.rates = SNDRV_PCM_RATE_CONTINUOUS,
|
||||
diff --git a/sound/soc/stm/stm32_spdifrx.c b/sound/soc/stm/stm32_spdifrx.c
|
||||
index 1bfa3b2ba..aa38f9df9 100644
|
||||
--- a/sound/soc/stm/stm32_spdifrx.c
|
||||
+++ b/sound/soc/stm/stm32_spdifrx.c
|
||||
@@ -12,6 +12,7 @@
|
||||
#include <linux/delay.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of_platform.h>
|
||||
+#include <linux/pm_runtime.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/reset.h>
|
||||
|
||||
@@ -956,6 +957,7 @@ static int stm32_spdifrx_remove(struct platform_device *pdev)
|
||||
|
||||
snd_dmaengine_pcm_unregister(&pdev->dev);
|
||||
snd_soc_unregister_component(&pdev->dev);
|
||||
+ pm_runtime_disable(&pdev->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1046,6 +1048,8 @@ static int stm32_spdifrx_probe(struct platform_device *pdev)
|
||||
FIELD_GET(SPDIFRX_VERR_MIN_MASK, ver));
|
||||
}
|
||||
|
||||
+ pm_runtime_enable(&pdev->dev);
|
||||
+
|
||||
return ret;
|
||||
|
||||
error:
|
||||
--
|
||||
2.17.1
|
||||
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
From 49a7d9003e2c89aa252d3ccccb16d4ab22a90ef6 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:52 +0200
|
||||
Subject: [PATCH 20/23] ARM 5.10.61-stm32mp1-r2 MISC
|
||||
|
||||
---
|
||||
drivers/opp/core.c | 6 +++++-
|
||||
1 file changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
|
||||
index 903b465c8..dbcce5de9 100644
|
||||
--- a/drivers/opp/core.c
|
||||
+++ b/drivers/opp/core.c
|
||||
@@ -1608,9 +1608,13 @@ struct opp_table *dev_pm_opp_set_supported_hw(struct device *dev,
|
||||
struct opp_table *opp_table;
|
||||
|
||||
opp_table = dev_pm_opp_get_opp_table(dev);
|
||||
- if (IS_ERR(opp_table))
|
||||
+
|
||||
+ if (PTR_ERR(opp_table) == -EPROBE_DEFER)
|
||||
return opp_table;
|
||||
|
||||
+ if (!opp_table)
|
||||
+ return ERR_PTR(-ENOMEM);
|
||||
+
|
||||
/* Make sure there are no concurrent readers while updating opp_table */
|
||||
WARN_ON(!list_empty(&opp_table->opp_list));
|
||||
|
||||
--
|
||||
2.17.1
|
||||
|
||||
|
|
@ -1,23 +1,22 @@
|
|||
From 996898e1ae8bd13f5bb6986c52bd9777b68e80fa Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:18:38 +0100
|
||||
Subject: [PATCH 20/22] ARM 5.10.10-stm32mp1-r1 MISC-CPUIDLE-POWER
|
||||
From 5707d44444b4bd31e2690d5d7e72f83c6e28b48b Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Fri, 15 Oct 2021 08:44:32 +0200
|
||||
Subject: [PATCH 21/23] ARM 5.10.61-stm32mp1-r2 CPUIDLE-POWER
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
drivers/base/power/domain.c | 4 +-
|
||||
drivers/base/power/main.c | 4 +-
|
||||
drivers/cpuidle/Kconfig.arm | 8 +
|
||||
drivers/cpuidle/Makefile | 1 +
|
||||
drivers/cpuidle/cpuidle-stm32.c | 276 ++++++++++++++++++++++++++++++++
|
||||
drivers/opp/core.c | 6 +-
|
||||
drivers/nvmem/stm32-romem.c | 165 +++++++++++++++++--
|
||||
include/linux/pm_wakeup.h | 10 ++
|
||||
kernel/power/suspend.c | 1 -
|
||||
8 files changed, 304 insertions(+), 6 deletions(-)
|
||||
8 files changed, 453 insertions(+), 16 deletions(-)
|
||||
create mode 100644 drivers/cpuidle/cpuidle-stm32.c
|
||||
|
||||
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
|
||||
index 743268996336..e0894ef8457c 100644
|
||||
index 743268996..e0894ef84 100644
|
||||
--- a/drivers/base/power/domain.c
|
||||
+++ b/drivers/base/power/domain.c
|
||||
@@ -1142,7 +1142,7 @@ static int genpd_finish_suspend(struct device *dev, bool poweroff)
|
||||
|
|
@ -39,7 +38,7 @@ index 743268996336..e0894ef8457c 100644
|
|||
|
||||
genpd_lock(genpd);
|
||||
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
|
||||
index c7ac49042cee..921c5b2ec30a 100644
|
||||
index c7ac49042..921c5b2ec 100644
|
||||
--- a/drivers/base/power/main.c
|
||||
+++ b/drivers/base/power/main.c
|
||||
@@ -1359,7 +1359,7 @@ static void dpm_propagate_wakeup_to_parent(struct device *dev)
|
||||
|
|
@ -61,7 +60,7 @@ index c7ac49042cee..921c5b2ec30a 100644
|
|||
|
||||
if (dev->power.direct_complete) {
|
||||
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
|
||||
index 0844fadc4be8..2b8a0756e4ff 100644
|
||||
index 334f83e56..4de5db493 100644
|
||||
--- a/drivers/cpuidle/Kconfig.arm
|
||||
+++ b/drivers/cpuidle/Kconfig.arm
|
||||
@@ -91,6 +91,14 @@ config ARM_EXYNOS_CPUIDLE
|
||||
|
|
@ -80,7 +79,7 @@ index 0844fadc4be8..2b8a0756e4ff 100644
|
|||
bool "CPU Idle Driver for mvebu v7 family processors"
|
||||
depends on (ARCH_MVEBU || COMPILE_TEST) && !ARM64
|
||||
diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile
|
||||
index 26bbc5e74123..cc1eccc73d65 100644
|
||||
index 26bbc5e74..cc1eccc73 100644
|
||||
--- a/drivers/cpuidle/Makefile
|
||||
+++ b/drivers/cpuidle/Makefile
|
||||
@@ -25,6 +25,7 @@ obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle-psci.o
|
||||
|
|
@ -93,7 +92,7 @@ index 26bbc5e74123..cc1eccc73d65 100644
|
|||
# MIPS drivers
|
||||
diff --git a/drivers/cpuidle/cpuidle-stm32.c b/drivers/cpuidle/cpuidle-stm32.c
|
||||
new file mode 100644
|
||||
index 000000000000..d3413386cc7f
|
||||
index 000000000..d3413386c
|
||||
--- /dev/null
|
||||
+++ b/drivers/cpuidle/cpuidle-stm32.c
|
||||
@@ -0,0 +1,276 @@
|
||||
|
|
@ -373,27 +372,292 @@ index 000000000000..d3413386cc7f
|
|||
+MODULE_AUTHOR("<>");
|
||||
+MODULE_DESCRIPTION("STM32 cpu idle driver");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
|
||||
index 903b465c8568..dbcce5de9346 100644
|
||||
--- a/drivers/opp/core.c
|
||||
+++ b/drivers/opp/core.c
|
||||
@@ -1608,9 +1608,13 @@ struct opp_table *dev_pm_opp_set_supported_hw(struct device *dev,
|
||||
struct opp_table *opp_table;
|
||||
diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c
|
||||
index 354be5268..14013fa66 100644
|
||||
--- a/drivers/nvmem/stm32-romem.c
|
||||
+++ b/drivers/nvmem/stm32-romem.c
|
||||
@@ -2,15 +2,17 @@
|
||||
/*
|
||||
* STM32 Factory-programmed memory read access driver
|
||||
*
|
||||
- * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
|
||||
+ * Copyright (C) 2017-2021, STMicroelectronics - All Rights Reserved
|
||||
* Author: Fabrice Gasnier <fabrice.gasnier@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
opp_table = dev_pm_opp_get_opp_table(dev);
|
||||
- if (IS_ERR(opp_table))
|
||||
#include <linux/arm-smccc.h>
|
||||
+#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/nvmem-provider.h>
|
||||
#include <linux/of_device.h>
|
||||
+#include <linux/pm_runtime.h>
|
||||
|
||||
/* BSEC secure service access from non-secure */
|
||||
#define STM32_SMC_BSEC 0x82001003
|
||||
@@ -25,6 +27,8 @@
|
||||
/* 32 (x 32-bits) lower shadow registers */
|
||||
#define STM32MP15_BSEC_NUM_LOWER 32
|
||||
|
||||
+#define STM32_ROMEM_AUTOSUSPEND_DELAY_MS 50
|
||||
+
|
||||
+ if (PTR_ERR(opp_table) == -EPROBE_DEFER)
|
||||
return opp_table;
|
||||
struct stm32_romem_cfg {
|
||||
int size;
|
||||
};
|
||||
@@ -32,6 +36,7 @@ struct stm32_romem_cfg {
|
||||
struct stm32_romem_priv {
|
||||
void __iomem *base;
|
||||
struct nvmem_config cfg;
|
||||
+ struct clk *clk;
|
||||
};
|
||||
|
||||
+ if (!opp_table)
|
||||
+ return ERR_PTR(-ENOMEM);
|
||||
static int stm32_romem_read(void *context, unsigned int offset, void *buf,
|
||||
@@ -39,11 +44,18 @@ static int stm32_romem_read(void *context, unsigned int offset, void *buf,
|
||||
{
|
||||
struct stm32_romem_priv *priv = context;
|
||||
u8 *buf8 = buf;
|
||||
- int i;
|
||||
+ int i, ret;
|
||||
+
|
||||
/* Make sure there are no concurrent readers while updating opp_table */
|
||||
WARN_ON(!list_empty(&opp_table->opp_list));
|
||||
+ ret = pm_runtime_resume_and_get(priv->cfg.dev);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
|
||||
for (i = offset; i < offset + bytes; i++)
|
||||
*buf8++ = readb_relaxed(priv->base + i);
|
||||
|
||||
+ pm_runtime_mark_last_busy(priv->cfg.dev);
|
||||
+ pm_runtime_put_autosuspend(priv->cfg.dev);
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -74,13 +86,19 @@ static int stm32_bsec_read(void *context, unsigned int offset, void *buf,
|
||||
u8 *buf8 = buf, *val8 = (u8 *)&val;
|
||||
int i, j = 0, ret, skip_bytes, size;
|
||||
|
||||
+ ret = pm_runtime_resume_and_get(priv->cfg.dev);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
/* Round unaligned access to 32-bits */
|
||||
roffset = rounddown(offset, 4);
|
||||
skip_bytes = offset & 0x3;
|
||||
rbytes = roundup(bytes + skip_bytes, 4);
|
||||
|
||||
- if (roffset + rbytes > priv->cfg.size)
|
||||
- return -EINVAL;
|
||||
+ if (roffset + rbytes > priv->cfg.size) {
|
||||
+ ret = -EINVAL;
|
||||
+ goto end_read;
|
||||
+ }
|
||||
|
||||
for (i = roffset; (i < roffset + rbytes); i += 4) {
|
||||
u32 otp = i >> 2;
|
||||
@@ -95,7 +113,7 @@ static int stm32_bsec_read(void *context, unsigned int offset, void *buf,
|
||||
if (ret) {
|
||||
dev_err(dev, "Can't read data%d (%d)\n", otp,
|
||||
ret);
|
||||
- return ret;
|
||||
+ goto end_read;
|
||||
}
|
||||
}
|
||||
/* skip first bytes in case of unaligned read */
|
||||
@@ -109,7 +127,11 @@ static int stm32_bsec_read(void *context, unsigned int offset, void *buf,
|
||||
skip_bytes = 0;
|
||||
}
|
||||
|
||||
- return 0;
|
||||
+end_read:
|
||||
+ pm_runtime_mark_last_busy(priv->cfg.dev);
|
||||
+ pm_runtime_put_autosuspend(priv->cfg.dev);
|
||||
+
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
static int stm32_bsec_write(void *context, unsigned int offset, void *buf,
|
||||
@@ -120,20 +142,30 @@ static int stm32_bsec_write(void *context, unsigned int offset, void *buf,
|
||||
u32 *buf32 = buf;
|
||||
int ret, i;
|
||||
|
||||
+ ret = pm_runtime_resume_and_get(priv->cfg.dev);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
/* Allow only writing complete 32-bits aligned words */
|
||||
- if ((bytes % 4) || (offset % 4))
|
||||
- return -EINVAL;
|
||||
+ if ((bytes % 4) || (offset % 4)) {
|
||||
+ ret = -EINVAL;
|
||||
+ goto end_write;
|
||||
+ }
|
||||
|
||||
for (i = offset; i < offset + bytes; i += 4) {
|
||||
ret = stm32_bsec_smc(STM32_SMC_PROG_OTP, i >> 2, *buf32++,
|
||||
NULL);
|
||||
if (ret) {
|
||||
dev_err(dev, "Can't write data%d (%d)\n", i >> 2, ret);
|
||||
- return ret;
|
||||
+ goto end_write;
|
||||
}
|
||||
}
|
||||
|
||||
- return 0;
|
||||
+end_write:
|
||||
+ pm_runtime_mark_last_busy(priv->cfg.dev);
|
||||
+ pm_runtime_put_autosuspend(priv->cfg.dev);
|
||||
+
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
static int stm32_romem_probe(struct platform_device *pdev)
|
||||
@@ -142,6 +174,8 @@ static int stm32_romem_probe(struct platform_device *pdev)
|
||||
struct device *dev = &pdev->dev;
|
||||
struct stm32_romem_priv *priv;
|
||||
struct resource *res;
|
||||
+ struct nvmem_device *nvmem;
|
||||
+ int ret;
|
||||
|
||||
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
@@ -159,6 +193,27 @@ static int stm32_romem_probe(struct platform_device *pdev)
|
||||
priv->cfg.priv = priv;
|
||||
priv->cfg.owner = THIS_MODULE;
|
||||
|
||||
+ priv->clk = devm_clk_get_optional(&pdev->dev, NULL);
|
||||
+ if (IS_ERR(priv->clk))
|
||||
+ return dev_err_probe(dev, PTR_ERR(priv->clk),
|
||||
+ "failed to get clock\n");
|
||||
+
|
||||
+ if (priv->clk) {
|
||||
+ ret = clk_prepare_enable(priv->clk);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "failed to enable clock (%d)\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ pm_runtime_set_autosuspend_delay(dev,
|
||||
+ STM32_ROMEM_AUTOSUSPEND_DELAY_MS);
|
||||
+ pm_runtime_use_autosuspend(dev);
|
||||
+
|
||||
+ pm_runtime_get_noresume(dev);
|
||||
+ pm_runtime_set_active(dev);
|
||||
+ pm_runtime_enable(dev);
|
||||
+
|
||||
cfg = (const struct stm32_romem_cfg *)
|
||||
of_match_device(dev->driver->of_match_table, dev)->data;
|
||||
if (!cfg) {
|
||||
@@ -171,9 +226,95 @@ static int stm32_romem_probe(struct platform_device *pdev)
|
||||
priv->cfg.reg_write = stm32_bsec_write;
|
||||
}
|
||||
|
||||
- return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &priv->cfg));
|
||||
+ platform_set_drvdata(pdev, priv);
|
||||
+
|
||||
+ nvmem = nvmem_register(&priv->cfg);
|
||||
+ if (IS_ERR(nvmem))
|
||||
+ goto err_pm_stop;
|
||||
+
|
||||
+ pm_runtime_mark_last_busy(dev);
|
||||
+ pm_runtime_put_autosuspend(dev);
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err_pm_stop:
|
||||
+ pm_runtime_disable(dev);
|
||||
+ pm_runtime_set_suspended(dev);
|
||||
+ pm_runtime_put_noidle(dev);
|
||||
+
|
||||
+ if (priv->clk)
|
||||
+ clk_disable_unprepare(priv->clk);
|
||||
+
|
||||
+ return PTR_ERR(nvmem);
|
||||
}
|
||||
|
||||
+static int stm32_romem_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct stm32_romem_priv *priv;
|
||||
+ int ret;
|
||||
+
|
||||
+ priv = dev_get_drvdata(&pdev->dev);
|
||||
+ if (!priv)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ ret = pm_runtime_get_sync(&pdev->dev);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ nvmem_unregister((struct nvmem_device *)&priv->cfg);
|
||||
+
|
||||
+ pm_runtime_disable(&pdev->dev);
|
||||
+ pm_runtime_set_suspended(&pdev->dev);
|
||||
+ pm_runtime_put_noidle(&pdev->dev);
|
||||
+
|
||||
+ if (priv->clk)
|
||||
+ clk_disable_unprepare(priv->clk);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int __maybe_unused stm32_romem_runtime_suspend(struct device *dev)
|
||||
+{
|
||||
+ struct stm32_romem_priv *priv;
|
||||
+
|
||||
+ priv = dev_get_drvdata(dev);
|
||||
+ if (!priv)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ if (priv->clk)
|
||||
+ clk_disable_unprepare(priv->clk);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int __maybe_unused stm32_romem_runtime_resume(struct device *dev)
|
||||
+{
|
||||
+ struct stm32_romem_priv *priv;
|
||||
+ int ret;
|
||||
+
|
||||
+ priv = dev_get_drvdata(dev);
|
||||
+ if (!priv)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ if (priv->clk) {
|
||||
+ ret = clk_prepare_enable(priv->clk);
|
||||
+ if (ret) {
|
||||
+ dev_err(priv->cfg.dev,
|
||||
+ "Failed to prepare_enable clock (%d)\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct dev_pm_ops stm32_romem_pm_ops = {
|
||||
+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
|
||||
+ pm_runtime_force_resume)
|
||||
+ SET_RUNTIME_PM_OPS(stm32_romem_runtime_suspend,
|
||||
+ stm32_romem_runtime_resume, NULL)
|
||||
+};
|
||||
+
|
||||
static const struct stm32_romem_cfg stm32mp15_bsec_cfg = {
|
||||
.size = 384, /* 96 x 32-bits data words */
|
||||
};
|
||||
@@ -189,8 +330,10 @@ MODULE_DEVICE_TABLE(of, stm32_romem_of_match);
|
||||
|
||||
static struct platform_driver stm32_romem_driver = {
|
||||
.probe = stm32_romem_probe,
|
||||
+ .remove = stm32_romem_remove,
|
||||
.driver = {
|
||||
.name = "stm32-romem",
|
||||
+ .pm = &stm32_romem_pm_ops,
|
||||
.of_match_table = of_match_ptr(stm32_romem_of_match),
|
||||
},
|
||||
};
|
||||
diff --git a/include/linux/pm_wakeup.h b/include/linux/pm_wakeup.h
|
||||
index aa3da6611533..196a157456aa 100644
|
||||
index aa3da6611..196a15745 100644
|
||||
--- a/include/linux/pm_wakeup.h
|
||||
+++ b/include/linux/pm_wakeup.h
|
||||
@@ -84,6 +84,11 @@ static inline bool device_may_wakeup(struct device *dev)
|
||||
|
|
@ -421,7 +685,7 @@ index aa3da6611533..196a157456aa 100644
|
|||
|
||||
static inline void __pm_stay_awake(struct wakeup_source *ws) {}
|
||||
diff --git a/kernel/power/suspend.c b/kernel/power/suspend.c
|
||||
index 32391acc806b..dc800d4f5b9f 100644
|
||||
index 32391acc8..dc800d4f5 100644
|
||||
--- a/kernel/power/suspend.c
|
||||
+++ b/kernel/power/suspend.c
|
||||
@@ -34,7 +34,6 @@
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,23 +1,22 @@
|
|||
From 106f488712b412ed24f600c82febf95901c45054 Mon Sep 17 00:00:00 2001
|
||||
From: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
Date: Tue, 16 Mar 2021 09:03:42 +0100
|
||||
Subject: [PATCH 22/22] ARM 5.10.10-stm32mp1-r1 CONFIG
|
||||
From 3bf729d5673783f6e5d2414bb526be34c0a6dbd7 Mon Sep 17 00:00:00 2001
|
||||
From: Lionel Vitte <lionel.vitte@st.com>
|
||||
Date: Thu, 14 Oct 2021 16:51:57 +0200
|
||||
Subject: [PATCH 23/23] ARM 5.10.61-stm32mp1-r2 CONFIG
|
||||
|
||||
Signed-off-by: Romuald JEANNE <romuald.jeanne@st.com>
|
||||
---
|
||||
.../fragment-01-multiv7_cleanup.config | 374 ++++++++++++++++
|
||||
.../fragment-01-multiv7_cleanup.config | 382 +++++++++++++++++
|
||||
.../configs/fragment-02-multiv7_addons.config | 398 ++++++++++++++++++
|
||||
arch/arm/configs/multi_v7_defconfig | 5 +
|
||||
3 files changed, 777 insertions(+)
|
||||
3 files changed, 785 insertions(+)
|
||||
create mode 100644 arch/arm/configs/fragment-01-multiv7_cleanup.config
|
||||
create mode 100644 arch/arm/configs/fragment-02-multiv7_addons.config
|
||||
|
||||
diff --git a/arch/arm/configs/fragment-01-multiv7_cleanup.config b/arch/arm/configs/fragment-01-multiv7_cleanup.config
|
||||
new file mode 100644
|
||||
index 000000000000..0c5667237e27
|
||||
index 000000000..4ea7ae3bc
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/configs/fragment-01-multiv7_cleanup.config
|
||||
@@ -0,0 +1,374 @@
|
||||
@@ -0,0 +1,382 @@
|
||||
+#
|
||||
+# CPU Core family selection
|
||||
+#
|
||||
|
|
@ -392,9 +391,17 @@ index 000000000000..0c5667237e27
|
|||
+# CONFIG_DVB_CXD2099 is not set
|
||||
+# CONFIG_DVB_SP2 is not set
|
||||
+# end of Customise DVB Frontends
|
||||
+
|
||||
+# Remove Console display driver support
|
||||
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
|
||||
+
|
||||
+# Remove GCC plugins as not supported by GCC9.x
|
||||
+# To enable on GCC10
|
||||
+#
|
||||
+# CONFIG_GCC_PLUGINS is not set
|
||||
diff --git a/arch/arm/configs/fragment-02-multiv7_addons.config b/arch/arm/configs/fragment-02-multiv7_addons.config
|
||||
new file mode 100644
|
||||
index 000000000000..d6c1a48d5702
|
||||
index 000000000..d6c1a48d5
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/configs/fragment-02-multiv7_addons.config
|
||||
@@ -0,0 +1,398 @@
|
||||
|
|
@ -797,7 +804,7 @@ index 000000000000..d6c1a48d5702
|
|||
+CONFIG_TEE=y
|
||||
+CONFIG_OPTEE=y
|
||||
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
|
||||
index a611b0c1e540..abf1b17cb03a 100644
|
||||
index a611b0c1e..abf1b17cb 100644
|
||||
--- a/arch/arm/configs/multi_v7_defconfig
|
||||
+++ b/arch/arm/configs/multi_v7_defconfig
|
||||
@@ -829,6 +829,8 @@ CONFIG_USB_CONFIGFS_F_HID=y
|
||||
|
|
@ -7,40 +7,41 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
|
|||
include linux-stm32mp.inc
|
||||
|
||||
LINUX_VERSION = "5.10"
|
||||
LINUX_SUBVERSION = "10"
|
||||
LINUX_SUBVERSION = "61"
|
||||
LINUX_TARNAME = "linux-${LINUX_VERSION}.${LINUX_SUBVERSION}"
|
||||
SRC_URI = "https://cdn.kernel.org/pub/linux/kernel/v5.x/${LINUX_TARNAME}.tar.xz;name=kernel"
|
||||
#SRC_URI = "https://git.kernel.org/torvalds/t/linux-${LINUX_VERSION}-${LINUX_SUBVERSION}.tar.gz;name=kernel"
|
||||
|
||||
SRC_URI[kernel.sha256sum] = "60ed866fa951522a5255ea37ec3ac2006d3f3427d4783a13ef478464f37cdb19"
|
||||
SRC_URI[kernel.sha256sum] = "82eae38cc5cd11dd6aaac91c02ff0d006c7bafd6d4cf5c6a791930820a3a91d1"
|
||||
|
||||
SRC_URI += " \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0001-ARM-5.10.10-stm32mp1-r1-MACHINE.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0002-ARM-5.10.10-stm32mp1-r1-CLOCK.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0003-ARM-5.10.10-stm32mp1-r1-CPUFREQ.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0004-ARM-5.10.10-stm32mp1-r1-CRYPTO.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0005-ARM-5.10.10-stm32mp1-r1-DMA.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0006-ARM-5.10.10-stm32mp1-r1-DRM.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0007-ARM-5.10.10-stm32mp1-r1-HWSPINLOCK.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0008-ARM-5.10.10-stm32mp1-r1-I2C-IIO-IRQCHIP.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0009-ARM-5.10.10-stm32mp1-r1-MAILBOX-REMOTEPROC-RPMSG.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0010-ARM-5.10.10-stm32mp1-r1-MEDIA-SOC-THERMAL.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0011-ARM-5.10.10-stm32mp1-r1-MFD.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0012-ARM-5.10.10-stm32mp1-r1-MMC.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0013-ARM-5.10.10-stm32mp1-r1-NET-TTY.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0014-ARM-5.10.10-stm32mp1-r1-PERF.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0015-ARM-5.10.10-stm32mp1-r1-PHY-USB.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0016-ARM-5.10.10-stm32mp1-r1-PINCTRL-REGULATOR-SPI.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0017-ARM-5.10.10-stm32mp1-r1-RESET-RTC-WATCHDOG.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0018-ARM-5.10.10-stm32mp1-r1-SCMI.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0019-ARM-5.10.10-stm32mp1-r1-SOUND.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0020-ARM-5.10.10-stm32mp1-r1-MISC-CPUIDLE-POWER.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0021-ARM-5.10.10-stm32mp1-r1-DEVICETREE.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0022-ARM-5.10.10-stm32mp1-r1-CONFIG.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0001-ARM-5.10.61-stm32mp1-r2-MACHINE.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0002-ARM-5.10.61-stm32mp1-r2-CLOCK.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0003-ARM-5.10.61-stm32mp1-r2-CPUFREQ.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0004-ARM-5.10.61-stm32mp1-r2-CRYPTO.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0005-ARM-5.10.61-stm32mp1-r2-DMA.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0006-ARM-5.10.61-stm32mp1-r2-DRM.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0007-ARM-5.10.61-stm32mp1-r2-HWSPINLOCK.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0008-ARM-5.10.61-stm32mp1-r2-I2C-IIO-IRQCHIP.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0009-ARM-5.10.61-stm32mp1-r2-MAILBOX-REMOTEPROC-RPMSG.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0010-ARM-5.10.61-stm32mp1-r2-MEDIA-SOC-THERMAL.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0011-ARM-5.10.61-stm32mp1-r2-MFD.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0012-ARM-5.10.61-stm32mp1-r2-MMC.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0013-ARM-5.10.61-stm32mp1-r2-NET-TTY.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0014-ARM-5.10.61-stm32mp1-r2-PERF.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0015-ARM-5.10.61-stm32mp1-r2-PHY-USB.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0016-ARM-5.10.61-stm32mp1-r2-PINCTRL-REGULATOR-SPI.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0017-ARM-5.10.61-stm32mp1-r2-RESET-RTC-WATCHDOG.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0018-ARM-5.10.61-stm32mp1-r2-SCMI.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0019-ARM-5.10.61-stm32mp1-r2-SOUND.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0020-ARM-5.10.61-stm32mp1-r2-MISC.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0021-ARM-5.10.61-stm32mp1-r2-CPUIDLE-POWER.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0022-ARM-5.10.61-stm32mp1-r2-DEVICETREE.patch \
|
||||
file://${LINUX_VERSION}/${LINUX_VERSION}.${LINUX_SUBVERSION}/0023-ARM-5.10.61-stm32mp1-r2-CONFIG.patch \
|
||||
"
|
||||
|
||||
LINUX_TARGET = "stm32mp"
|
||||
LINUX_RELEASE = "r1"
|
||||
LINUX_RELEASE = "r2"
|
||||
|
||||
PV = "${LINUX_VERSION}.${LINUX_SUBVERSION}-${LINUX_TARGET}-${LINUX_RELEASE}"
|
||||
|
||||
|
|
@ -57,7 +58,7 @@ S = "${WORKDIR}/linux-${LINUX_VERSION}.${LINUX_SUBVERSION}"
|
|||
BBCLASSEXTEND = "devupstream:target"
|
||||
|
||||
SRC_URI_class-devupstream = "git://github.com/STMicroelectronics/linux.git;protocol=https;branch=${ARCHIVER_ST_BRANCH}"
|
||||
SRCREV_class-devupstream = "ce6891abb1c895d4849e6f784615687341b3dbde"
|
||||
SRCREV_class-devupstream = "64e6a220537c5cd7e8cc5b723ef09c6341388c98"
|
||||
|
||||
# ---------------------------------
|
||||
# Configure default preference to manage dynamic selection between tarball and github
|
||||
|
|
|
|||
Loading…
Reference in New Issue