Add U-Boot for stm32mp machine

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>

recipes-bsp/u-boot/u-boot-stm32mp/0004-ARM-v2018.11-stm32mp-r1-CONFIG.patch

@@ -0,0 +1,378 @@
+From b8317d14837ab109d5063c84a8cde6c6de474970 Mon Sep 17 00:00:00 2001
+From: christophe montaud <christophe.montaud@st.com>
+Date: Fri, 4 Jan 2019 15:08:43 +0100
+Subject: [PATCH 4/5] ARM v2018.11 stm32mp r1 CONFIG
+
+---
+ configs/sandbox_defconfig           |   2 +
+ configs/stm32mp15_basic_defconfig   |  71 ++++++++++++++++++++----
+ configs/stm32mp15_optee_defconfig   | 105 ++++++++++++++++++++++++++++++++++++
+ configs/stm32mp15_trusted_defconfig | 104 +++++++++++++++++++++++++++++++++++
+ 4 files changed, 273 insertions(+), 9 deletions(-)
+ create mode 100644 configs/stm32mp15_optee_defconfig
+ create mode 100644 configs/stm32mp15_trusted_defconfig
+
+diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
+index 5a744f4..587e2aa 100644
+--- a/configs/sandbox_defconfig
++++ b/configs/sandbox_defconfig
+@@ -215,3 +215,5 @@ CONFIG_UT_TIME=y
+ CONFIG_UT_DM=y
+ CONFIG_UT_ENV=y
+ CONFIG_UT_OVERLAY=y
++CONFIG_DM_HWSPINLOCK=y
++CONFIG_HWSPINLOCK_SANDBOX=y
+diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
+index 3bf7538..ad3424e 100644
+--- a/configs/stm32mp15_basic_defconfig
++++ b/configs/stm32mp15_basic_defconfig
+@@ -1,14 +1,18 @@
+ CONFIG_ARM=y
+ CONFIG_ARCH_STM32MP=y
+-CONFIG_SYS_MALLOC_F_LEN=0x2000
++CONFIG_SYS_MALLOC_F_LEN=0x3000
+ CONFIG_SPL_MMC_SUPPORT=y
+ CONFIG_SPL=y
+ CONFIG_TARGET_STM32MP1=y
++CONFIG_SPL_SPI_FLASH_SUPPORT=y
++CONFIG_SPL_SPI_SUPPORT=y
++# CONFIG_ARMV7_VIRT is not set
+ CONFIG_DISTRO_DEFAULTS=y
+-CONFIG_NR_DRAM_BANKS=1
++CONFIG_FIT=y
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
+ CONFIG_SPL_I2C_SUPPORT=y
++CONFIG_SPL_MTD_SUPPORT=y
+ CONFIG_SPL_POWER_SUPPORT=y
+ CONFIG_SYS_PROMPT="STM32MP> "
+ # CONFIG_CMD_BOOTD is not set
+@@ -18,48 +22,97 @@ CONFIG_SYS_PROMPT="STM32MP> "
+ # CONFIG_CMD_EXPORTENV is not set
+ # CONFIG_CMD_IMPORTENV is not set
+ CONFIG_CMD_MEMINFO=y
++CONFIG_CMD_MEMTEST=y
+ CONFIG_CMD_ADC=y
++CONFIG_CMD_CLK=y
++CONFIG_CMD_DFU=y
+ CONFIG_CMD_FUSE=y
+ CONFIG_CMD_GPIO=y
+-CONFIG_CMD_GPT=y
+ CONFIG_CMD_I2C=y
+ CONFIG_CMD_MMC=y
++CONFIG_CMD_REMOTEPROC=y
++CONFIG_CMD_SF=y
+ CONFIG_CMD_USB=y
+ CONFIG_CMD_USB_MASS_STORAGE=y
++CONFIG_CMD_BMP=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_TIME=y
++CONFIG_CMD_TIMER=y
+ CONFIG_CMD_PMIC=y
+ CONFIG_CMD_REGULATOR=y
+ CONFIG_CMD_EXT4_WRITE=y
++CONFIG_CMD_MTDPARTS=y
++CONFIG_CMD_UBI=y
+ # CONFIG_SPL_DOS_PARTITION is not set
+ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
+ CONFIG_STM32_ADC=y
++CONFIG_USB_FUNCTION_FASTBOOT=y
++CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
++CONFIG_FASTBOOT_BUF_SIZE=0x02000000
++CONFIG_FASTBOOT_USB_DEV=1
++CONFIG_FASTBOOT_FLASH=y
++CONFIG_FASTBOOT_FLASH_MMC_DEV=1
++CONFIG_DM_HWSPINLOCK=y
++CONFIG_HWSPINLOCK_STM32=y
+ CONFIG_DM_I2C=y
+ CONFIG_SYS_I2C_STM32F7=y
+ CONFIG_LED=y
+ CONFIG_LED_GPIO=y
++CONFIG_DM_MAILBOX=y
++CONFIG_STM32_IPCC=y
+ CONFIG_DM_MMC=y
+ CONFIG_STM32_SDMMC2=y
++CONFIG_MTD=y
++CONFIG_NAND=y
++CONFIG_NAND_STM32_FMC2=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH=y
++CONFIG_SPI_FLASH_BAR=y
++CONFIG_SPI_FLASH_MACRONIX=y
++CONFIG_SPI_FLASH_SPANSION=y
++CONFIG_SPI_FLASH_STMICRO=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_PHY_FIXED=y
++CONFIG_DM_ETH=y
++CONFIG_DWC_ETH_QOS=y
+ CONFIG_PHY=y
+ CONFIG_PHY_STM32_USBPHYC=y
+-# CONFIG_PINCTRL_FULL is not set
++CONFIG_PINCONF=y
+ # CONFIG_SPL_PINCTRL_FULL is not set
++CONFIG_PINCTRL_STMFX=y
+ CONFIG_DM_PMIC=y
+ # CONFIG_SPL_PMIC_CHILDREN is not set
+-CONFIG_PMIC_STPMU1=y
++CONFIG_PMIC_STPMIC1=y
+ CONFIG_DM_REGULATOR_FIXED=y
+ CONFIG_DM_REGULATOR_GPIO=y
+ CONFIG_DM_REGULATOR_STM32_VREFBUF=y
+-CONFIG_DM_REGULATOR_STPMU1=y
++CONFIG_DM_REGULATOR_STPMIC1=y
++CONFIG_STM32MP1_DDR_INTERACTIVE=y
++CONFIG_REMOTEPROC_STM32_COPRO=y
+ CONFIG_SERIAL_RX_BUFFER=y
+-CONFIG_STM32_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
++CONFIG_STM32_QSPI=y
+ CONFIG_USB=y
+ CONFIG_DM_USB=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_GENERIC=y
+-CONFIG_USB_DWC2=y
+ CONFIG_USB_STORAGE=y
+ CONFIG_USB_GADGET=y
+ CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
+ CONFIG_USB_GADGET_VENDOR_NUM=0x0483
+ CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
+ CONFIG_USB_GADGET_DWC2_OTG=y
+-CONFIG_USB_GADGET_DOWNLOAD=y
++CONFIG_DM_VIDEO=y
++CONFIG_BACKLIGHT_GPIO=y
++CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
++CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
++CONFIG_VIDEO_STM32=y
++CONFIG_VIDEO_STM32_DSI=y
++CONFIG_VIDEO_STM32_MAX_XRES=1280
++CONFIG_VIDEO_STM32_MAX_YRES=800
++CONFIG_STM32MP_WATCHDOG=y
++CONFIG_FDT_FIXUP_PARTITIONS=y
++# CONFIG_EFI_LOADER is not set
+diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig
+new file mode 100644
+index 0000000..a24727c
+--- /dev/null
++++ b/configs/stm32mp15_optee_defconfig
+@@ -0,0 +1,105 @@
++CONFIG_ARM=y
++CONFIG_ARCH_STM32MP=y
++CONFIG_SYS_MALLOC_F_LEN=0x3000
++CONFIG_TARGET_STM32MP1=y
++CONFIG_STM32MP1_OPTEE=y
++CONFIG_DISTRO_DEFAULTS=y
++CONFIG_FIT=y
++CONFIG_SYS_PROMPT="STM32MP> "
++# CONFIG_CMD_BOOTD is not set
++# CONFIG_CMD_ELF is not set
++# CONFIG_CMD_IMI is not set
++# CONFIG_CMD_XIMG is not set
++# CONFIG_CMD_EXPORTENV is not set
++# CONFIG_CMD_IMPORTENV is not set
++CONFIG_CMD_MEMINFO=y
++CONFIG_CMD_MEMTEST=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_CLK=y
++CONFIG_CMD_DFU=y
++CONFIG_CMD_FUSE=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_REMOTEPROC=y
++CONFIG_CMD_SF=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_USB_MASS_STORAGE=y
++CONFIG_CMD_BMP=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_TIME=y
++CONFIG_CMD_TIMER=y
++CONFIG_CMD_PMIC=y
++CONFIG_CMD_REGULATOR=y
++CONFIG_CMD_EXT4_WRITE=y
++CONFIG_CMD_MTDPARTS=y
++CONFIG_CMD_UBI=y
++CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
++CONFIG_STM32_ADC=y
++CONFIG_USB_FUNCTION_FASTBOOT=y
++CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
++CONFIG_FASTBOOT_BUF_SIZE=0x02000000
++CONFIG_FASTBOOT_USB_DEV=1
++CONFIG_FASTBOOT_FLASH=y
++CONFIG_FASTBOOT_FLASH_MMC_DEV=1
++CONFIG_DM_HWSPINLOCK=y
++CONFIG_HWSPINLOCK_STM32=y
++CONFIG_DM_I2C=y
++CONFIG_SYS_I2C_STM32F7=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
++CONFIG_DM_MAILBOX=y
++CONFIG_STM32_IPCC=y
++CONFIG_DM_MMC=y
++CONFIG_STM32_SDMMC2=y
++CONFIG_MTD=y
++CONFIG_NAND=y
++CONFIG_NAND_STM32_FMC2=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH=y
++CONFIG_SPI_FLASH_BAR=y
++CONFIG_SPI_FLASH_MACRONIX=y
++CONFIG_SPI_FLASH_SPANSION=y
++CONFIG_SPI_FLASH_STMICRO=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_PHY_FIXED=y
++CONFIG_DM_ETH=y
++CONFIG_DWC_ETH_QOS=y
++CONFIG_PHY=y
++CONFIG_PHY_STM32_USBPHYC=y
++CONFIG_PINCONF=y
++CONFIG_PINCTRL_STMFX=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_STPMIC1=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_REGULATOR_STM32_VREFBUF=y
++CONFIG_DM_REGULATOR_STPMIC1=y
++CONFIG_REMOTEPROC_STM32_COPRO=y
++CONFIG_SERIAL_RX_BUFFER=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
++CONFIG_STM32_QSPI=y
++CONFIG_USB=y
++CONFIG_DM_USB=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_STORAGE=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
++CONFIG_USB_GADGET_VENDOR_NUM=0x0483
++CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
++CONFIG_USB_GADGET_DWC2_OTG=y
++CONFIG_DM_VIDEO=y
++CONFIG_BACKLIGHT_GPIO=y
++CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
++CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
++CONFIG_VIDEO_STM32=y
++CONFIG_VIDEO_STM32_DSI=y
++CONFIG_VIDEO_STM32_MAX_XRES=1280
++CONFIG_VIDEO_STM32_MAX_YRES=800
++CONFIG_STM32MP_WATCHDOG=y
++CONFIG_FDT_FIXUP_PARTITIONS=y
++# CONFIG_EFI_LOADER is not set
+diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
+new file mode 100644
+index 0000000..e41506b
+--- /dev/null
++++ b/configs/stm32mp15_trusted_defconfig
+@@ -0,0 +1,104 @@
++CONFIG_ARM=y
++CONFIG_ARCH_STM32MP=y
++CONFIG_SYS_MALLOC_F_LEN=0x3000
++CONFIG_TARGET_STM32MP1=y
++CONFIG_DISTRO_DEFAULTS=y
++CONFIG_FIT=y
++CONFIG_SYS_PROMPT="STM32MP> "
++# CONFIG_CMD_BOOTD is not set
++# CONFIG_CMD_ELF is not set
++# CONFIG_CMD_IMI is not set
++# CONFIG_CMD_XIMG is not set
++# CONFIG_CMD_EXPORTENV is not set
++# CONFIG_CMD_IMPORTENV is not set
++CONFIG_CMD_MEMINFO=y
++CONFIG_CMD_MEMTEST=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_CLK=y
++CONFIG_CMD_DFU=y
++CONFIG_CMD_FUSE=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_REMOTEPROC=y
++CONFIG_CMD_SF=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_USB_MASS_STORAGE=y
++CONFIG_CMD_BMP=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_TIME=y
++CONFIG_CMD_TIMER=y
++CONFIG_CMD_PMIC=y
++CONFIG_CMD_REGULATOR=y
++CONFIG_CMD_EXT4_WRITE=y
++CONFIG_CMD_MTDPARTS=y
++CONFIG_CMD_UBI=y
++CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
++CONFIG_STM32_ADC=y
++CONFIG_USB_FUNCTION_FASTBOOT=y
++CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
++CONFIG_FASTBOOT_BUF_SIZE=0x02000000
++CONFIG_FASTBOOT_USB_DEV=1
++CONFIG_FASTBOOT_FLASH=y
++CONFIG_FASTBOOT_FLASH_MMC_DEV=1
++CONFIG_DM_HWSPINLOCK=y
++CONFIG_HWSPINLOCK_STM32=y
++CONFIG_DM_I2C=y
++CONFIG_SYS_I2C_STM32F7=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
++CONFIG_DM_MAILBOX=y
++CONFIG_STM32_IPCC=y
++CONFIG_DM_MMC=y
++CONFIG_STM32_SDMMC2=y
++CONFIG_MTD=y
++CONFIG_NAND=y
++CONFIG_NAND_STM32_FMC2=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH=y
++CONFIG_SPI_FLASH_BAR=y
++CONFIG_SPI_FLASH_MACRONIX=y
++CONFIG_SPI_FLASH_SPANSION=y
++CONFIG_SPI_FLASH_STMICRO=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_PHY_FIXED=y
++CONFIG_DM_ETH=y
++CONFIG_DWC_ETH_QOS=y
++CONFIG_PHY=y
++CONFIG_PHY_STM32_USBPHYC=y
++CONFIG_PINCONF=y
++CONFIG_PINCTRL_STMFX=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_STPMIC1=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_REGULATOR_STM32_VREFBUF=y
++CONFIG_DM_REGULATOR_STPMIC1=y
++CONFIG_REMOTEPROC_STM32_COPRO=y
++CONFIG_SERIAL_RX_BUFFER=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
++CONFIG_STM32_QSPI=y
++CONFIG_USB=y
++CONFIG_DM_USB=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_STORAGE=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
++CONFIG_USB_GADGET_VENDOR_NUM=0x0483
++CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
++CONFIG_USB_GADGET_DWC2_OTG=y
++CONFIG_DM_VIDEO=y
++CONFIG_BACKLIGHT_GPIO=y
++CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
++CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
++CONFIG_VIDEO_STM32=y
++CONFIG_VIDEO_STM32_DSI=y
++CONFIG_VIDEO_STM32_MAX_XRES=1280
++CONFIG_VIDEO_STM32_MAX_YRES=800
++CONFIG_STM32MP_WATCHDOG=y
++CONFIG_FDT_FIXUP_PARTITIONS=y
++# CONFIG_EFI_LOADER is not set
+-- 
+2.7.4
+

recipes-bsp/u-boot/u-boot-stm32mp/0006-ARM-v2018.11-stm32mp-r2-MACHINE.patch

@@ -0,0 +1,237 @@
+From 761f1ccf48cd083baa2bf3a120f8f1da993af217 Mon Sep 17 00:00:00 2001
+From: christophe montaud <christophe.montaud@st.com>
+Date: Mon, 28 Jan 2019 11:04:22 +0100
+Subject: [PATCH 6/8] ARM v2018.11 stm32mp r2 MACHINE
+
+---
+ arch/arm/mach-stm32mp/Kconfig                      |  13 +++
+ arch/arm/mach-stm32mp/Makefile                     |   1 +
+ .../arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c |  22 ++++
+ arch/arm/mach-stm32mp/include/mach/stm32.h         |   3 +
+ arch/arm/mach-stm32mp/stm32mp1_helper_dgb.S        | 124 +++++++++++++++++++++
+ 5 files changed, 163 insertions(+)
+ create mode 100644 arch/arm/mach-stm32mp/stm32mp1_helper_dgb.S
+
+diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
+index 0c68c24..fbc8195 100644
+--- a/arch/arm/mach-stm32mp/Kconfig
++++ b/arch/arm/mach-stm32mp/Kconfig
+@@ -47,6 +47,19 @@ config TARGET_STM32MP1
+ 		STMicroelectronics MPU with core ARMv7
+ 		dual core A7 for STM32MP153, monocore for STM32MP151
+ 
++config STM32MP1_RESET_HALT_WORKAROUND
++	bool "workaround for reset halt deubg on stm32mp15x"
++	depends on TARGET_STM32MP1
++	default y
++	help
++		Activate a workaround for current STM32MP15x revision B
++		limitation on debug reset halt not handle by ROM code:
++		add a delay loop early in the SPL boot process to wait for
++		the debugger to attach
++		it can be removed when using the Soc revision
++		that fixes the limitation.
++
++
+ config STM32MP1_TRUSTED
+ 	bool "Support trusted boot with TF-A"
+ 	default y if !SPL
+diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
+index 09636db..c67bcce 100644
+--- a/arch/arm/mach-stm32mp/Makefile
++++ b/arch/arm/mach-stm32mp/Makefile
+@@ -9,6 +9,7 @@ obj-y += syscon.o
+ 
+ ifdef CONFIG_SPL_BUILD
+ obj-y += spl.o
++obj-$(CONFIG_STM32MP1_RESET_HALT_WORKAROUND) += stm32mp1_helper_dgb.o
+ else
+ obj-$(CONFIG_CMD_STM32PROG) += cmd_stm32prog/
+ obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o
+diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
+index d1c07dc..a6ee0f2 100644
+--- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
++++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
+@@ -10,6 +10,26 @@
+ 
+ DECLARE_GLOBAL_DATA_PTR;
+ 
++static void enable_vidconsole(void)
++{
++#ifdef CONFIG_DM_VIDEO
++	char *stdname;
++	char buf[64];
++
++	stdname = env_get("stdout");
++	if (!strstr(stdname, "vidconsole")) {
++		snprintf(buf, sizeof(buf), "%s,vidconsole", stdname);
++		env_set("stdout", buf);
++	}
++
++	stdname = env_get("stderr");
++	if (!strstr(stdname, "vidconsole")) {
++		snprintf(buf, sizeof(buf), "%s,vidconsole", stdname);
++		env_set("stderr", buf);
++	}
++#endif
++}
++
+ static int do_stm32prog(cmd_tbl_t *cmdtp, int flag, int argc,
+ 			char * const argv[])
+ {
+@@ -44,6 +64,8 @@ static int do_stm32prog(cmd_tbl_t *cmdtp, int flag, int argc,
+ 	if (argc > 4)
+ 		size = simple_strtoul(argv[4], NULL, 16);
+ 
++	enable_vidconsole();
++
+ 	data = stm32prog_init(link, dev, addr, size);
+ 	if (!data)
+ 		return CMD_RET_FAILURE;
+diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
+index 4147873..36b885b 100644
+--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
++++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
+@@ -35,6 +35,9 @@
+ #define STM32_DDR_BASE			0xC0000000
+ #define STM32_DDR_SIZE			SZ_1G
+ 
++#define STM32_RETRAM_BASE		0x38000000
++#define STM32_RETRAM_SIZE		0x00010000
++
+ #ifndef __ASSEMBLY__
+ #include <asm/types.h>
+ 
+diff --git a/arch/arm/mach-stm32mp/stm32mp1_helper_dgb.S b/arch/arm/mach-stm32mp/stm32mp1_helper_dgb.S
+new file mode 100644
+index 0000000..29f8e1f
+--- /dev/null
++++ b/arch/arm/mach-stm32mp/stm32mp1_helper_dgb.S
+@@ -0,0 +1,124 @@
++/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
++/*
++ * Copyright (c) 2019, STMicroelectronics - All Rights Reserved
++ *
++ */
++
++/*****************************************************************************
++ * This file is only needed for current Soc revision which has a limitation on
++ * debug reset halt. This can be removed when using the Soc revision that
++ * fixes the limitation. Anyway, this source code identifies the Soc revision
++ * and is only executed if it corresponds, so it can be kept on other
++ * revisions without any consequence.
++ ****************************************************************************/
++
++#include <linux/linkage.h>
++#include <asm/macro.h>
++
++#define BIT(nr)				(1 << (nr))
++
++#define DBG_DSCR_ADDR			0x500D0088
++#define DBG_DSCR_HDBGEN			BIT(14)
++
++#define RCC_DBGCFGR_ADDR		0x5000080C
++#define RCC_DBGCFGR_DBGCKEN		BIT(8)
++
++#define PWR_CR1_ADDR			0x50001000
++#define PWR_CR1_DBP			BIT(8)
++
++#define DBGMCU_IDC_ADDR			0x50081000
++#define DBGMCU_IDC_MASK			0xFFFF0FFF
++#define DBGMCU_IDC_VALUE		0x20000500
++
++#define TAMP_BKP_REGISTER_20		(0x5C00A100 + (20 << 2))
++
++
++	.globl	save_boot_params
++
++ENTRY(save_boot_params)
++	/*
++	 * This function is the first call after reset.
++	 * Boot rom parameters are stored in r0..r3, so we mustn't use them
++	 * here. And because they are saved in r9..r12 just after the
++	 * execution of this function, we should firstly use these registers.
++	 * And then, if more registers needed, we have to start by using
++	 * r8, and then r7 and so on. By this way, debug will be done in
++	 * conditions closed to the initial context.
++	 */
++
++	/* Check Soc revision */
++	ldr	r12, =RCC_DBGCFGR_ADDR
++	ldr	r11, [r12]		/* read RCC_DBGCFGR (r11) */
++	orr	r10, r11, #RCC_DBGCFGR_DBGCKEN
++	str	r10, [r12]		/* update RCC_DBGCFGR */
++	ldr	r10, =DBGMCU_IDC_ADDR
++	ldr	r10, [r10]		/* read DBGMCU_IDC (r10) */
++	str	r11, [r12]		/* restore RCC_DBGCFGR (r11) */
++	ldr	r12, =DBGMCU_IDC_MASK
++	and	r10, r12		/* mask reserved bits */
++	ldr	r11, =DBGMCU_IDC_VALUE
++	teq	r10, r11		/* test DBGMCU_IDC */
++	bne	func_exit
++
++	/* Disable the backup domain write protection */
++	ldr	r12, =PWR_CR1_ADDR
++	ldr	r11, [r12]
++	orr	r11, r11, #PWR_CR1_DBP
++	str	r11, [r12]
++poll_dbp:
++	ldr	r11, [r12]
++	tst	r11, #PWR_CR1_DBP
++	beq	poll_dbp
++
++	/* Clear tamper 20 bit 16 if set */
++	ldr	r12, =TAMP_BKP_REGISTER_20
++	ldr	r11, [r12]
++	tst	r11, #(BIT(16))
++	beq	func_exit
++	bic	r11, #(BIT(16))
++	str	r11, [r12]
++
++	/* Re-enable the backup domain write protection */
++	ldr	r12, =PWR_CR1_ADDR
++	ldr	r11, [r12]
++	bic	r11, #PWR_CR1_DBP
++	str	r11, [r12]
++poll_dbp_2:
++	ldr	r11, [r12]
++	tst	r11, #PWR_CR1_DBP
++	bne	poll_dbp_2
++
++	/* Get current time + 1 second */
++	/* CNTFRQ */
++	mrc	p15, 0, r12, c14, c0, 0
++	/* CNTPCT_64 */
++	mrrc	p15, 0, r11, r10, c14
++	add	r12, r12, r11
++
++loop:
++	/* Check A7 DBG_DSCR HDBGEN bit value */
++	ldr	r10, =DBG_DSCR_ADDR
++	ldr	r10, [r10]
++	tst	r10, #DBG_DSCR_HDBGEN
++	beq	loop_continue
++	/* Sw break */
++	bkpt	5
++	/* Jump entrypoint */
++	b	reset
++loop_continue:
++	/* Check 1 second expiration */
++	mrrc	p15, 0, r10, r9, c14
++	/* Check if MSB 64-bit increment needed */
++	cmp	r12, r11
++	bmi	msb_incr
++	cmp	r12, r10
++	bmi	func_exit
++	b	loop
++msb_incr:
++	cmp	r12, r10
++	bpl	loop
++	cmp	r11, r10
++	bmi	loop
++func_exit:
++	b	save_boot_params_ret
++ENDPROC(save_boot_params)
+-- 
+2.7.4
+

recipes-bsp/u-boot/u-boot-stm32mp/0008-ARM-v2018.11-stm32mp-r2-MISC.patch

@@ -0,0 +1,290 @@
+From 8db9dfe442ded4ec2d320d61a5b92d9bc1c771d4 Mon Sep 17 00:00:00 2001
+From: christophe montaud <christophe.montaud@st.com>
+Date: Mon, 28 Jan 2019 11:07:22 +0100
+Subject: [PATCH 8/8] ARM v2018.11 stm32mp r2 MISC
+
+---
+ Makefile                          |  2 +-
+ drivers/remoteproc/rproc-uclass.c | 10 +++++++--
+ drivers/remoteproc/stm32_copro.c  | 44 +++++++++++++++------------------------
+ drivers/video/stm32/stm32_dsi.c   | 41 ++++++++++++++++++++++--------------
+ 4 files changed, 51 insertions(+), 46 deletions(-)
+
+diff --git a/Makefile b/Makefile
+index 84cb372..693ffae 100644
+--- a/Makefile
++++ b/Makefile
+@@ -3,7 +3,7 @@
+ VERSION = 2018
+ PATCHLEVEL = 11
+ SUBLEVEL =
+-EXTRAVERSION = -stm32mp-r1
++EXTRAVERSION = -stm32mp-r2
+ NAME =
+ 
+ # *DOCUMENTATION*
+diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c
+index 8ea92f7..204e6e8 100644
+--- a/drivers/remoteproc/rproc-uclass.c
++++ b/drivers/remoteproc/rproc-uclass.c
+@@ -449,7 +449,10 @@ static int rproc_load_elf_image(struct udevice *dev, unsigned long addr,
+ 		if (phdr->p_filesz != phdr->p_memsz)
+ 			memset(dst + phdr->p_filesz, 0x00,
+ 			       phdr->p_memsz - phdr->p_filesz);
+-		flush_cache((unsigned long)dst, phdr->p_filesz);
++		flush_cache(rounddown((int)dst, ARCH_DMA_MINALIGN),
++			    roundup((int)dst + phdr->p_filesz,
++				    ARCH_DMA_MINALIGN) -
++			    rounddown((int)dst, ARCH_DMA_MINALIGN));
+ 		++phdr;
+ 	}
+ 
+@@ -561,7 +564,10 @@ static int rproc_elf_find_load_rsc_table(struct udevice *dev,
+ 	src = (void *)fw_addr + shdr->sh_offset;
+ 
+ 	memcpy(dst, src, shdr->sh_size);
+-	flush_cache((unsigned long)dst, shdr->sh_size);
++	flush_cache(rounddown((int)dst, ARCH_DMA_MINALIGN),
++		    roundup((int)dst + shdr->sh_size,
++			    ARCH_DMA_MINALIGN) -
++		    rounddown((int)dst, ARCH_DMA_MINALIGN));
+ 
+ 	return 0;
+ }
+diff --git a/drivers/remoteproc/stm32_copro.c b/drivers/remoteproc/stm32_copro.c
+index 310d077..44230ff 100644
+--- a/drivers/remoteproc/stm32_copro.c
++++ b/drivers/remoteproc/stm32_copro.c
+@@ -18,7 +18,6 @@
+ 
+ /**
+  * struct stm32_copro_privdata - power processor private data
+- * @loadaddr:	base address for loading the power processor
+  * @reset_ctl:	reset controller handle
+  * @hold_boot_regmap
+  * @hold_boot_offset
+@@ -26,7 +25,6 @@
+  * @secured_soc:	TZEN flag (register protection)
+  */
+ struct stm32_copro_privdata {
+-	phys_addr_t loadaddr;
+ 	struct reset_ctl reset_ctl;
+ 	struct regmap *hold_boot_regmap;
+ 	uint hold_boot_offset;
+@@ -46,21 +44,9 @@ static int st_of_to_priv(struct udevice *dev,
+ {
+ 	struct regmap *regmap;
+ 	const fdt32_t *cell;
+-	const void *blob = gd->fdt_blob;
+ 	uint tz_offset, tz_mask, tzen;
+ 	int len, ret;
+ 
+-	if (!blob) {
+-		dev_dbg(dev, "no dt?\n");
+-		return -EINVAL;
+-	}
+-
+-	priv->loadaddr = dev_read_addr(dev);
+-	if (priv->loadaddr == FDT_ADDR_T_NONE) {
+-		dev_dbg(dev, "no 'reg' property\n");
+-		return -EINVAL;
+-	}
+-
+ 	regmap = syscon_phandle_to_regmap(dev, "st,syscfg-holdboot");
+ 	if (IS_ERR(regmap)) {
+ 		dev_dbg(dev, "unable to find holdboot regmap (%ld)\n",
+@@ -123,8 +109,7 @@ static int stm32_copro_probe(struct udevice *dev)
+ 
+ 	ret = st_of_to_priv(dev, priv);
+ 
+-	dev_dbg(dev, "probed with slave_addr=0x%08lX (%d)\n",
+-		priv->loadaddr, ret);
++	dev_dbg(dev, "probed (%d)\n", ret);
+ 
+ 	return ret;
+ }
+@@ -163,6 +148,17 @@ static int stm32_copro_set_hold_boot(struct udevice *dev, bool hold)
+ 	return ret;
+ }
+ 
++static ulong stm32_copro_da_to_pa(struct udevice *dev, ulong da)
++{
++	/* to update with address translate by DT range  */
++
++	/* CM4 boot at address 0x0 = RETRAM alias, not available for CA7 load */
++	if (da >= 0 && da < STM32_RETRAM_SIZE)
++		return (da + STM32_RETRAM_BASE);
++
++	return da;
++}
++
+ /**
+  * stm32_copro_load() - Loadup the STM32 Cortex-M4 remote processor
+  * @dev:	corresponding STM32 remote processor device
+@@ -174,6 +170,7 @@ static int stm32_copro_set_hold_boot(struct udevice *dev, bool hold)
+ static int stm32_copro_load(struct udevice *dev, ulong addr, ulong size)
+ {
+ 	struct stm32_copro_privdata *priv;
++	phys_addr_t loadaddr;
+ 	int ret;
+ 
+ 	priv = dev_get_priv(dev);
+@@ -186,10 +183,12 @@ static int stm32_copro_load(struct udevice *dev, ulong addr, ulong size)
+ 		return ret;
+ 	}
+ 
++	/* by default load for copro BOOT address = 0x0 */
++	loadaddr = stm32_copro_da_to_pa(dev, 0x0);
+ 	dev_dbg(dev, "Loading binary from 0x%08lX, size 0x%08lX to 0x%08lX\n",
+-		addr, size, priv->loadaddr);
++		addr, size, loadaddr);
+ 
+-	memcpy((void *)priv->loadaddr, (void *)addr, size);
++	memcpy((void *)loadaddr, (void *)addr, size);
+ 
+ 	dev_dbg(dev, "Complete!\n");
+ 	return 0;
+@@ -241,15 +240,6 @@ static int stm32_copro_reset(struct udevice *dev)
+ 	return 0;
+ }
+ 
+-ulong stm32_copro_da_to_pa(struct udevice *dev, ulong da)
+-{
+-	/* to update according to lastest DT */
+-	if (da >= 0 && da < 0x10000)
+-		return (da + 0x38000000);
+-
+-	return da;
+-}
+-
+ static const struct dm_rproc_ops stm32_copro_ops = {
+ 	.load = stm32_copro_load,
+ 	.start = stm32_copro_start,
+diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
+index 09266fe..f8f7c83 100644
+--- a/drivers/video/stm32/stm32_dsi.c
++++ b/drivers/video/stm32/stm32_dsi.c
+@@ -242,7 +242,6 @@ static int dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
+ 	u32 val;
+ 
+ 	/* Update lane capabilities according to hw version */
+-	dsi->hw_version = dsi_read(dsi, DSI_VERSION) & VERSION;
+ 	dsi->lane_min_kbps = LANE_MIN_KBPS;
+ 	dsi->lane_max_kbps = LANE_MAX_KBPS;
+ 	if (dsi->hw_version == HWVER_131) {
+@@ -310,9 +309,9 @@ static const struct dw_mipi_dsi_phy_ops dw_mipi_dsi_stm_phy_ops = {
+ 
+ static int stm32_dsi_attach(struct udevice *dev)
+ {
+-	struct stm32_dsi_priv *priv = dev_get_priv(dev);
++	struct stm32_dsi_priv *dsi = dev_get_priv(dev);
+ 	struct dw_mipi_dsi_plat_data *platdata = dev_get_platdata(dev);
+-	struct mipi_dsi_device *device = &priv->device;
++	struct mipi_dsi_device *device = &dsi->device;
+ 	int ret;
+ 
+ 	platdata->max_data_lanes = 2;
+@@ -336,8 +335,8 @@ static int stm32_dsi_attach(struct udevice *dev)
+ static int stm32_dsi_set_backlight(struct udevice *dev, int percent)
+ {
+ 	struct dw_mipi_dsi_plat_data *dplat = dev_get_platdata(dev);
+-	struct stm32_dsi_priv *priv = dev_get_priv(dev);
+-	struct mipi_dsi_device *device = &priv->device;
++	struct stm32_dsi_priv *dsi = dev_get_priv(dev);
++	struct mipi_dsi_device *device = &dsi->device;
+ 	struct udevice *panel = dplat->panel;
+ 	struct mipi_dsi_panel_plat *mplat;
+ 	int ret;
+@@ -359,29 +358,29 @@ static int stm32_dsi_set_backlight(struct udevice *dev, int percent)
+ 
+ static int stm32_dsi_probe(struct udevice *dev)
+ {
+-	struct stm32_dsi_priv *priv = dev_get_priv(dev);
+-	struct mipi_dsi_device *device = &priv->device;
++	struct stm32_dsi_priv *dsi = dev_get_priv(dev);
++	struct mipi_dsi_device *device = &dsi->device;
+ 	struct reset_ctl rst;
+ 	struct clk clk;
+ 	int ret;
+ 
+ 	device->dev = dev;
+ 
+-	priv->base = (void *)dev_read_addr(dev);
+-	if ((fdt_addr_t)priv->base == FDT_ADDR_T_NONE) {
++	dsi->base = (void *)dev_read_addr(dev);
++	if ((fdt_addr_t)dsi->base == FDT_ADDR_T_NONE) {
+ 		dev_err(dev, "dsi dt register address error\n");
+ 		return -EINVAL;
+ 	}
+ 
+ 	if (IS_ENABLED(CONFIG_DM_REGULATOR)) {
+ 		ret =  device_get_supply_regulator(dev, "phy-dsi-supply",
+-						   &priv->vdd_reg);
++						   &dsi->vdd_reg);
+ 		if (ret && ret != -ENOENT) {
+ 			dev_err(dev, "Warning: cannot get phy dsi supply\n");
+ 			return -ENODEV;
+ 		}
+ 
+-		ret = regulator_set_enable(priv->vdd_reg, true);
++		ret = regulator_set_enable(dsi->vdd_reg, true);
+ 		if (ret)
+ 			return -ENODEV;
+ 	}
+@@ -389,14 +388,14 @@ static int stm32_dsi_probe(struct udevice *dev)
+ 	ret = clk_get_by_name(device->dev, "pclk", &clk);
+ 	if (ret) {
+ 		dev_err(dev, "peripheral clock get error %d\n", ret);
+-		regulator_set_enable(priv->vdd_reg, false);
++		regulator_set_enable(dsi->vdd_reg, false);
+ 		return -ENODEV;
+ 	}
+ 
+ 	ret = clk_enable(&clk);
+ 	if (ret) {
+ 		dev_err(dev, "peripheral clock enable error %d\n", ret);
+-		regulator_set_enable(priv->vdd_reg, false);
++		regulator_set_enable(dsi->vdd_reg, false);
+ 		return -ENODEV;
+ 	}
+ 
+@@ -404,23 +403,33 @@ static int stm32_dsi_probe(struct udevice *dev)
+ 	if (ret) {
+ 		dev_err(dev, "pll reference clock get error %d\n", ret);
+ 		clk_disable(&clk);
+-		regulator_set_enable(priv->vdd_reg, false);
++		regulator_set_enable(dsi->vdd_reg, false);
+ 		return ret;
+ 	}
+ 
+-	priv->pllref_clk = (unsigned int)clk_get_rate(&clk);
++	dsi->pllref_clk = (unsigned int)clk_get_rate(&clk);
+ 
+ 	ret = reset_get_by_index(device->dev, 0, &rst);
+ 	if (ret) {
+ 		dev_err(dev, "missing dsi hardware reset\n");
+ 		clk_disable(&clk);
+-		regulator_set_enable(priv->vdd_reg, false);
++		regulator_set_enable(dsi->vdd_reg, false);
+ 		return -ENODEV;
+ 	}
+ 
+ 	/* Reset */
+ 	reset_deassert(&rst);
+ 
++	/* check hardware version */
++	dsi->hw_version = dsi_read(dsi, DSI_VERSION) & VERSION;
++	if (dsi->hw_version != HWVER_130 &&
++	    dsi->hw_version != HWVER_131) {
++		dev_err(dev, "bad dsi hardware version\n");
++		clk_disable(&clk);
++		regulator_set_enable(dsi->vdd_reg, false);
++		return -ENODEV;
++	}
++
+ 	return 0;
+ }
+ 
+-- 
+2.7.4
+

recipes-bsp/u-boot/u-boot-stm32mp/README.HOW_TO.txt

@@ -0,0 +1,183 @@
+Compilation of U-Boot:
+1. Pre-requisite
+2. Initialise cross-compilation via SDK
+3. Prepare U-Boot source code
+4. Management of U-Boot source code
+5. Compile U-Boot source code
+6. Update software on board
+
+1. Pre-requisite:
+-----------------
+OpenSTLinux SDK must be installed.
+
+For U-Boot build you need to install:
+* libncurses and libncursesw dev package
+    - Ubuntu: sudo apt-get install libncurses5-dev libncursesw5-dev
+    - Fedora: sudo yum install ncurses-devel
+* git:
+    - Ubuntu: sudo apt-get install git-core gitk
+    - Fedora: sudo yum install git
+
+If you have never configured you git configuration:
+    $> git config --global user.name "your_name"
+    $> git config --global user.email "your_email@example.com"
+
+2. Initialise cross-compilation via SDK:
+---------------------------------------
+* Source SDK environment:
+    $> source <path to SDK>/environment-setup-cortexa9hf-neon-openstlinux_weston-linux-gnueabi
+
+* To verify if you cross-compilation environment are put in place:
+    $> set | grep CROSS
+    CROSS_COMPILE=arm-openstlinux_weston-linux-gnueabi-
+
+Warning: the environment are valid only on the shell session where you have
+         sourced the sdk environment.
+
+3. Prepare U-Boot source:
+------------------------
+If you have the tarball and the list of patch then you must extract the
+tarball and apply the patch.
+    $> tar xfz <U-Boot source>.tar.gz
+    or
+    $> tar xfj <U-Boot source>.tar.bz2
+    or
+    $> tar xfJ <U-Boot source>.tar.xz
+    $> cd <directory to U-Boot source code>
+
+NB: if there is no git management on source code and you would like to have a
+git management on the code see section 4 [Management of U-Boot source code]
+    if there is some patch, please apply it on source code
+    $> for p in `ls -1 <path to patch>/*.patch`; do patch -p1 < $p; done
+
+4. Management of U-Boot source code:
+-----------------------------------
+If you like to have a better management of change made on U-Boot source, you
+can use git:
+    $> tar xfz <U-Boot source>.tar.gz
+    $> cd <directory of U-Boot source code>
+    $> test -d .git || git init . && git add . && git commit -m "U-Boot source code" && git gc
+    $> git checkout -b WORKING
+    $> for p in `ls -1 <path to patch>/*.patch`; do git am $p; done
+
+NB: you can use directly the source from the community:
+    URL: git://git.denx.de/u-boot.git
+    Branch: ##GIT_BRANCH##
+    Revision: ##GIT_SRCREV##
+
+    $> git clone git://git.denx.de/u-boot.git
+    $> cd <directory of U-Boot source code>
+    $> git checkout -b WORKING ##GIT_SRCREV##
+    $> for p in `ls -1 <path to patch>/*.patch`; do git am $p; done
+
+5. Compilation U-Boot source code:
+--------------------------------
+To compile U-Boot source code, first move to U-Boot source:
+    $> cd <directory to U-Boot source code>
+
+You can call the specific 'Makefile.sdk' provided to compile U-Boot:
+  - Display 'Makefile.sdk' file default configuration and targets:
+    $> make -f $PWD/../Makefile.sdk help
+  - Compile default U-Boot configuration:
+    $> make -f $PWD/../Makefile.sdk all
+
+Default U-Boot configuration is done in 'Makefile.sdk' file through two specific
+variables 'DEVICE_TREE' and 'UBOOT_CONFIGS':
+  - 'DEVICE_TREE' is a list of device tree to build, using 'space' as separator.
+    ex: DEVICE_TREE="<devicetree1> <devicetree2>"
+  - 'UBOOT_CONFIGS' is a list of '<defconfig>,<type>,<binary>' configurations,
+        <defconfig> is the u-boot defconfig to use to build
+        <type> is the name append to u-boot binaries (ex: 'trusted', 'basic', etc)
+        <binary> is the u-boot binary to export (ex: 'u-boot.bin', 'u-boot.stm32', etc)
+    ex: UBOOT_CONFIGS="<defconfig1>,basic,u-boot.bin <defconfig1>,trusted,u-boot.stm32"
+You can override the default U-Boot configuration if you specify these variables:
+  - Compile default U-Boot configuration but applying specific devicetree(s):
+    $> make -f $PWD/../Makefile.sdk all DEVICE_TREE="<devicetree1> <devicetree2>"
+  - Compile for a specific U-Boot configuration:
+    $> make -f $PWD/../Makefile.sdk all UBOOT_CONFIGS=<u-boot defconfig>,<u-boot type>,<u-boot binary>
+  - Compile for a specific U-Boot configuration and applying specific devicetree(s):
+    $> make -f $PWD/../Makefile.sdk all UBOOT_CONFIGS=<u-boot defconfig>,<u-boot type>,<u-boot binary> DEVICE_TREE="<devicetree1> <devicetree2>"
+
+6. Update software on board:
+----------------------------
+6.1. partitioning of binaries:
+-----------------------------
+There are two possible configurations available:
+- Basic configuration
+- Trusted configuration
+
+U-Boot build provides binaries for each configuration:
+- Basic configuration: U-Boot SPL and U-Boot imgage (for FSBL and SSBL)
+- Trusted configuration: U-Boot binary with ".stm32" extension (for SSBL)
+
+Basic configuration:
+On this configuration, we use U-Boot SPL as First Stage Boot Loader (FSBL) and
+U-Boot as Second Stage Boot Loader (SSBL).
+U-Boot SPL (u-boot-spl*.stm32) MUST be copied on a dedicated partition named "fsbl1"
+U-Boot image (u-boot*.img) MUST be copied on a dedicated partition named "ssbl"
+
+Trusted configuration:
+On this configuration, U-Boot is associated to Trusted Firmware (TF-A) and only
+U-Boot image is used as Second Stage Boot Loader (SSBL).
+TF-A binary (tf-a-*.stm32) MUST be copied on a dedicated partition named "fsbl1"
+U-boot binary (u-boot*.stm32) MUST be copied on a dedicated partition named "ssbl"
+
+6.2. Update via SDCARD:
+-----------------------
+Basic configuration
+* u-boot-spl*.stm32
+  Copy the binary on the dedicated partition, on SDCARD/USB disk the partition
+  "fsbl1" is the partition 1:
+  - SDCARD: /dev/mmcblkXp1 (where X is the instance number)
+  - SDCARD via USB reader: /dev/sdX1 (where X is the instance number)
+  dd if=<U-Boot SPL file> of=/dev/<device partition> bs=1M conv=fdatasync
+
+* u-boot*.img
+  Copy the binary on the dedicated partition, on SDCARD/USB disk the partition
+  "ssbl" is the partition 4:
+  - SDCARD: /dev/mmcblkXp3 (where X is the instance number)
+  - SDCARD via USB reader: /dev/sdX3 (where X is the instance number)
+  dd if=<U-Boot image file> of=/dev/<device partition> bs=1M conv=fdatasync
+
+Trusted configuration
+* tf-a-*.stm32
+  Copy the binary on the dedicated partition, on SDCARD/USB disk the partition
+  "fsbl1" is the partition 1:
+  - SDCARD: /dev/mmcblkXp1 (where X is the instance number)
+  - SDCARD via USB reader: /dev/sdX1 (where X is the instance number)
+  dd if=<TF-A binary file> of=/dev/<device partition> bs=1M conv=fdatasync
+
+* u-boot*.stm32
+  Copy the binary on the dedicated partition, on SDCARD/USB disk the partition
+  "ssbl" is the partition 4:
+  - SDCARD: /dev/mmcblkXp3 (where X is the instance number)
+  - SDCARD via USB reader: /dev/sdX3 (where X is the instance number)
+  dd if=<U-Boot stm32 binary file> of=/dev/<device partition> bs=1M conv=fdatasync
+
+FAQ: to found the partition associated to a specific label, just plug the
+SDCARD/USB disk on your PC and call the following command:
+  $> ls -l /dev/disk/by-partlabel/
+total 0
+lrwxrwxrwx 1 root root 10 Jan 17 17:38 bootfs -> ../../mmcblk0p4
+lrwxrwxrwx 1 root root 10 Jan 17 17:38 fsbl1 -> ../../mmcblk0p1     ➔ FSBL (TF-A)
+lrwxrwxrwx 1 root root 10 Jan 17 17:38 fsbl2 -> ../../mmcblk0p2     ➔ FSBL backup (TF-A backup – same content as FSBL)
+lrwxrwxrwx 1 root root 10 Jan 17 17:38 rootfs -> ../../mmcblk0p5
+lrwxrwxrwx 1 root root 10 Jan 17 17:38 ssbl -> ../../mmcblk0p3      ➔ SSBL (U-Boot)
+lrwxrwxrwx 1 root root 10 Jan 17 17:38 userfs -> ../../mmcblk0p6
+
+6.3. Update via USB mass storage on U-Boot:
+-------------------------------------------
+* Plug the SDCARD on Board.
+* Start the board and stop on U-Boot shell:
+ Hit any key to stop autoboot: 0
+ STM32MP>
+* plug an USB cable between the PC and the board via USB OTG port.
+* On U-Boot shell, call the usb mass storage functionality:
+ STM32MP> ums 0 mmc 0
+ ums <USB controller> <dev type: mmc|usb> <dev[:part]>
+  ex.:
+    ums 0 mmc 0
+    ums 0 usb 0
+
+* Follow section 6.2 to put U-Boot SPL binary and U-Boot binary (*.img or *.stm32)
+  on SDCARD/USB disk.