U-BOOT: bump to v1.2.0 (v2018.11-r4)

Change-Id: Id53c130643e9a3c0bf9ba1a3644d45b34524dd35
Signed-off-by: Priouzeau Christophe <christophe.priouzeau@st.com>

recipes-bsp/u-boot/u-boot-stm32mp-common_2018.11.inc

@@ -29,6 +29,10 @@ SRC_URI += " \
     file://0011-ARM-v2018.11-stm32mp-r3-DEVICETREE.patch \
     file://0012-ARM-v2018.11-stm32mp-r3-CONFIG.patch \
     file://0013-ARM-v2018.11-stm32mp-r3-MISC.patch \
+    file://0014-ARM-v2018.11-stm32mp-r4-MACHINE.patch \
+    file://0015-ARM-v2018.11-stm32mp-r4-BOARD.patch \
+    file://0016-ARM-v2018.11-stm32mp-r4-DEVICETREE.patch \
+    file://0017-ARM-v2018.11-stm32mp-r4-MISC.patch \
     "
 
 U_BOOT_VERSION = "2018.11"
@@ -42,7 +46,7 @@ S = "${WORKDIR}/u-boot-${PV}"
 BBCLASSEXTEND = "devupstream:target"
 
 SRC_URI_class-devupstream = "git://github.com/STMicroelectronics/u-boot.git;name=uboot;protocol=https;branch=v2018.11-stm32mp"
-SRCREV_class-devupstream = "22eea618b3295cfae777aa80789eb1b46824db12"
+SRCREV_class-devupstream = "fd915f073fe23fea3eb509dbc26ac9da1893692a"
 SRCREV_FORMAT_class-devupstream = "uboot"
 PV_class-devupstream = "${U_BOOT_VERSION}+github+${SRCPV}"
 

recipes-bsp/u-boot/u-boot-stm32mp-extlinux.bb

@@ -8,7 +8,7 @@ PACKAGE_ARCH = "${MACHINE_ARCH}"
 
 SRC_URI = "file://boot.scr.cmd"
 
-PV = "2.0"
+PV = "2.6"
 
 inherit kernel-arch extlinuxconf-stm32mp
 

recipes-bsp/u-boot/u-boot-stm32mp-extlinux/boot.scr.cmd

@@ -29,16 +29,17 @@ elif test ${boot_device} = nand; then
 
 elif test ${boot_device} = nor; then
 
-    #SDCARD boot
-    run bootcmd_mmc0
+    #EMMC boot
+    env set boot_prefixes "/${boot_device}${boot_instance}-mmc1_${board_name}_"
+    run bootcmd_mmc1
 
     #NAND boot
     env set boot_prefixes "/nand0_${board_name}_"
     run bootcmd_ubifs0
 
-    #EMMC boot
-    env set boot_prefixes "/${boot_device}${boot_instance}-mmc1_${board_name}_"
-    run bootcmd_mmc1
+    #SDCARD boot
+    env set boot_prefixes "/${boot_device}${boot_instance}_${board_name}_"
+    run bootcmd_mmc0
 fi
 
 echo SCRIPT FAILED... ${boot_prefixes}extlinux/extlinux.conf not found !

recipes-bsp/u-boot/u-boot-stm32mp/0014-ARM-v2018.11-stm32mp-r4-MACHINE.patch

@@ -0,0 +1,494 @@
+From 19120ee9047a8e592c8a82d12a8482ef944f0dda Mon Sep 17 00:00:00 2001
+From: Romuald JEANNE <romuald.jeanne@st.com>
+Date: Thu, 30 Jan 2020 14:55:56 +0100
+Subject: [PATCH 14/17] ARM v2018.11 stm32mp r4 MACHINE
+
+---
+ arch/arm/mach-stm32mp/Makefile                  |  3 +-
+ arch/arm/mach-stm32mp/bsec.c                    |  4 +-
+ arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c | 82 ++++++++++++++-----------
+ arch/arm/mach-stm32mp/cpu.c                     | 21 +++++++
+ arch/arm/mach-stm32mp/include/mach/ddr.h        |  6 +-
+ arch/arm/mach-stm32mp/include/mach/stm32.h      |  1 +
+ arch/arm/mach-stm32mp/include/mach/sys_proto.h  | 13 +++-
+ arch/arm/mach-stm32mp/spl.c                     | 41 ++++++++-----
+ arch/arm/mach-stm32mp/stm32mp1_helper_dbg.S     |  5 +-
+ 9 files changed, 116 insertions(+), 60 deletions(-)
+
+diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
+index 9158a20..13e7773 100644
+--- a/arch/arm/mach-stm32mp/Makefile
++++ b/arch/arm/mach-stm32mp/Makefile
+@@ -6,6 +6,7 @@
+ obj-y += cpu.o
+ obj-y += dram_init.o
+ obj-y += syscon.o
++obj-y += bsec.o
+ 
+ ifdef CONFIG_SPL_BUILD
+ obj-y += spl.o
+@@ -13,8 +14,6 @@ obj-$(CONFIG_STM32MP1_RESET_HALT_WORKAROUND) += stm32mp1_helper_dbg.o
+ else
+ obj-$(CONFIG_CMD_STM32PROG) += cmd_stm32prog/
+ obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o
+-
+-obj-y += bsec.o
+ obj-$(CONFIG_SYSRESET) += cmd_poweroff.o
+ obj-$(CONFIG_ARMV7_PSCI) += psci.o
+ endif
+diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
+index 5256378..fa7f39f 100644
+--- a/arch/arm/mach-stm32mp/bsec.c
++++ b/arch/arm/mach-stm32mp/bsec.c
+@@ -436,7 +436,7 @@ static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev)
+ 	return 0;
+ }
+ 
+-#ifndef CONFIG_STM32MP1_TRUSTED
++#if !defined(CONFIG_STM32MP1_TRUSTED) && !defined(CONFIG_SPL_BUILD)
+ static int stm32mp_bsec_probe(struct udevice *dev)
+ {
+ 	int otp;
+@@ -463,7 +463,7 @@ U_BOOT_DRIVER(stm32mp_bsec) = {
+ 	.ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata,
+ 	.platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata),
+ 	.ops = &stm32mp_bsec_ops,
+-#ifndef CONFIG_STM32MP1_TRUSTED
++#if !defined(CONFIG_STM32MP1_TRUSTED) && !defined(CONFIG_SPL_BUILD)
+ 	.probe = stm32mp_bsec_probe,
+ #endif
+ };
+diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+index 8325b56..c6d8f14 100644
+--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
++++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+@@ -63,7 +63,7 @@ static const efi_guid_t uuid_mmc[3] = {
+ };
+ 
+ DECLARE_GLOBAL_DATA_PTR;
+-#define ENV_BUF_LEN			SZ_1K
++#define ALT_BUF_LEN			SZ_1K
+ 
+ /* order of column in flash layout file */
+ enum stm32prog_col_t {
+@@ -842,8 +842,8 @@ static int treat_partition_list(struct stm32prog_data *data)
+ static int create_partitions(struct stm32prog_data *data)
+ {
+ 	int offset = 0;
+-	char cmdbuf[32];
+-	char buf[ENV_BUF_LEN];
++	const int buflen = SZ_8K;
++	char *buf;
+ 	char uuid[UUID_STR_LEN + 1];
+ 	unsigned char *uuid_bin;
+ 	unsigned int mmc_id;
+@@ -851,6 +851,10 @@ static int create_partitions(struct stm32prog_data *data)
+ 	bool rootfs_found;
+ 	struct stm32prog_part_t *part;
+ 
++	buf = malloc(buflen);
++	if (!buf)
++		return -ENOMEM;
++
+ 	puts("partitions : ");
+ 	/* initialize the selected device */
+ 	for (i = 0; i < data->dev_nb; i++) {
+@@ -860,7 +864,7 @@ static int create_partitions(struct stm32prog_data *data)
+ 
+ 		offset = 0;
+ 		rootfs_found = false;
+-		memset(buf, 0, sizeof(buf));
++		memset(buf, 0, buflen);
+ 
+ 		list_for_each_entry(part, &data->dev[i].part_list, list) {
+ 			/* skip eMMC boot partitions */
+@@ -871,7 +875,17 @@ static int create_partitions(struct stm32prog_data *data)
+ 			if (part->part_type == RAW_IMAGE)
+ 				continue;
+ 
+-			offset += snprintf(buf + offset, ENV_BUF_LEN - offset,
++			if (offset + 100 > buflen) {
++				pr_debug("\n%s: buffer too small, %s skippped",
++					 __func__, part->name);
++				continue;
++			}
++
++			if (!offset)
++				offset += sprintf(buf, "gpt write mmc %d \"",
++						  data->dev[i].dev_id);
++
++			offset += snprintf(buf + offset, buflen - offset,
+ 					   "name=%s,start=0x%llx,size=0x%llx",
+ 					   part->name,
+ 					   part->addr,
+@@ -879,17 +893,17 @@ static int create_partitions(struct stm32prog_data *data)
+ 
+ 			if (part->part_type == PART_BINARY)
+ 				offset += snprintf(buf + offset,
+-						   ENV_BUF_LEN - offset,
++						   buflen - offset,
+ 						   ",type="
+ 						   LINUX_RESERVED_UUID);
+ 			else
+ 				offset += snprintf(buf + offset,
+-						   ENV_BUF_LEN - offset,
++						   buflen - offset,
+ 						   ",type=linux");
+ 
+ 			if (part->part_type == PART_SYSTEM)
+ 				offset += snprintf(buf + offset,
+-						   ENV_BUF_LEN - offset,
++						   buflen - offset,
+ 						   ",bootable");
+ 
+ 			if (!rootfs_found && !strcmp(part->name, "rootfs")) {
+@@ -901,23 +915,21 @@ static int create_partitions(struct stm32prog_data *data)
+ 					uuid_bin_to_str(uuid_bin, uuid,
+ 							UUID_STR_FORMAT_GUID);
+ 					offset += snprintf(buf + offset,
+-							   ENV_BUF_LEN - offset,
++							   buflen - offset,
+ 							   ",uuid=%s", uuid);
+ 				}
+ 			}
+ 
+-			offset += snprintf(buf + offset,
+-					   ENV_BUF_LEN - offset,
+-					   ";");
++			offset += snprintf(buf + offset, buflen - offset, ";");
+ 		}
+ 
+ 		if (offset) {
+-			sprintf(cmdbuf, "gpt write mmc %d \"%s\"",
+-				data->dev[i].dev_id, buf);
+-			pr_debug("cmd: %s\n", cmdbuf);
+-			if (run_command(cmdbuf, 0)) {
+-				stm32prog_err("partitionning fail : %s",
+-					      cmdbuf);
++			offset += snprintf(buf + offset, buflen - offset, "\"");
++			pr_debug("\ncmd: %s\n", buf);
++			if (run_command(buf, 0)) {
++				stm32prog_err("partitionning fail : %s", buf);
++				free(buf);
++
+ 				return -1;
+ 			}
+ 		}
+@@ -926,21 +938,21 @@ static int create_partitions(struct stm32prog_data *data)
+ 			part_init(data->dev[i].block_dev);
+ 
+ #ifdef DEBUG
+-		sprintf(cmdbuf, "gpt verify mmc %d",
+-			data->dev[i].dev_id);
+-		pr_debug("cmd: %s ", cmdbuf);
+-		if (run_command(cmdbuf, 0))
++		sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
++		pr_debug("\ncmd: %s", buf);
++		if (run_command(buf, 0))
+ 			printf("fail !\n");
+ 		else
+ 			printf("OK\n");
+ 
+ 		/* TEMP : for debug, display partition */
+-		sprintf(cmdbuf, "part list mmc %d",
+-			data->dev[i].dev_id);
+-		run_command(cmdbuf, 0);
++		sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
++		run_command(buf, 0);
+ #endif
+ 	}
+ 	puts("done\n");
++	free(buf);
++
+ 	return 0;
+ }
+ 
+@@ -952,7 +964,7 @@ static int stm32prog_alt_add(struct stm32prog_data *data,
+ 	int offset = 0;
+ 	char devstr[4];
+ 	char dfustr[10];
+-	char buf[ENV_BUF_LEN];
++	char buf[ALT_BUF_LEN];
+ 	u32 size;
+ 	char multiplier,  type;
+ 
+@@ -973,7 +985,7 @@ static int stm32prog_alt_add(struct stm32prog_data *data,
+ 		type = 'a';/*Readable*/
+ 
+ 	memset(buf, 0, sizeof(buf));
+-	offset = snprintf(buf, ENV_BUF_LEN - offset,
++	offset = snprintf(buf, ALT_BUF_LEN - offset,
+ 			  "@%s/0x%02x/1*%d%c%c ",
+ 			  part->name, part->id,
+ 			  size, multiplier, type);
+@@ -985,29 +997,29 @@ static int stm32prog_alt_add(struct stm32prog_data *data,
+ 			dfu_size = part->size / part->dev->lba_blk_size;
+ 		else
+ 			dfu_size = part->size;
+-		offset += snprintf(buf + offset, ENV_BUF_LEN - offset,
++		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+ 				   "raw 0x0 0x%llx", dfu_size);
+ 	} else if (part->part_id < 0) {
+ 		u64 nb_blk = part->size / part->dev->lba_blk_size;
+ 
+ 		/* lba_blk_size, mmc->read_bl_len */
+-		offset += snprintf(buf + offset, ENV_BUF_LEN - offset,
++		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+ 				   "raw 0x%llx 0x%llx",
+ 				   part->addr, nb_blk);
+-		offset += snprintf(buf + offset, ENV_BUF_LEN - offset,
++		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+ 				   " mmcpart %d;", -(part->part_id));
+ 	} else {
+ 		if (part->part_type == PART_SYSTEM &&
+ 		    (part->dev_type == DFU_DEV_NAND ||
+ 		     part->dev_type == DFU_DEV_SF))
+ 			offset += snprintf(buf + offset,
+-					   ENV_BUF_LEN - offset,
++					   ALT_BUF_LEN - offset,
+ 					   "partubi");
+ 		else
+ 			offset += snprintf(buf + offset,
+-					   ENV_BUF_LEN - offset,
++					   ALT_BUF_LEN - offset,
+ 					   "part");
+-		offset += snprintf(buf + offset, ENV_BUF_LEN - offset,
++		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+ 				   " %d %d;",
+ 				   part->dev_id,
+ 				   part->part_id);
+@@ -1041,7 +1053,7 @@ static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
+ {
+ 	int ret = 0;
+ 	char devstr[4];
+-	char buf[ENV_BUF_LEN];
++	char buf[ALT_BUF_LEN];
+ 
+ 	sprintf(devstr, "%d", phase);
+ 	sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
+@@ -1100,7 +1112,7 @@ static int dfu_init_entities(struct stm32prog_data *data)
+ 			ret = stm32prog_alt_add(data, dfu, part);
+ 		}
+ 	} else {
+-		char buf[ENV_BUF_LEN];
++		char buf[ALT_BUF_LEN];
+ 
+ 		sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
+ 			PHASE_FLASHLAYOUT, STM32_DDR_BASE);
+diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
+index efe8b79..5d43f0b 100644
+--- a/arch/arm/mach-stm32mp/cpu.c
++++ b/arch/arm/mach-stm32mp/cpu.c
+@@ -291,18 +291,36 @@ int print_cpuinfo(void)
+ 
+ 	/* MPUs Part Numbers */
+ 	switch (get_cpu_type()) {
++	case CPU_STM32MP157Fxx:
++		cpu_s = "157F";
++		break;
++	case CPU_STM32MP157Dxx:
++		cpu_s = "157D";
++		break;
+ 	case CPU_STM32MP157Cxx:
+ 		cpu_s = "157C";
+ 		break;
+ 	case CPU_STM32MP157Axx:
+ 		cpu_s = "157A";
+ 		break;
++	case CPU_STM32MP153Fxx:
++		cpu_s = "153F";
++		break;
++	case CPU_STM32MP153Dxx:
++		cpu_s = "153D";
++		break;
+ 	case CPU_STM32MP153Cxx:
+ 		cpu_s = "153C";
+ 		break;
+ 	case CPU_STM32MP153Axx:
+ 		cpu_s = "153A";
+ 		break;
++	case CPU_STM32MP151Fxx:
++		cpu_s = "151F";
++		break;
++	case CPU_STM32MP151Dxx:
++		cpu_s = "151D";
++		break;
+ 	case CPU_STM32MP151Cxx:
+ 		cpu_s = "151C";
+ 		break;
+@@ -341,6 +359,9 @@ int print_cpuinfo(void)
+ 	case CPU_REVB:
+ 		cpu_r = "B";
+ 		break;
++	case CPU_REVZ:
++		cpu_r = "Z";
++		break;
+ 	default:
+ 		cpu_r = "?";
+ 		break;
+diff --git a/arch/arm/mach-stm32mp/include/mach/ddr.h b/arch/arm/mach-stm32mp/include/mach/ddr.h
+index b8a17cf..bfc42a7 100644
+--- a/arch/arm/mach-stm32mp/include/mach/ddr.h
++++ b/arch/arm/mach-stm32mp/include/mach/ddr.h
+@@ -9,8 +9,10 @@
+ /* DDR power initializations */
+ enum ddr_type {
+ 	STM32MP_DDR3,
+-	STM32MP_LPDDR2,
+-	STM32MP_LPDDR3,
++	STM32MP_LPDDR2_16,
++	STM32MP_LPDDR2_32,
++	STM32MP_LPDDR3_16,
++	STM32MP_LPDDR3_32,
+ };
+ 
+ int board_ddr_power_init(enum ddr_type ddr_type);
+diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
+index 5283e90..70fb235 100644
+--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
++++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
+@@ -96,6 +96,7 @@ enum boot_device {
+ #define TAMP_BACKUP_MAGIC_NUMBER	TAMP_BACKUP_REGISTER(4)
+ #define TAMP_BACKUP_BRANCH_ADDRESS	TAMP_BACKUP_REGISTER(5)
+ /* non secure access */
++#define TAMP_COPRO_RSC_TBL_ADDRESS	TAMP_BACKUP_REGISTER(17)
+ #define TAMP_BOOT_CONTEXT		TAMP_BACKUP_REGISTER(20)
+ #define TAMP_BOOTCOUNT			TAMP_BACKUP_REGISTER(21)
+ 
+diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+index 871324b..0ede1e7 100644
+--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
++++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+@@ -3,19 +3,26 @@
+  * Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved
+  */
+ 
+-/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit15:0)*/
++/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0) */
+ #define CPU_STM32MP157Cxx	0x05000000
+ #define CPU_STM32MP157Axx	0x05000001
+ #define CPU_STM32MP153Cxx	0x05000024
+ #define CPU_STM32MP153Axx	0x05000025
+ #define CPU_STM32MP151Cxx	0x0500002E
+ #define CPU_STM32MP151Axx	0x0500002F
++#define CPU_STM32MP157Fxx	0x05000080
++#define CPU_STM32MP157Dxx	0x05000081
++#define CPU_STM32MP153Fxx	0x050000A4
++#define CPU_STM32MP153Dxx	0x050000A5
++#define CPU_STM32MP151Fxx	0x050000AE
++#define CPU_STM32MP151Dxx	0x050000AF
+ 
+ /* return CPU_STMP32MP...Xxx constants */
+ u32 get_cpu_type(void);
+ 
+ #define CPU_REVA	0x1000
+ #define CPU_REVB	0x2000
++#define CPU_REVZ	0x2001
+ 
+ /* return CPU_REV constants */
+ u32 get_cpu_rev(void);
+@@ -32,3 +39,7 @@ u32 get_cpu_package(void);
+ u32 get_bootmode(void);
+ /* start IWDG watchdog */
+ int watchdog_start(void);
++
++/* board power management : configure vddcore according OPP */
++void board_vddcore_init(u32 voltage_mv);
++int board_vddcore_set(void);
+diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c
+index 6c8744f..74b56f9 100644
+--- a/arch/arm/mach-stm32mp/spl.c
++++ b/arch/arm/mach-stm32mp/spl.c
+@@ -85,42 +85,49 @@ void spl_display_print(void)
+ }
+ #endif
+ 
++__weak int board_vddcore_set(void)
++{
++	return 0;
++}
++
+ void board_init_f(ulong dummy)
+ {
+ 	struct udevice *dev;
+-	int ret;
++	int ret, clk, reset, pinctrl, power;
+ 
+ 	arch_cpu_init();
+ 
+ 	ret = spl_early_init();
+ 	if (ret) {
+-		debug("spl_early_init() failed: %d\n", ret);
++		debug("%s: spl_early_init() failed: %d\n", __func__, ret);
+ 		hang();
+ 	}
+ 
+-	ret = uclass_get_device(UCLASS_CLK, 0, &dev);
+-	if (ret) {
+-		debug("Clock init failed: %d\n", ret);
+-		return;
+-	}
++	clk = uclass_get_device(UCLASS_CLK, 0, &dev);
++	if (clk)
++		debug("%s: Clock init failed: %d\n", __func__, clk);
+ 
+-	ret = uclass_get_device(UCLASS_RESET, 0, &dev);
+-	if (ret) {
+-		debug("Reset init failed: %d\n", ret);
+-		return;
+-	}
++	reset = uclass_get_device(UCLASS_RESET, 0, &dev);
++	if (reset)
++		debug("%s: Reset init failed: %d\n", __func__, reset);
+ 
+-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
+-	if (ret) {
+-		debug("%s: Cannot find pinctrl device\n", __func__);
+-		return;
+-	}
++	pinctrl = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
++	if (pinctrl)
++		debug("%s: Cannot find pinctrl device: %d\n",
++		      __func__, pinctrl);
+ 
+ 	/* enable console uart printing */
+ 	preloader_console_init();
+ 
+ 	watchdog_start();
+ 
++	/* change vddcore if needed after clock tree init */
++	power = board_vddcore_set();
++
++	if (clk || reset || pinctrl || power)
++		printf("%s: probe failed clk=%d reset=%d pinctrl=%d power=%d\n",
++		       __func__, clk, reset, pinctrl, power);
++
+ 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ 	if (ret) {
+ 		printf("DRAM init failed: %d\n", ret);
+diff --git a/arch/arm/mach-stm32mp/stm32mp1_helper_dbg.S b/arch/arm/mach-stm32mp/stm32mp1_helper_dbg.S
+index 37a1b06..d17a37a 100644
+--- a/arch/arm/mach-stm32mp/stm32mp1_helper_dbg.S
++++ b/arch/arm/mach-stm32mp/stm32mp1_helper_dbg.S
+@@ -10,6 +10,9 @@
+  * fixes the limitation. Anyway, this source code identifies the Soc revision
+  * and is only executed if it corresponds, so it can be kept on other
+  * revisions without any consequence.
++ * The revisions that need the workaround have ID values:
++ * - 0x2000X500
++ * - 0x2001X500
+  ****************************************************************************/
+ 
+ #include <linux/linkage.h>
+@@ -30,7 +33,7 @@
+ #define PWR_CR1_DBP			BIT(8)
+ 
+ #define DBGMCU_IDC_ADDR			0x50081000
+-#define DBGMCU_IDC_MASK			0xFFFF0FFF
++#define DBGMCU_IDC_MASK			0xFFFE0FFF
+ #define DBGMCU_IDC_VALUE		0x20000500
+ 
+ #define TAMP_BKP_REGISTER_20		(0x5C00A100 + (20 << 2))
+-- 
+2.7.4
+

recipes-bsp/u-boot/u-boot-stm32mp/0015-ARM-v2018.11-stm32mp-r4-BOARD.patch

@@ -0,0 +1,255 @@
+From 74c58d9ed7af723b31a4f9d3725afcce9fde1ca4 Mon Sep 17 00:00:00 2001
+From: Romuald JEANNE <romuald.jeanne@st.com>
+Date: Thu, 30 Jan 2020 14:56:24 +0100
+Subject: [PATCH 15/17] ARM v2018.11 stm32mp r4 BOARD
+
+---
+ board/st/stm32mp1/Kconfig    |  4 ++++
+ board/st/stm32mp1/README     | 21 ++++++++++++++--
+ board/st/stm32mp1/board.c    | 57 ++++++++++++++++++++++++++++++++++++++++----
+ board/st/stm32mp1/stm32mp1.c | 36 +++++++++++++---------------
+ 4 files changed, 92 insertions(+), 26 deletions(-)
+
+diff --git a/board/st/stm32mp1/Kconfig b/board/st/stm32mp1/Kconfig
+index 92d8f90..6a06e5b 100644
+--- a/board/st/stm32mp1/Kconfig
++++ b/board/st/stm32mp1/Kconfig
+@@ -16,4 +16,8 @@ config CMD_STBOARD
+ 	  This compile the stboard command to
+ 	  read and write the board in the OTP.
+ 
++config TARGET_STM32MP157C_DK2
++	bool "support of STMicroelectronics STM32MP157C-DK2 Discovery Board"
++	default y
++
+ endif
+diff --git a/board/st/stm32mp1/README b/board/st/stm32mp1/README
+index b710602..782b9d18 100644
+--- a/board/st/stm32mp1/README
++++ b/board/st/stm32mp1/README
+@@ -305,7 +305,20 @@ Mac id storage and retrieval in stm32mp otp :
+ To program a MAC address on virgin OTP words above, you can use the fuse command
+ on bank 0 to access to internal OTP:
+ 
+-    example to set mac address "12:34:56:78:9a:bc"
++    Prerequisite: check if a MAC address isn't yet programmed in OTP
++
++    1- check OTP: their value must be equal to 0
++
++       STM32MP> fuse sense 0 57 2
++       Sensing bank 0:
++       Word 0x00000039: 00000000 00000000
++
++    2- check environment variable
++
++       STM32MP> env print ethaddr
++       ## Error: "ethaddr" not defined
++
++    Example to set mac address "12:34:56:78:9a:bc"
+ 
+     1- Write OTP
+        STM32MP> fuse prog -y 0 57 0x78563412 0x0000bc9a
+@@ -319,9 +332,13 @@ on bank 0 to access to internal OTP:
+        ### Setting environment from OTP MAC address = "12:34:56:78:9a:bc"
+ 
+     4 check env update
+-       STM32MP> print ethaddr
++       STM32MP> env print ethaddr
+        ethaddr=12:34:56:78:9a:bc
+ 
++warning:: This MAC address provisioning can't be executed twice on the same
++          board as the OTP are protected. It is already done for the board
++          provided by STMicroelectronics.
++
+ 10. Coprocessor firmware
+ ========================
+ 
+diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c
+index c3d832f..3e38aef 100644
+--- a/board/st/stm32mp1/board.c
++++ b/board/st/stm32mp1/board.c
+@@ -38,11 +38,46 @@ void board_debug_uart_init(void)
+ #endif
+ 
+ #ifdef CONFIG_PMIC_STPMIC1
++u32 opp_voltage_mv;
++
++void board_vddcore_init(u32 voltage_mv)
++{
++	opp_voltage_mv = voltage_mv;
++}
++
++int board_vddcore_set(void)
++{
++	struct udevice *dev;
++	int ret;
++	u32 value;
++
++	if (!opp_voltage_mv)
++		return 0;
++
++	ret = uclass_get_device_by_driver(UCLASS_PMIC,
++					  DM_GET_DRIVER(pmic_stpmic1), &dev);
++	if (ret)
++		return ret;
++
++	/* VDDCORE= STMPCI1 BUCK1 ramp=+25mV, 5 => 725mV, 36 => 1500mV */
++	value = ((opp_voltage_mv - 725) / 25) + 5;
++	if (value < 5)
++		value = 5;
++	if (value > 36)
++		value = 36;
++
++	return pmic_clrsetbits(dev,
++			       STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK1),
++			       STPMIC1_BUCK_VOUT_MASK,
++			       STPMIC1_BUCK_VOUT(value));
++}
++
+ int board_ddr_power_init(enum ddr_type ddr_type)
+ {
+ 	struct udevice *dev;
+ 	bool buck3_at_1800000v = false;
+ 	int ret;
++	u32 buck2;
+ 
+ 	ret = uclass_get_device_by_driver(UCLASS_PMIC,
+ 					  DM_GET_DRIVER(pmic_stpmic1), &dev);
+@@ -102,8 +137,10 @@ int board_ddr_power_init(enum ddr_type ddr_type)
+ 
+ 		break;
+ 
+-	case STM32MP_LPDDR2:
+-	case STM32MP_LPDDR3:
++	case STM32MP_LPDDR2_16:
++	case STM32MP_LPDDR2_32:
++	case STM32MP_LPDDR3_16:
++	case STM32MP_LPDDR3_32:
+ 		/*
+ 		 * configure VDD_DDR1 = LDO3
+ 		 * Set LDO3 to 1.8V
+@@ -133,11 +170,23 @@ int board_ddr_power_init(enum ddr_type ddr_type)
+ 		if (ret < 0)
+ 			return ret;
+ 
+-		/* VDD_DDR2 : Set BUCK2 to 1.2V */
++		/* VDD_DDR2 : Set BUCK2 to 1.2V (16bits) or 1.25V (32 bits)*/
++		switch (ddr_type) {
++		case STM32MP_LPDDR2_32:
++		case STM32MP_LPDDR3_32:
++			buck2 = STPMIC1_BUCK2_1250000V;
++			break;
++		default:
++		case STM32MP_LPDDR2_16:
++		case STM32MP_LPDDR3_16:
++			buck2 = STPMIC1_BUCK2_1200000V;
++			break;
++		}
++
+ 		ret = pmic_clrsetbits(dev,
+ 				      STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2),
+ 				      STPMIC1_BUCK_VOUT_MASK,
+-				      STPMIC1_BUCK2_1200000V);
++				      buck2);
+ 		if (ret < 0)
+ 			return ret;
+ 
+diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
+index f852b1e..822b6d7 100644
+--- a/board/st/stm32mp1/stm32mp1.c
++++ b/board/st/stm32mp1/stm32mp1.c
+@@ -388,10 +388,15 @@ int g_dnl_board_usb_cable_connected(void)
+ }
+ 
+ #define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
++#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
++
+ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+ {
+ 	if (!strcmp(name, "usb_dnl_dfu"))
+ 		put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
++	else if (!strcmp(name, "usb_dnl_fastboot"))
++		put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
++			      &dev->idProduct);
+ 	else
+ 		put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
+ 
+@@ -517,6 +522,7 @@ static void __maybe_unused led_error_blink(u32 nb_blink)
+ 			mdelay(125);
+ 			WATCHDOG_RESET();
+ 		}
++		led_set_state(led, LEDST_ON);
+ 	}
+ #endif
+ 
+@@ -876,7 +882,8 @@ const char *env_ext4_get_dev_part(void)
+ 
+ static __maybe_unused bool board_is_dk2(void)
+ {
+-	if (of_machine_is_compatible("st,stm32mp157c-dk2"))
++	if (CONFIG_IS_ENABLED(TARGET_STM32MP157C_DK2) &&
++	    of_machine_is_compatible("st,stm32mp157c-dk2"))
+ 		return true;
+ 
+ 	return false;
+@@ -1079,9 +1086,7 @@ void board_mtdparts_default(const char **mtdids, const char **mtdparts)
+ #if defined(CONFIG_OF_BOARD_SETUP)
+ int ft_board_setup(void *blob, bd_t *bd)
+ {
+-	ulong copro_rsc_addr, copro_rsc_size;
+ 	int off;
+-	char *s_copro = NULL;
+ #ifdef CONFIG_FDT_FIXUP_PARTITIONS
+ 	struct node_info nodes[] = {
+ 		{ "st,stm32f469-qspi",		MTD_DEV_TYPE_NOR,  },
+@@ -1093,20 +1098,11 @@ int ft_board_setup(void *blob, bd_t *bd)
+ 	/* Update DT if coprocessor started */
+ 	off = fdt_path_offset(blob, "/m4");
+ 	if (off > 0) {
+-		s_copro = env_get("copro_state");
+-		copro_rsc_addr  = env_get_hex("copro_rsc_addr", 0);
+-		copro_rsc_size  = env_get_hex("copro_rsc_size", 0);
+-
+-		if (s_copro) {
++		if (env_get("copro_state")) {
+ 			fdt_setprop_empty(blob, off, "early-booted");
+-			if (copro_rsc_addr)
+-				fdt_setprop_u32(blob, off, "rsc-address",
+-						copro_rsc_addr);
+-			if (copro_rsc_size)
+-				fdt_setprop_u32(blob, off, "rsc-size",
+-						copro_rsc_size);
+ 		} else {
+ 			fdt_delprop(blob, off, "early-booted");
++			writel(0, TAMP_COPRO_RSC_TBL_ADDRESS);
+ 		}
+ 	}
+ 
+@@ -1128,18 +1124,18 @@ static void board_stm32copro_image_process(ulong fw_image, size_t fw_size)
+ 		}
+ 
+ 	ret = rproc_load_rsc_table(id, fw_image, fw_size, &rsc_addr, &rsc_size);
+-	if (!ret) {
+-		env_set_hex("copro_rsc_addr", rsc_addr);
+-		env_set_hex("copro_rsc_size", rsc_size);
+-	}
++	if (ret && ret != -ENODATA)
++		return;
+ 
+ 	ret = rproc_load(id, fw_image, fw_size);
+ 	printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
+ 	       id, fw_image, fw_size, ret ? " Failed!" : " Success!");
+ 
+ 	if (!ret) {
+-		rproc_start(id);
+-		env_set("copro_state", "booted");
++		ret = rproc_start(id);
++		printf("Start firmware:%s\n", ret ? " Failed!" : " Success!");
++		if (!ret)
++			env_set("copro_state", "booted");
+ 	}
+ }
+ 
+-- 
+2.7.4
+