497 lines
16 KiB
Diff
497 lines
16 KiB
Diff
From 61b384e5eaed6c1ef9342e7216ffd2376e0f611d Mon Sep 17 00:00:00 2001
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From: Lionel VITTE <lionel.vitte@st.com>
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Date: Fri, 8 Nov 2019 16:52:43 +0100
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Subject: [PATCH 16/31] ARM stm32mp1 r3 NET
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---
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drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
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drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 167 +++++++++++++++++----
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drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c | 2 +-
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drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 45 +++++-
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.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +
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.../wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c | 6 +
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.../net/wireless/broadcom/brcm80211/brcmfmac/pno.c | 5 +
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.../net/wireless/broadcom/brcm80211/brcmutil/d11.c | 3 -
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8 files changed, 191 insertions(+), 42 deletions(-)
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diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
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index b069b3a..272b9ca6 100644
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--- a/drivers/net/ethernet/stmicro/stmmac/common.h
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+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
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@@ -261,7 +261,7 @@ struct stmmac_safety_stats {
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#define STMMAC_COAL_TX_TIMER 1000
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#define STMMAC_MAX_COAL_TX_TICK 100000
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#define STMMAC_TX_MAX_FRAMES 256
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-#define STMMAC_TX_FRAMES 1
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+#define STMMAC_TX_FRAMES 25
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/* Packets types */
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enum packets_types {
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diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
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index 7e2e79d..dd45026 100644
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--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
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@@ -25,9 +25,24 @@
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#define SYSCFG_MCU_ETH_MASK BIT(23)
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#define SYSCFG_MP1_ETH_MASK GENMASK(23, 16)
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+#define SYSCFG_PMCCLRR_OFFSET 0x40
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#define SYSCFG_PMCR_ETH_CLK_SEL BIT(16)
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#define SYSCFG_PMCR_ETH_REF_CLK_SEL BIT(17)
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+
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+/* Ethernet PHY interface selection in register SYSCFG Configuration
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+ *------------------------------------------
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+ * src |BIT(23)| BIT(22)| BIT(21)|BIT(20)|
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+ *------------------------------------------
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+ * MII | 0 | 0 | 0 | 1 |
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+ *------------------------------------------
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+ * GMII | 0 | 0 | 0 | 0 |
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+ *------------------------------------------
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+ * RGMII | 0 | 0 | 1 | n/a |
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+ *------------------------------------------
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+ * RMII | 1 | 0 | 0 | n/a |
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+ *------------------------------------------
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+ */
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#define SYSCFG_PMCR_ETH_SEL_MII BIT(20)
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#define SYSCFG_PMCR_ETH_SEL_RGMII BIT(21)
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#define SYSCFG_PMCR_ETH_SEL_RMII BIT(23)
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@@ -35,14 +50,54 @@
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#define SYSCFG_MCU_ETH_SEL_MII 0
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#define SYSCFG_MCU_ETH_SEL_RMII 1
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+/* STM32MP1 register definitions
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+ *
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+ * Below table summarizes the clock requirement and clock sources for
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+ * supported phy interface modes.
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+ * __________________________________________________________________________
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+ *|PHY_MODE | Normal | PHY wo crystal| PHY wo crystal |No 125Mhz from PHY|
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+ *| | | 25MHz | 50MHz | |
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+ * ---------------------------------------------------------------------------
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+ *| MII | - | eth-ck | n/a | n/a |
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+ *| | | | | |
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+ * ---------------------------------------------------------------------------
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+ *| GMII | - | eth-ck | n/a | n/a |
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+ *| | | | | |
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+ * ---------------------------------------------------------------------------
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+ *| RGMII | - | eth-ck | n/a | eth-ck (no pin) |
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+ *| | | | | st,eth_clk_sel |
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+ * ---------------------------------------------------------------------------
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+ *| RMII | - | eth-ck | eth-ck | n/a |
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+ *| | | | st,eth_ref_clk_sel | |
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+ * ---------------------------------------------------------------------------
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+ *
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+ * BIT(17) : set this bit in RMII mode when you have PHY without crystal 50MHz
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+ * BIT(16) : set this bit in GMII/RGMII PHY when you do not want use 125Mhz
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+ * from PHY
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+ *-----------------------------------------------------
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+ * src | BIT(17) | BIT(16) |
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+ *-----------------------------------------------------
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+ * MII | n/a | n/a |
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+ *-----------------------------------------------------
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+ * GMII | n/a | st,eth_clk_sel |
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+ *-----------------------------------------------------
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+ * RGMII | n/a | st,eth_clk_sel |
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+ *-----------------------------------------------------
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+ * RMII | st,eth_ref_clk_sel | n/a |
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+ *-----------------------------------------------------
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+ *
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+ */
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+
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struct stm32_dwmac {
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struct clk *clk_tx;
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struct clk *clk_rx;
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struct clk *clk_eth_ck;
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struct clk *clk_ethstp;
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struct clk *syscfg_clk;
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- bool int_phyclk; /* Clock from RCC to drive PHY */
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- u32 mode_reg; /* MAC glue-logic mode register */
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+ int eth_clk_sel_reg;
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+ int eth_ref_clk_sel_reg;
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+ int irq_pwr_wakeup;
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+ u32 mode_reg; /* MAC glue-logic mode register */
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struct regmap *regmap;
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u32 speed;
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const struct stm32_ops *ops;
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@@ -98,23 +153,32 @@ static int stm32mp1_clk_prepare(struct stm32_dwmac *dwmac, bool prepare)
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int ret = 0;
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if (prepare) {
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- ret = clk_prepare_enable(dwmac->syscfg_clk);
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- if (ret)
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- return ret;
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-
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- if (dwmac->int_phyclk) {
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+ if (dwmac->syscfg_clk) {
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+ ret = clk_prepare_enable(dwmac->syscfg_clk);
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+ if (ret)
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+ return ret;
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+ }
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+ if (dwmac->clk_eth_ck) {
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ret = clk_prepare_enable(dwmac->clk_eth_ck);
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if (ret) {
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- clk_disable_unprepare(dwmac->syscfg_clk);
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+ if (dwmac->syscfg_clk)
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+ goto unprepare_syscfg;
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return ret;
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}
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}
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} else {
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- clk_disable_unprepare(dwmac->syscfg_clk);
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- if (dwmac->int_phyclk)
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+ if (dwmac->syscfg_clk)
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+ clk_disable_unprepare(dwmac->syscfg_clk);
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+
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+ if (dwmac->clk_eth_ck)
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clk_disable_unprepare(dwmac->clk_eth_ck);
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}
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return ret;
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+
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+unprepare_syscfg:
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+ clk_disable_unprepare(dwmac->syscfg_clk);
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+
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+ return ret;
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}
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static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
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@@ -130,19 +194,22 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
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break;
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case PHY_INTERFACE_MODE_GMII:
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val = SYSCFG_PMCR_ETH_SEL_GMII;
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- if (dwmac->int_phyclk)
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+ if (dwmac->eth_clk_sel_reg)
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val |= SYSCFG_PMCR_ETH_CLK_SEL;
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pr_debug("SYSCFG init : PHY_INTERFACE_MODE_GMII\n");
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break;
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case PHY_INTERFACE_MODE_RMII:
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val = SYSCFG_PMCR_ETH_SEL_RMII;
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- if (dwmac->int_phyclk)
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+ if (dwmac->eth_ref_clk_sel_reg)
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val |= SYSCFG_PMCR_ETH_REF_CLK_SEL;
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pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RMII\n");
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break;
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case PHY_INTERFACE_MODE_RGMII:
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+ case PHY_INTERFACE_MODE_RGMII_ID:
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+ case PHY_INTERFACE_MODE_RGMII_RXID:
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+ case PHY_INTERFACE_MODE_RGMII_TXID:
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val = SYSCFG_PMCR_ETH_SEL_RGMII;
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- if (dwmac->int_phyclk)
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+ if (dwmac->eth_clk_sel_reg)
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val |= SYSCFG_PMCR_ETH_CLK_SEL;
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pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RGMII\n");
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break;
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@@ -153,6 +220,11 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
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return -EINVAL;
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}
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+ /* Need to update PMCCLRR (clear register) */
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+ regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET,
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+ dwmac->ops->syscfg_eth_mask);
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+
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+ /* Update PMCSETR (set register) */
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return regmap_update_bits(dwmac->regmap, reg,
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dwmac->ops->syscfg_eth_mask, val);
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}
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@@ -232,35 +304,65 @@ static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
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static int stm32mp1_parse_data(struct stm32_dwmac *dwmac,
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struct device *dev)
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{
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+ struct platform_device *pdev = to_platform_device(dev);
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struct device_node *np = dev->of_node;
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+ int err;
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- dwmac->int_phyclk = of_property_read_bool(np, "st,int-phyclk");
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+ /* Gigabit Ethernet 125MHz clock selection. */
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+ dwmac->eth_clk_sel_reg = of_property_read_bool(np, "st,eth_clk_sel");
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- /* Check if internal clk from RCC selected */
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- if (dwmac->int_phyclk) {
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- /* Get ETH_CLK clocks */
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- dwmac->clk_eth_ck = devm_clk_get(dev, "eth-ck");
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- if (IS_ERR(dwmac->clk_eth_ck)) {
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- dev_err(dev, "No ETH CK clock provided...\n");
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- return PTR_ERR(dwmac->clk_eth_ck);
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- }
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+ /* Ethernet 50Mhz RMII clock selection */
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+ dwmac->eth_ref_clk_sel_reg =
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+ of_property_read_bool(np, "st,eth_ref_clk_sel");
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+
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+ /* Get ETH_CLK clocks */
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+ dwmac->clk_eth_ck = devm_clk_get(dev, "eth-ck");
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+ if (IS_ERR(dwmac->clk_eth_ck)) {
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+ dev_warn(dev, "No phy clock provided...\n");
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+ dwmac->clk_eth_ck = NULL;
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}
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/* Clock used for low power mode */
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dwmac->clk_ethstp = devm_clk_get(dev, "ethstp");
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if (IS_ERR(dwmac->clk_ethstp)) {
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- dev_err(dev, "No ETH peripheral clock provided for CStop mode ...\n");
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+ dev_err(dev,
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+ "No ETH peripheral clock provided for CStop mode ...\n");
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return PTR_ERR(dwmac->clk_ethstp);
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}
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- /* Clock for sysconfig */
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+ /* Optional Clock for sysconfig */
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dwmac->syscfg_clk = devm_clk_get(dev, "syscfg-clk");
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if (IS_ERR(dwmac->syscfg_clk)) {
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- dev_err(dev, "No syscfg clock provided...\n");
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- return PTR_ERR(dwmac->syscfg_clk);
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+ err = PTR_ERR(dwmac->syscfg_clk);
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+ if (err != -ENOENT)
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+ return err;
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+ dwmac->syscfg_clk = NULL;
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}
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- return 0;
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+ err = 0;
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+ /* Get IRQ information early to have an ability to ask for deferred
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+ * probe if needed before we went too far with resource allocation.
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+ */
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+ dwmac->irq_pwr_wakeup = platform_get_irq_byname(pdev,
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+ "stm32_pwr_wakeup");
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+ if (dwmac->irq_pwr_wakeup == -EPROBE_DEFER)
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+ return -EPROBE_DEFER;
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+
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+ if ((!dwmac->clk_eth_ck) && dwmac->irq_pwr_wakeup >= 0) {
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+ err = device_init_wakeup(&pdev->dev, true);
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+ if (err) {
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+ dev_err(&pdev->dev, "Failed to init wake up irq\n");
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+ return err;
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+ }
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+ err = dev_pm_set_dedicated_wake_irq(&pdev->dev,
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+ dwmac->irq_pwr_wakeup);
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+ if (err) {
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+ dev_err(&pdev->dev, "Failed to set wake up irq\n");
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+ device_init_wakeup(&pdev->dev, false);
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+ }
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+ device_set_wakeup_enable(&pdev->dev, false);
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+ }
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+ return err;
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}
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static int stm32_dwmac_probe(struct platform_device *pdev)
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@@ -326,9 +428,15 @@ static int stm32_dwmac_remove(struct platform_device *pdev)
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct stmmac_priv *priv = netdev_priv(ndev);
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int ret = stmmac_dvr_remove(&pdev->dev);
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+ struct stm32_dwmac *dwmac = priv->plat->bsp_priv;
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stm32_dwmac_clk_disable(priv->plat->bsp_priv);
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+ if (dwmac->irq_pwr_wakeup >= 0) {
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+ dev_pm_clear_wake_irq(&pdev->dev);
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+ device_init_wakeup(&pdev->dev, false);
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+ }
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+
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return ret;
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}
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@@ -341,8 +449,9 @@ static int stm32mp1_suspend(struct stm32_dwmac *dwmac)
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return ret;
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clk_disable_unprepare(dwmac->clk_tx);
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- clk_disable_unprepare(dwmac->syscfg_clk);
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- if (dwmac->int_phyclk)
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+ if (dwmac->syscfg_clk)
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+ clk_disable_unprepare(dwmac->syscfg_clk);
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+ if (dwmac->clk_eth_ck)
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clk_disable_unprepare(dwmac->clk_eth_ck);
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return ret;
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diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
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index 49f5687..5b35071 100644
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--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
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@@ -22,7 +22,7 @@ int dwmac4_dma_reset(void __iomem *ioaddr)
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/* DMA SW reset */
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value |= DMA_BUS_MODE_SFT_RESET;
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writel(value, ioaddr + DMA_BUS_MODE);
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- limit = 10;
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+ limit = 100;
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while (limit--) {
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if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
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break;
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diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
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index 014fe93..ccb512f 100644
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--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
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@@ -2713,6 +2713,8 @@ static int stmmac_release(struct net_device *dev)
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struct stmmac_priv *priv = netdev_priv(dev);
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u32 chan;
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+ stmmac_disable_all_queues(priv);
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+
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if (priv->eee_enabled)
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del_timer_sync(&priv->eee_ctrl_timer);
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@@ -2724,8 +2726,6 @@ static int stmmac_release(struct net_device *dev)
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stmmac_stop_all_queues(priv);
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- stmmac_disable_all_queues(priv);
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-
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for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
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del_timer_sync(&priv->tx_queue[chan].txtimer);
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@@ -4501,14 +4501,13 @@ int stmmac_suspend(struct device *dev)
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if (!ndev || !netif_running(ndev))
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return 0;
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- if (ndev->phydev)
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- phy_stop(ndev->phydev);
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+ /* call carrier off first to avoid false dev_watchdog timeouts */
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+ netif_carrier_off(ndev);
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mutex_lock(&priv->lock);
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netif_device_detach(ndev);
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stmmac_stop_all_queues(priv);
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-
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stmmac_disable_all_queues(priv);
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/* Stop TX/RX DMA */
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@@ -4532,6 +4531,10 @@ int stmmac_suspend(struct device *dev)
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priv->oldlink = false;
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priv->speed = SPEED_UNKNOWN;
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priv->oldduplex = DUPLEX_UNKNOWN;
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+
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+ if (ndev->phydev)
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+ phy_stop(ndev->phydev);
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+
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return 0;
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}
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EXPORT_SYMBOL_GPL(stmmac_suspend);
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@@ -4572,6 +4575,7 @@ int stmmac_resume(struct device *dev)
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{
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struct net_device *ndev = dev_get_drvdata(dev);
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struct stmmac_priv *priv = netdev_priv(ndev);
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+ int ret;
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if (!netif_running(ndev))
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return 0;
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@@ -4601,11 +4605,32 @@ int stmmac_resume(struct device *dev)
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netif_device_attach(ndev);
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+ if (ndev->phydev)
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+ phy_start(ndev->phydev);
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+
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mutex_lock(&priv->lock);
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stmmac_reset_queues_param(priv);
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- stmmac_clear_descriptors(priv);
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+ /* Stop TX/RX DMA and clear the descriptors */
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+ stmmac_stop_all_dma(priv);
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+
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+ /* Release and free the Rx/Tx resources */
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+ free_dma_desc_resources(priv);
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+
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+ ret = alloc_dma_desc_resources(priv);
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+ if (ret < 0) {
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+ netdev_err(priv->dev, "%s: DMA descriptors allocation failed\n",
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+ __func__);
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+ goto dma_desc_error;
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+ }
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+
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+ ret = init_dma_desc_rings(ndev, GFP_KERNEL);
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+ if (ret < 0) {
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+ netdev_err(priv->dev, "%s: DMA descriptors initialization failed\n",
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+ __func__);
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+ goto init_error;
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+ }
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stmmac_hw_setup(ndev, false);
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stmmac_init_tx_coalesce(priv);
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@@ -4617,10 +4642,14 @@ int stmmac_resume(struct device *dev)
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mutex_unlock(&priv->lock);
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+ return 0;
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+init_error:
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+ free_dma_desc_resources(priv);
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+dma_desc_error:
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if (ndev->phydev)
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- phy_start(ndev->phydev);
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+ phy_disconnect(ndev->phydev);
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- return 0;
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+ return -1;
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}
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EXPORT_SYMBOL_GPL(stmmac_resume);
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diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
|
|
index 2b800ce..3031f2b 100644
|
|
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
|
|
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
|
|
@@ -408,6 +408,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
|
|
/* Default to phy auto-detection */
|
|
plat->phy_addr = -1;
|
|
|
|
+ /* Get clk_csr from device tree */
|
|
+ of_property_read_u32(np, "clk_csr", &plat->clk_csr);
|
|
+
|
|
/* "snps,phy-addr" is not a standard property. Mark it as deprecated
|
|
* and warn of its use. Remove this when phy node support is added.
|
|
*/
|
|
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
|
|
index d2f788d..c7b41ce 100644
|
|
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
|
|
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
|
|
@@ -1129,7 +1129,10 @@ static int brcmf_ops_sdio_suspend(struct device *dev)
|
|
enable_irq_wake(sdiodev->settings->bus.sdio.oob_irq_nr);
|
|
else
|
|
sdio_flags |= MMC_PM_WAKE_SDIO_IRQ;
|
|
+ } else {
|
|
+ brcmf_sdiod_intr_unregister(sdiodev);
|
|
}
|
|
+
|
|
if (sdio_set_host_pm_flags(sdiodev->func1, sdio_flags))
|
|
brcmf_err("Failed to set pm_flags %x\n", sdio_flags);
|
|
return 0;
|
|
@@ -1145,6 +1148,9 @@ static int brcmf_ops_sdio_resume(struct device *dev)
|
|
if (func->num != 2)
|
|
return 0;
|
|
|
|
+ if (!sdiodev->wowl_enabled)
|
|
+ brcmf_sdiod_intr_register(sdiodev);
|
|
+
|
|
brcmf_sdiod_freezer_off(sdiodev);
|
|
return 0;
|
|
}
|
|
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pno.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pno.c
|
|
index ffa243e..55974a4 100644
|
|
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pno.c
|
|
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pno.c
|
|
@@ -496,6 +496,11 @@ int brcmf_pno_stop_sched_scan(struct brcmf_if *ifp, u64 reqid)
|
|
brcmf_dbg(TRACE, "reqid=%llu\n", reqid);
|
|
|
|
pi = ifp_to_pno(ifp);
|
|
+
|
|
+ /* No PNO reqeuset */
|
|
+ if (!pi->n_reqs)
|
|
+ return 0;
|
|
+
|
|
err = brcmf_pno_remove_request(pi, reqid);
|
|
if (err)
|
|
return err;
|
|
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c b/drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c
|
|
index eb5db94..e7584b8 100644
|
|
--- a/drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c
|
|
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c
|
|
@@ -193,9 +193,6 @@ static void brcmu_d11ac_decchspec(struct brcmu_chan *ch)
|
|
}
|
|
break;
|
|
case BRCMU_CHSPEC_D11AC_BW_160:
|
|
- ch->bw = BRCMU_CHAN_BW_160;
|
|
- ch->sb = brcmu_maskget16(ch->chspec, BRCMU_CHSPEC_D11AC_SB_MASK,
|
|
- BRCMU_CHSPEC_D11AC_SB_SHIFT);
|
|
switch (ch->sb) {
|
|
case BRCMU_CHAN_SB_LLL:
|
|
ch->control_ch_num -= CH_70MHZ_APART;
|
|
--
|
|
2.7.4
|
|
|