242 lines
8.2 KiB
Diff
242 lines
8.2 KiB
Diff
From bf3772b12539b3595e60b8b334051160269f9071 Mon Sep 17 00:00:00 2001
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From: Christophe Priouzeau <christophe.priouzeau@st.com>
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Date: Mon, 26 Nov 2018 14:45:33 +0100
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Subject: [PATCH 28/52] ARM-stm32mp1-r0-rc2-MMC
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---
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drivers/mmc/host/mmci.c | 36 +++++++++++++++++++++++++-----------
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drivers/mmc/host/mmci.h | 13 +++++++++++--
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2 files changed, 36 insertions(+), 13 deletions(-)
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diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
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index db50d1e..02b631f 100644
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--- a/drivers/mmc/host/mmci.c
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+++ b/drivers/mmc/host/mmci.c
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@@ -135,7 +135,6 @@ static struct variant_data variant_u300 = {
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.datactrl_blocksz = 11,
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.datactrl_dpsm_enable = MCI_DPSM_ENABLE,
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.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
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- .st_sdio = true,
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.pwrreg_powerup = MCI_PWR_ON,
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.f_max = 100000000,
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.signal_direction = true,
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@@ -146,6 +145,7 @@ static struct variant_data variant_u300 = {
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.start_err = MCI_STARTBITERR,
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.opendrain = MCI_OD,
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.init = mmci_variant_init,
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+ .quirks = MMCI_QUIRK_ST_SDIO,
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};
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static struct variant_data variant_nomadik = {
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@@ -161,7 +161,6 @@ static struct variant_data variant_nomadik = {
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.datactrl_blocksz = 11,
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.datactrl_dpsm_enable = MCI_DPSM_ENABLE,
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.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
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- .st_sdio = true,
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.st_clkdiv = true,
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.pwrreg_powerup = MCI_PWR_ON,
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.f_max = 100000000,
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@@ -173,6 +172,7 @@ static struct variant_data variant_nomadik = {
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.start_err = MCI_STARTBITERR,
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.opendrain = MCI_OD,
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.init = mmci_variant_init,
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+ .quirks = MMCI_QUIRK_ST_SDIO,
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};
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static struct variant_data variant_ux500 = {
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@@ -190,7 +190,6 @@ static struct variant_data variant_ux500 = {
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.datactrl_blocksz = 11,
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.datactrl_dpsm_enable = MCI_DPSM_ENABLE,
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.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
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- .st_sdio = true,
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.st_clkdiv = true,
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.pwrreg_powerup = MCI_PWR_ON,
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.f_max = 100000000,
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@@ -206,6 +205,7 @@ static struct variant_data variant_ux500 = {
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.start_err = MCI_STARTBITERR,
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.opendrain = MCI_OD,
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.init = mmci_variant_init,
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+ .quirks = MMCI_QUIRK_ST_SDIO,
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};
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static struct variant_data variant_ux500v2 = {
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@@ -224,7 +224,6 @@ static struct variant_data variant_ux500v2 = {
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.datactrl_blocksz = 11,
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.datactrl_dpsm_enable = MCI_DPSM_ENABLE,
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.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
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- .st_sdio = true,
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.st_clkdiv = true,
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.blksz_datactrl16 = true,
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.pwrreg_powerup = MCI_PWR_ON,
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@@ -241,6 +240,7 @@ static struct variant_data variant_ux500v2 = {
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.start_err = MCI_STARTBITERR,
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.opendrain = MCI_OD,
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.init = mmci_variant_init,
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+ .quirks = MMCI_QUIRK_ST_SDIO,
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};
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static struct variant_data variant_stm32 = {
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@@ -259,13 +259,13 @@ static struct variant_data variant_stm32 = {
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.datactrl_blocksz = 11,
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.datactrl_dpsm_enable = MCI_DPSM_ENABLE,
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.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
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- .st_sdio = true,
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.st_clkdiv = true,
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.pwrreg_powerup = MCI_PWR_ON,
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.f_max = 48000000,
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.pwrreg_clkgate = true,
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.pwrreg_nopower = true,
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.init = mmci_variant_init,
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+ .quirks = MMCI_QUIRK_ST_SDIO,
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};
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static struct variant_data variant_stm32_sdmmc = {
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@@ -284,12 +284,14 @@ static struct variant_data variant_stm32_sdmmc = {
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.datacnt_useless = true,
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.datalength_bits = 25,
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.datactrl_blocksz = 14,
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+ .datactrl_mask_sdio = MCI_DPSM_STM32_SDIOEN,
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.stm32_idmabsize_mask = GENMASK(12, 5),
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.busy_detect = true,
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.busy_timeout = true,
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.busy_detect_flag = MCI_STM32_BUSYD0,
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.busy_detect_mask = MCI_STM32_BUSYD0ENDMASK,
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.init = sdmmc_variant_init,
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+ .quirks = MMCI_QUIRK_STM32_DTMODE,
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};
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static struct variant_data variant_stm32_sdmmcv2 = {
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@@ -308,6 +310,7 @@ static struct variant_data variant_stm32_sdmmcv2 = {
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.datacnt_useless = true,
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.datalength_bits = 25,
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.datactrl_blocksz = 14,
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+ .datactrl_mask_sdio = MCI_DPSM_STM32_SDIOEN,
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.stm32_idmabsize_mask = GENMASK(16, 5),
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.dma_lli = true,
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.busy_detect = true,
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@@ -315,6 +318,7 @@ static struct variant_data variant_stm32_sdmmcv2 = {
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.busy_detect_flag = MCI_STM32_BUSYD0,
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.busy_detect_mask = MCI_STM32_BUSYD0ENDMASK,
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.init = sdmmc_variant_init,
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+ .quirks = MMCI_QUIRK_STM32_DTMODE,
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};
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static struct variant_data variant_qcom = {
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@@ -505,7 +509,8 @@ static int mmci_validate_data(struct mmci_host *host,
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if (!data)
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return 0;
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- if (!is_power_of_2(data->blksz)) {
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+ if ((host->mmc->card && !mmc_card_sdio(host->mmc->card)) &&
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+ !is_power_of_2(data->blksz)) {
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dev_err(mmc_dev(host->mmc),
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"unsupported block size (%d bytes)\n", data->blksz);
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return -EINVAL;
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@@ -1068,7 +1073,6 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
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writel(host->size, base + MMCIDATALENGTH);
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blksz_bits = ffs(data->blksz) - 1;
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- BUG_ON(1 << blksz_bits != data->blksz);
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if (variant->blksz_datactrl16)
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datactrl = variant->datactrl_dpsm_enable | (data->blksz << 16);
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@@ -1077,6 +1081,16 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
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else
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datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4;
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+ if (variant->quirks & MMCI_QUIRK_STM32_DTMODE) {
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+ if (host->mmc->card && mmc_card_sdio(host->mmc->card) &&
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+ data->blocks == 1)
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+ datactrl |= MCI_DPSM_STM32_MODE_SDIO;
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+ else if (data->stop && !host->mrq->sbc)
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+ datactrl |= MCI_DPSM_STM32_MODE_BLOCK_STOP;
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+ else
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+ datactrl |= MCI_DPSM_STM32_MODE_BLOCK;
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+ }
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+
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if (data->flags & MMC_DATA_READ)
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datactrl |= MCI_DPSM_DIRECTION;
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@@ -1091,7 +1105,8 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
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* otherwise the transfer will not start. The threshold
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* depends on the rate of MCLK.
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*/
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- if (variant->st_sdio && data->flags & MMC_DATA_WRITE &&
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+ if (variant->quirks & MMCI_QUIRK_ST_SDIO &&
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+ data->flags & MMC_DATA_WRITE &&
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(host->size < 8 ||
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(host->size <= 8 && host->mclk > 50000000)))
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clk = host->clk_reg & ~variant->clkreg_enable;
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@@ -1257,11 +1272,10 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
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/* The error clause is handled above, success! */
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data->bytes_xfered = data->blksz * data->blocks;
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- if (!data->stop || host->mrq->sbc) {
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+ if (!data->stop || (host->mrq->sbc && !data->error))
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mmci_request_end(host, data->mrq);
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- } else {
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+ else
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mmci_start_command(host, data->stop, 0);
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- }
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}
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}
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diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
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index 36a744a..55867fc 100644
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--- a/drivers/mmc/host/mmci.h
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+++ b/drivers/mmc/host/mmci.h
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@@ -131,6 +131,12 @@
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/* Control register extensions in the Qualcomm versions */
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#define MCI_DPSM_QCOM_DATA_PEND BIT(17)
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#define MCI_DPSM_QCOM_RX_DATA_PEND BIT(20)
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+/* Control register extensions in STM32 versions */
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+#define MCI_DPSM_STM32_MODE_BLOCK (0 << 2)
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+#define MCI_DPSM_STM32_MODE_SDIO (1 << 2)
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+#define MCI_DPSM_STM32_MODE_STREAM (2 << 2)
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+#define MCI_DPSM_STM32_MODE_BLOCK_STOP (3 << 2)
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+#define MCI_DPSM_STM32_SDIOEN BIT(11)
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#define MMCIDATACNT 0x030
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#define MMCISTATUS 0x034
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@@ -273,7 +279,6 @@ struct mmci_host;
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* @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY
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* is asserted (likewise for RX)
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* @data_cmd_enable: enable value for data commands.
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- * @st_sdio: enable ST specific SDIO logic
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* @st_clkdiv: true if using a ST-specific clock divider algorithm
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* @stm32_clkdiv: true if using a STM32-specific clock divider algorithm
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* @datactrl_mask_ddrmode: ddr mode mask in datactrl register.
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@@ -309,6 +314,7 @@ struct mmci_host;
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* @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register
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* @dma_lli: true if variant has dma link list feature.
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* @stm32_idmabsize_mask: stm32 sdmmc idma buffer size.
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+ * @quirks: A bitmap of hardware quirks that require some special action.
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*/
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struct variant_data {
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unsigned int clkreg;
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@@ -330,7 +336,6 @@ struct variant_data {
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unsigned int datactrl_dpsm_enable;
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u8 datactrl_first:1;
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u8 datacnt_useless:1;
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- u8 st_sdio:1;
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u8 st_clkdiv:1;
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u8 stm32_clkdiv:1;
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u8 blksz_datactrl16:1;
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@@ -355,9 +360,13 @@ struct variant_data {
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u32 opendrain;
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u8 dma_lli:1;
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u32 stm32_idmabsize_mask;
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+ u32 quirks;
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void (*init)(struct mmci_host *host);
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};
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+#define MMCI_QUIRK_STM32_DTMODE BIT(0)
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+#define MMCI_QUIRK_ST_SDIO BIT(2) /* enable ST specific SDIO logic */
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+
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/* mmci variant callbacks */
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struct mmci_host_ops {
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int (*validate_data)(struct mmci_host *host, struct mmc_data *data);
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--
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2.7.4
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