459 lines
15 KiB
Diff
459 lines
15 KiB
Diff
From df2861a1384f3bf2ab8236ee51f8a5ff40e8f45b Mon Sep 17 00:00:00 2001
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From: Antonio Borneo <antonio.borneo@st.com>
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Date: Fri, 12 Oct 2018 11:49:18 +0200
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Subject: [PATCH] Add support for silicon revB
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---
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src/jtag/drivers/cmsis_dap_usb.c | 4 +-
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src/jtag/drivers/libusb0_common.c | 7 ++
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src/jtag/drivers/libusb1_common.c | 7 ++
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tcl/board/stm32mp15x_dk2.cfg | 2 +-
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tcl/board/stm32mp15x_ev1_jlink_jtag.cfg | 2 +-
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tcl/board/stm32mp15x_ev1_jlink_swd.cfg | 2 +-
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tcl/board/stm32mp15x_ev1_stlink_jtag.cfg | 2 +-
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tcl/board/stm32mp15x_ev1_stlink_swd.cfg | 2 +-
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tcl/board/stm32mp15x_ev1_ulink2_jtag.cfg | 2 +-
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tcl/board/stm32mp15x_ev1_ulink2_swd.cfg | 2 +-
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tcl/target/stm32mp15x.cfg | 11 ++-
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tcl/target/stm32mp15x_stpmic1.cfg | 113 +++++++++++++++++++++++++++++++
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tcl/target/stm32mp15x_stpmu1.cfg | 113 -------------------------------
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13 files changed, 145 insertions(+), 124 deletions(-)
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diff --git a/src/jtag/drivers/cmsis_dap_usb.c b/src/jtag/drivers/cmsis_dap_usb.c
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index 4ee4836..9e723b5 100644
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--- a/src/jtag/drivers/cmsis_dap_usb.c
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+++ b/src/jtag/drivers/cmsis_dap_usb.c
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@@ -895,9 +895,7 @@ static int cmsis_dap_init(void)
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retval = cmsis_dap_swd_open();
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if (retval != ERROR_OK)
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return retval;
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- }
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-
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- if (cmsis_dap_handle == NULL) {
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+ } else {
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/* Connect in JTAG mode */
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if (!(cmsis_dap_handle->caps & INFO_CAPS_JTAG)) {
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LOG_ERROR("CMSIS-DAP: JTAG not supported");
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diff --git a/src/jtag/drivers/libusb0_common.c b/src/jtag/drivers/libusb0_common.c
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index 1825543..04f88b6 100644
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--- a/src/jtag/drivers/libusb0_common.c
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+++ b/src/jtag/drivers/libusb0_common.c
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@@ -68,6 +68,7 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[],
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struct jtag_libusb_device_handle **out)
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{
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int retval = -ENODEV;
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+ bool serial_mismatch = false;
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struct jtag_libusb_device_handle *libusb_handle;
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usb_init();
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@@ -90,14 +91,20 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[],
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/* Device must be open to use libusb_get_string_descriptor_ascii. */
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if (serial != NULL &&
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!string_descriptor_equal(libusb_handle, dev->descriptor.iSerialNumber, serial)) {
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+ serial_mismatch = true;
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usb_close(libusb_handle);
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continue;
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}
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*out = libusb_handle;
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retval = 0;
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+ serial_mismatch = false;
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break;
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}
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}
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+
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+ if (serial_mismatch)
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+ LOG_DEBUG("No device matches the serial string");
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+
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return retval;
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}
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diff --git a/src/jtag/drivers/libusb1_common.c b/src/jtag/drivers/libusb1_common.c
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index a1db86f..0ec5fb9 100644
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--- a/src/jtag/drivers/libusb1_common.c
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+++ b/src/jtag/drivers/libusb1_common.c
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@@ -72,6 +72,7 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[],
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{
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int cnt, idx, errCode;
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int retval = ERROR_FAIL;
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+ bool serial_mismatch = false;
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struct jtag_libusb_device_handle *libusb_handle = NULL;
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if (libusb_init(&jtag_libusb_context) < 0)
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@@ -99,6 +100,7 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[],
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/* Device must be open to use libusb_get_string_descriptor_ascii. */
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if (serial != NULL &&
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!string_descriptor_equal(libusb_handle, dev_desc.iSerialNumber, serial)) {
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+ serial_mismatch = true;
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libusb_close(libusb_handle);
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continue;
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}
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@@ -106,10 +108,15 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[],
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/* Success. */
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*out = libusb_handle;
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retval = ERROR_OK;
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+ serial_mismatch = false;
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break;
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}
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if (cnt >= 0)
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libusb_free_device_list(devs, 1);
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+
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+ if (serial_mismatch)
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+ LOG_DEBUG("No device matches the serial string");
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+
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return retval;
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}
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diff --git a/tcl/board/stm32mp15x_dk2.cfg b/tcl/board/stm32mp15x_dk2.cfg
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index 82617c5..8d673fa 100644
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--- a/tcl/board/stm32mp15x_dk2.cfg
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+++ b/tcl/board/stm32mp15x_dk2.cfg
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@@ -4,6 +4,6 @@ source [find interface/stlink-dap.cfg]
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transport select stlink_swd
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-source [find target/stm32mp15x_stpmu1.cfg]
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+source [find target/stm32mp15x_stpmic1.cfg]
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reset_config srst_only
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diff --git a/tcl/board/stm32mp15x_ev1_jlink_jtag.cfg b/tcl/board/stm32mp15x_ev1_jlink_jtag.cfg
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index 7d74fa6..665dc82 100644
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--- a/tcl/board/stm32mp15x_ev1_jlink_jtag.cfg
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+++ b/tcl/board/stm32mp15x_ev1_jlink_jtag.cfg
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@@ -4,6 +4,6 @@ source [find interface/jlink.cfg]
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transport select jtag
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-source [find target/stm32mp15x_stpmu1.cfg]
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+source [find target/stm32mp15x_stpmic1.cfg]
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reset_config trst_and_srst separate
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diff --git a/tcl/board/stm32mp15x_ev1_jlink_swd.cfg b/tcl/board/stm32mp15x_ev1_jlink_swd.cfg
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index 33e6ef5..7ca27af 100644
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--- a/tcl/board/stm32mp15x_ev1_jlink_swd.cfg
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+++ b/tcl/board/stm32mp15x_ev1_jlink_swd.cfg
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@@ -4,6 +4,6 @@ source [find interface/jlink.cfg]
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transport select swd
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-source [find target/stm32mp15x_stpmu1.cfg]
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+source [find target/stm32mp15x_stpmic1.cfg]
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reset_config srst_only
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diff --git a/tcl/board/stm32mp15x_ev1_stlink_jtag.cfg b/tcl/board/stm32mp15x_ev1_stlink_jtag.cfg
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index 6fb1e31..9364c92 100644
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--- a/tcl/board/stm32mp15x_ev1_stlink_jtag.cfg
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+++ b/tcl/board/stm32mp15x_ev1_stlink_jtag.cfg
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@@ -4,6 +4,6 @@ source [find interface/stlink-dap.cfg]
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transport select stlink_jtag
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-source [find target/stm32mp15x_stpmu1.cfg]
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+source [find target/stm32mp15x_stpmic1.cfg]
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reset_config trst_and_srst separate
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diff --git a/tcl/board/stm32mp15x_ev1_stlink_swd.cfg b/tcl/board/stm32mp15x_ev1_stlink_swd.cfg
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index 3c561c9..d8527ee 100644
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--- a/tcl/board/stm32mp15x_ev1_stlink_swd.cfg
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+++ b/tcl/board/stm32mp15x_ev1_stlink_swd.cfg
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@@ -4,6 +4,6 @@ source [find interface/stlink-dap.cfg]
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transport select stlink_swd
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-source [find target/stm32mp15x_stpmu1.cfg]
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+source [find target/stm32mp15x_stpmic1.cfg]
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reset_config srst_only
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diff --git a/tcl/board/stm32mp15x_ev1_ulink2_jtag.cfg b/tcl/board/stm32mp15x_ev1_ulink2_jtag.cfg
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index 6b10351..c7954ea 100644
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--- a/tcl/board/stm32mp15x_ev1_ulink2_jtag.cfg
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+++ b/tcl/board/stm32mp15x_ev1_ulink2_jtag.cfg
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@@ -4,6 +4,6 @@ source [find interface/cmsis-dap.cfg]
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transport select jtag
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-source [find target/stm32mp15x_stpmu1.cfg]
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+source [find target/stm32mp15x_stpmic1.cfg]
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reset_config trst_and_srst separate
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diff --git a/tcl/board/stm32mp15x_ev1_ulink2_swd.cfg b/tcl/board/stm32mp15x_ev1_ulink2_swd.cfg
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index 5495bc3..b00cc61 100644
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--- a/tcl/board/stm32mp15x_ev1_ulink2_swd.cfg
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+++ b/tcl/board/stm32mp15x_ev1_ulink2_swd.cfg
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@@ -4,6 +4,6 @@ source [find interface/cmsis-dap.cfg]
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transport select swd
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-source [find target/stm32mp15x_stpmu1.cfg]
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+source [find target/stm32mp15x_stpmic1.cfg]
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reset_config srst_only
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diff --git a/tcl/target/stm32mp15x.cfg b/tcl/target/stm32mp15x.cfg
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index 0def780..5d7e230 100644
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--- a/tcl/target/stm32mp15x.cfg
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+++ b/tcl/target/stm32mp15x.cfg
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@@ -77,7 +77,7 @@ proc delayed_reset_halt_cpu0 { } {
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global _CHIPNAME
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global arp_reset_mode
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- set rom_halt_pc 0x0000688c
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+ set rom_halt_pc 0x000079ac
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# only "reset halt" or "reset init"
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if { 0 != [ string compare "$arp_reset_mode" "run" ] } {
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@@ -85,6 +85,15 @@ proc delayed_reset_halt_cpu0 { } {
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targets $_CHIPNAME.cpu0
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arp_reset_default_handler post $_CHIPNAME.cpu0
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+ # quick test for cut1.0, check bootrom
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+ set v ""
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+ ap0_non_secure_access
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+ mem2array v 32 0x0000a000 1 phys
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+ ap0_secure_access
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+ if { $v(0) == 0x1e494610 } {
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+ set rom_halt_pc 0x0000688c
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+ }
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+
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poll on
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catch { $_CHIPNAME.cpu0 arp_waitstate halted 1000 }
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bp $rom_halt_pc 2 hw
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diff --git a/tcl/target/stm32mp15x_stpmic1.cfg b/tcl/target/stm32mp15x_stpmic1.cfg
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new file mode 100644
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index 0000000..c080441
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--- /dev/null
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+++ b/tcl/target/stm32mp15x_stpmic1.cfg
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@@ -0,0 +1,113 @@
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+# script for stm32mp15x family with companion PMIC STPMIC1
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+
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+source [find target/stm32mp15x.cfg]
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+
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+$_CHIPNAME.cpu0 configure -event reset-halt { catch { pmic_init }}
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+
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+# Wait for expression to be true with a timeout of 200ms
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+proc wait_state {condition} {
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+ for {set t 0} {$t < 200} {incr t} {
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+ if {[uplevel 1 $condition] == 0} {
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+ return
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+ }
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+ sleep 1
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+ }
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+ return -code 1 "Timed out"
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+}
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+
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+proc mrw_phys {reg} {
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+ set value ""
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+ mem2array value 32 $reg 1 phys
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+ return $value(0)
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+}
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+
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+proc mmw_phys {reg setbits clearbits} {
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+ set old [mrw_phys $reg]
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+ set new [expr ($old & ~$clearbits) | $setbits]
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+ mww phys $reg $new
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+}
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+
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+# Set mask_reset bits in PMIC to keep all powers on at next reset event
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+# Only the mask_reset of SD-card power is not enabled to guarantee boot from SD
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+# This procedure requires Secure memory access
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+proc pmic_init {} {
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+ global _CHIPNAME
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+
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+ targets $_CHIPNAME.cpu0
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+ $_CHIPNAME.dap apsel 0
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+
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+ set RCC_BASE 0x50000000
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+ set GPIO_BASE 0x54004000
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+ set I2C_BASE 0x5c002000
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+
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+ # i2c @ 100kHz, rise 100ns, fall 100ns
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+ # timing depending from HSIDIV[1:0] = {0 1 2 3} means hsi_ker_ck = {64 32 16 8} MHz
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+ set I2C_TIMING {0x10b17db5 0x00b07cb4 0x00503d58 0x00201d2b}
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+
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+ mww phys [expr $RCC_BASE + 0x00c] 1; # set HSION = 1 (enable HSI)
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+ mww phys [expr $RCC_BASE + 0x0c0] 2; # set I2C46SRC[2:0] = 2 (hsi_ker_ck)
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+
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+ mww phys [expr $RCC_BASE + 0x208] 4; # set I2C4EN = 1
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+ mww phys [expr $RCC_BASE + 0x188] 4; # assert I2C4RST
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+ mww phys [expr $RCC_BASE + 0x18c] 4; # deassert I2C4RST
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+
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+ mww phys [expr $RCC_BASE + 0x210] 1; # set GPIOZEN = 1 (enable GPIOZ)
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+ mmw_phys [expr $GPIO_BASE + 0x00] 0x00000a00 0x00000f00; # GPIOZ4/5 AF
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+ mmw_phys [expr $GPIO_BASE + 0x04] 0x00000030 0x00000000; # GPIOZ4/5 open drain
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+ mmw_phys [expr $GPIO_BASE + 0x08] 0x00000000 0x00000f00; # GPIOZ4/5 low speed
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+ mmw_phys [expr $GPIO_BASE + 0x0c] 0x00000000 0x00000f00; # GPIOZ4/5 no pull-up/down
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+ mmw_phys [expr $GPIO_BASE + 0x20] 0x00660000 0x00ff0000; # GPIOZ4/5 AF6
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+
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+ set hsidiv [expr [mrw_phys [expr $RCC_BASE + 0x018]] & 0x3]
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+ mww phys [expr $I2C_BASE + 0x010] [lindex $I2C_TIMING $hsidiv]
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+ mww phys [expr $I2C_BASE + 0x000] 1; # set PE = 1
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+ mww phys [expr $I2C_BASE + 0x004] 0x02043066
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+ wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000002) == 0}}; # wait TXIS
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+ mww phys [expr $I2C_BASE + 0x028] 0x18
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+ wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000002) == 0}}; # wait TXIS
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+ mww phys [expr $I2C_BASE + 0x028] 0x0f
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+ wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000002) == 0}}; # wait TXIS
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+ mww phys [expr $I2C_BASE + 0x028] 0x00
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+ wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000002) == 0}}; # wait TXIS
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+ mww phys [expr $I2C_BASE + 0x028] 0x6f
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+ wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000020) == 0}}; # wait STOPF
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+ mww phys [expr $I2C_BASE + 0x01c] 0x00000020
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+ mww phys [expr $I2C_BASE + 0x004] 0x01ff14fe
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+
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+# mww phys [expr $RCC_BASE + 0x20c] 4; # set I2C4EN = 0 (disable I2C4)
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+# mww phys [expr $RCC_BASE + 0x214] 1; # set GPIOZEN = 0 (disable GPIOZ)
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+}
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+
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+# Set bit 16 in TAMP_BACKUP_REGISTER(20) to signal to SPL and TF-A that we
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+# are in a debug session. This will force them (at next reboot) to program
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+# the PMIC for keeping powered-on the debug unit during reset.
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+proc set_pmic_in_backup_reg {} {
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+ global _CHIPNAME
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+
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+ targets $_CHIPNAME.cpu0
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+ $_CHIPNAME.dap apsel 0
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+
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+ mmw_phys 0x5c00a150 0x00010000 0x00000000
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+}
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+
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+proc clear_pmic_in_backup_reg {} {
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+ global _CHIPNAME
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+
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+ targets $_CHIPNAME.cpu0
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+ $_CHIPNAME.dap apsel 0
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+
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+ mmw_phys 0x5c00a150 0x00000000 0x00010000
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+}
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+
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+# Wrap around init/shutdown. Attention: CTRL-C will not invoke shutdown
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+rename init _init
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+proc init {} {
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+ _init
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+ set_pmic_in_backup_reg
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+}
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+
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+rename shutdown _shutdown
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+proc shutdown {} {
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+ clear_pmic_in_backup_reg
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+ _shutdown
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+}
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diff --git a/tcl/target/stm32mp15x_stpmu1.cfg b/tcl/target/stm32mp15x_stpmu1.cfg
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deleted file mode 100644
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index 413abf2..0000000
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--- a/tcl/target/stm32mp15x_stpmu1.cfg
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+++ /dev/null
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@@ -1,113 +0,0 @@
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-# script for stm32mp15x family with companion PMIC STPMU1
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-
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-source [find target/stm32mp15x.cfg]
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-
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-$_CHIPNAME.cpu0 configure -event reset-halt { catch { pmic_init }}
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-
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-# Wait for expression to be true with a timeout of 200ms
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-proc wait_state {condition} {
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- for {set t 0} {$t < 200} {incr t} {
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- if {[uplevel 1 $condition] == 0} {
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- return
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- }
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- sleep 1
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- }
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- return -code 1 "Timed out"
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-}
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-
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-proc mrw_phys {reg} {
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- set value ""
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- mem2array value 32 $reg 1 phys
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- return $value(0)
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-}
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-
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-proc mmw_phys {reg setbits clearbits} {
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- set old [mrw_phys $reg]
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- set new [expr ($old & ~$clearbits) | $setbits]
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- mww phys $reg $new
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-}
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-
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-# Set mask_reset bits in PMIC to keep all powers on at next reset event
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-# Only the mask_reset of SD-card power is not enabled to guarantee boot from SD
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-# This procedure requires Secure memory access
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-proc pmic_init {} {
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- global _CHIPNAME
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-
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- targets $_CHIPNAME.cpu0
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- $_CHIPNAME.dap apsel 0
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-
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- set RCC_BASE 0x50000000
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- set GPIO_BASE 0x54004000
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- set I2C_BASE 0x5c002000
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-
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- # i2c @ 100kHz, rise 100ns, fall 100ns
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- # timing depending from HSIDIV[1:0] = {0 1 2 3} means hsi_ker_ck = {64 32 16 8} MHz
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- set I2C_TIMING {0x10b17db5 0x00b07cb4 0x00503d58 0x00201d2b}
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-
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- mww phys [expr $RCC_BASE + 0x00c] 1; # set HSION = 1 (enable HSI)
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- mww phys [expr $RCC_BASE + 0x0c0] 2; # set I2C46SRC[2:0] = 2 (hsi_ker_ck)
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-
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- mww phys [expr $RCC_BASE + 0x208] 4; # set I2C4EN = 1
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- mww phys [expr $RCC_BASE + 0x188] 4; # assert I2C4RST
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- mww phys [expr $RCC_BASE + 0x18c] 4; # deassert I2C4RST
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-
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- mww phys [expr $RCC_BASE + 0x210] 1; # set GPIOZEN = 1 (enable GPIOZ)
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- mmw_phys [expr $GPIO_BASE + 0x00] 0x00000a00 0x00000f00; # GPIOZ4/5 AF
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- mmw_phys [expr $GPIO_BASE + 0x04] 0x00000030 0x00000000; # GPIOZ4/5 open drain
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- mmw_phys [expr $GPIO_BASE + 0x08] 0x00000000 0x00000f00; # GPIOZ4/5 low speed
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- mmw_phys [expr $GPIO_BASE + 0x0c] 0x00000000 0x00000f00; # GPIOZ4/5 no pull-up/down
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- mmw_phys [expr $GPIO_BASE + 0x20] 0x00660000 0x00ff0000; # GPIOZ4/5 AF6
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|
-
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- set hsidiv [expr [mrw_phys [expr $RCC_BASE + 0x018]] & 0x3]
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- mww phys [expr $I2C_BASE + 0x010] [lindex $I2C_TIMING $hsidiv]
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- mww phys [expr $I2C_BASE + 0x000] 1; # set PE = 1
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- mww phys [expr $I2C_BASE + 0x004] 0x02043066
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- wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000002) == 0}}; # wait TXIS
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- mww phys [expr $I2C_BASE + 0x028] 0x18
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- wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000002) == 0}}; # wait TXIS
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- mww phys [expr $I2C_BASE + 0x028] 0x0f
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- wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000002) == 0}}; # wait TXIS
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- mww phys [expr $I2C_BASE + 0x028] 0x00
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|
- wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000002) == 0}}; # wait TXIS
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|
- mww phys [expr $I2C_BASE + 0x028] 0x6f
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|
- wait_state {expr {([mrw_phys [expr $I2C_BASE + 0x018]] & 0x00000020) == 0}}; # wait STOPF
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|
- mww phys [expr $I2C_BASE + 0x01c] 0x00000020
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|
- mww phys [expr $I2C_BASE + 0x004] 0x01ff14fe
|
|
-
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-# mww phys [expr $RCC_BASE + 0x20c] 4; # set I2C4EN = 0 (disable I2C4)
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|
-# mww phys [expr $RCC_BASE + 0x214] 1; # set GPIOZEN = 0 (disable GPIOZ)
|
|
-}
|
|
-
|
|
-# Set bit 16 in TAMP_BACKUP_REGISTER(20) to signal to SPL and TF-A that we
|
|
-# are in a debug session. This will force them (at next reboot) to program
|
|
-# the PMIC for keeping powered-on the debug unit during reset.
|
|
-proc set_pmic_in_backup_reg {} {
|
|
- global _CHIPNAME
|
|
-
|
|
- targets $_CHIPNAME.cpu0
|
|
- $_CHIPNAME.dap apsel 0
|
|
-
|
|
- mmw_phys 0x5c00a150 0x00010000 0x00000000
|
|
-}
|
|
-
|
|
-proc clear_pmic_in_backup_reg {} {
|
|
- global _CHIPNAME
|
|
-
|
|
- targets $_CHIPNAME.cpu0
|
|
- $_CHIPNAME.dap apsel 0
|
|
-
|
|
- mmw_phys 0x5c00a150 0x00000000 0x00010000
|
|
-}
|
|
-
|
|
-# Wrap around init/shutdown. Attention: CTRL-C will not invoke shutdown
|
|
-rename init _init
|
|
-proc init {} {
|
|
- _init
|
|
- set_pmic_in_backup_reg
|
|
-}
|
|
-
|
|
-rename shutdown _shutdown
|
|
-proc shutdown {} {
|
|
- clear_pmic_in_backup_reg
|
|
- _shutdown
|
|
-}
|
|
--
|
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2.7.4
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