336 lines
9.2 KiB
Diff
336 lines
9.2 KiB
Diff
From a38a0eadf1db60bd8d1ff084c2ddc8016432b4fb Mon Sep 17 00:00:00 2001
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From: Romuald JEANNE <romuald.jeanne@st.com>
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Date: Tue, 13 Nov 2018 12:25:05 +0100
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Subject: [PATCH 11/52] ARM: stm32mp1-r0-rc1: NVMEM
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---
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drivers/nvmem/Kconfig | 10 ++
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drivers/nvmem/Makefile | 2 +
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drivers/nvmem/core.c | 37 ++++++++
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drivers/nvmem/stm32-romem.c | 205 +++++++++++++++++++++++++++++++++++++++++
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include/linux/nvmem-consumer.h | 7 ++
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5 files changed, 261 insertions(+)
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create mode 100644 drivers/nvmem/stm32-romem.c
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diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
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index 0a7a470e..f398b18 100644
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--- a/drivers/nvmem/Kconfig
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+++ b/drivers/nvmem/Kconfig
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@@ -113,6 +113,16 @@ config NVMEM_BCM_OCOTP
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This driver can also be built as a module. If so, the module
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will be called nvmem-bcm-ocotp.
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+config NVMEM_STM32_ROMEM
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+ tristate "STMicroelectronics STM32 factory-programmed memory support"
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+ depends on ARCH_STM32 || COMPILE_TEST
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+ help
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+ Say y here to enable read-only access for STMicroelectronics STM32
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+ factory-programmed memory area.
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+
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+ This driver can also be built as a module. If so, the module
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+ will be called nvmem-stm32-romem.
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+
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config NVMEM_SUNXI_SID
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tristate "Allwinner SoCs SID support"
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depends on ARCH_SUNXI
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diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
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index 4e8c616..e85c946 100644
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--- a/drivers/nvmem/Makefile
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+++ b/drivers/nvmem/Makefile
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@@ -26,6 +26,8 @@ nvmem_qfprom-y := qfprom.o
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obj-$(CONFIG_ROCKCHIP_EFUSE) += nvmem_rockchip_efuse.o
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nvmem_rockchip_efuse-y := rockchip-efuse.o
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obj-$(CONFIG_NVMEM_SUNXI_SID) += nvmem_sunxi_sid.o
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+nvmem_stm32_romem-y := stm32-romem.o
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+obj-$(CONFIG_NVMEM_STM32_ROMEM) += nvmem_stm32_romem.o
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nvmem_sunxi_sid-y := sunxi_sid.o
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obj-$(CONFIG_UNIPHIER_EFUSE) += nvmem-uniphier-efuse.o
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nvmem-uniphier-efuse-y := uniphier-efuse.o
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diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
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index 7c530c8..60dacd7 100644
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--- a/drivers/nvmem/core.c
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+++ b/drivers/nvmem/core.c
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@@ -1234,6 +1234,43 @@ int nvmem_cell_read_u32(struct device *dev, const char *cell_id, u32 *val)
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EXPORT_SYMBOL_GPL(nvmem_cell_read_u32);
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/**
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+ * nvmem_cell_read_u16() - Read a cell value as an u16
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+ *
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+ * @dev: Device that requests the nvmem cell.
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+ * @cell_id: Name of nvmem cell to read.
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+ * @val: pointer to output value.
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+ *
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+ * Return: 0 on success or negative errno.
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+ */
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+int nvmem_cell_read_u16(struct device *dev, const char *cell_id, u16 *val)
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+{
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+ struct nvmem_cell *cell;
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+ void *buf;
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+ size_t len;
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+
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+ cell = nvmem_cell_get(dev, cell_id);
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+ if (IS_ERR(cell))
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+ return PTR_ERR(cell);
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+
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+ buf = nvmem_cell_read(cell, &len);
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+ if (IS_ERR(buf)) {
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+ nvmem_cell_put(cell);
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+ return PTR_ERR(buf);
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+ }
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+ if (len != sizeof(*val)) {
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+ kfree(buf);
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+ nvmem_cell_put(cell);
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+ return -EINVAL;
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+ }
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+ memcpy(val, buf, sizeof(*val));
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+ kfree(buf);
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+ nvmem_cell_put(cell);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(nvmem_cell_read_u16);
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+
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+/**
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* nvmem_device_cell_read() - Read a given nvmem device and cell
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*
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* @nvmem: nvmem device to read from.
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diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c
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new file mode 100644
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index 0000000..198872f
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--- /dev/null
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+++ b/drivers/nvmem/stm32-romem.c
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@@ -0,0 +1,205 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * STM32 Factory-programmed memory read access driver
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+ *
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+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
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+ * Author: Fabrice Gasnier <fabrice.gasnier@st.com> for STMicroelectronics.
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+ */
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+
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+#include <linux/arm-smccc.h>
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+#include <linux/io.h>
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+#include <linux/module.h>
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+#include <linux/nvmem-provider.h>
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+#include <linux/of_device.h>
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+
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+/* BSEC secure service access from non-secure */
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+#define STM32_SMC_BSEC 0x82001003
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+#define STM32_SMC_READ_SHADOW 0x01
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+#define STM32_SMC_PROG_OTP 0x02
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+#define STM32_SMC_WRITE_SHADOW 0x03
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+#define STM32_SMC_READ_OTP 0x04
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+
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+struct stm32_romem_cfg {
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+ int size;
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+};
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+
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+struct stm32_romem_priv {
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+ void __iomem *base;
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+ struct nvmem_config cfg;
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+ struct device *dev;
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+};
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+
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+static int stm32_romem_read(void *context, unsigned int offset, void *buf,
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+ size_t bytes)
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+{
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+ struct stm32_romem_priv *priv = context;
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+ u8 *buf8 = buf;
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+ int i;
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+
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+ for (i = offset; i < offset + bytes; i++)
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+ *buf8++ = readb_relaxed(priv->base + i);
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+
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+ return 0;
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+}
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+
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+static int stm32_bsec_smc(u8 op, u32 otp, u32 data, u32 *result)
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+{
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+#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC)
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+ struct arm_smccc_res res;
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+
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+ arm_smccc_smc(STM32_SMC_BSEC, op, otp, data, 0, 0, 0, 0, &res);
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+ if (res.a0)
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+ return -EIO;
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+
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+ if (result)
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+ *result = (u32)res.a1;
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+
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+ return 0;
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+#else
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+ return -ENXIO;
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+#endif
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+}
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+
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+static int stm32_bsec_read(void *context, unsigned int offset, void *buf,
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+ size_t bytes)
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+{
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+ struct stm32_romem_priv *priv = context;
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+ u32 roffset, rbytes, val;
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+ u8 *buf8 = buf, *val8 = (u8 *)&val;
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+ int i, j = 0, ret, skip_bytes, size;
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+
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+ /* Round unaligned access to 32-bits */
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+ roffset = rounddown(offset, 4);
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+ skip_bytes = offset & 0x3;
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+ rbytes = roundup(bytes + skip_bytes, 4);
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+
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+ if (roffset + rbytes > priv->cfg.size)
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+ return -EINVAL;
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+
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+ for (i = roffset; (i < roffset + rbytes); i += 4) {
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+ ret = stm32_bsec_smc(STM32_SMC_READ_OTP, i >> 2, 0, &val);
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+ if (ret) {
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+ dev_err(priv->dev, "Failed to read data%d (%d)\n",
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+ i >> 2, ret);
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+ return ret;
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+ }
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+
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+ /* skip first bytes in case of unaligned read */
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+ if (skip_bytes)
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+ size = min(bytes, (size_t)(4 - skip_bytes));
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+ else
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+ size = min(bytes, (size_t)4);
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+ memcpy(&buf8[j], &val8[skip_bytes], size);
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+ bytes -= size;
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+ j += size;
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+ skip_bytes = 0;
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+ }
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+
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+ return 0;
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+}
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+
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+static int stm32_bsec_write(void *context, unsigned int offset, void *buf,
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+ size_t bytes)
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+{
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+ struct stm32_romem_priv *priv = context;
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+ u32 *buf32 = buf;
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+ int ret, i;
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+
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+ /* Allow only writing complete 32-bits aligned words */
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+ if ((bytes % 4) || (offset % 4))
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+ return -EINVAL;
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+
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+ for (i = offset; i < offset + bytes; i += 4) {
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+ ret = stm32_bsec_smc(STM32_SMC_PROG_OTP, i >> 2, *buf32++,
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+ NULL);
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+ if (ret) {
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+ dev_err(priv->dev, "Failed to write data%d (%d)\n",
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+ i >> 2, ret);
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+ return ret;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static int stm32_romem_probe(struct platform_device *pdev)
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+{
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+ const struct stm32_romem_cfg *cfg;
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+ struct device *dev = &pdev->dev;
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+ struct stm32_romem_priv *priv;
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+ struct nvmem_device *nvmem;
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+ struct resource *res;
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+
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+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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+ if (!priv)
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+ return -ENOMEM;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ priv->base = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(priv->base))
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+ return PTR_ERR(priv->base);
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+
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+ priv->dev = dev;
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+ priv->cfg.name = "stm32-romem";
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+ priv->cfg.word_size = 1;
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+ priv->cfg.stride = 1;
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+ priv->cfg.dev = &pdev->dev;
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+ priv->cfg.priv = priv;
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+ priv->cfg.owner = THIS_MODULE;
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+
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+ cfg = (const struct stm32_romem_cfg *)
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+ of_match_device(dev->driver->of_match_table, dev)->data;
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+ if (!cfg) {
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+ priv->cfg.read_only = true;
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+ priv->cfg.size = resource_size(res);
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+ priv->cfg.reg_read = stm32_romem_read;
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+ } else {
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+ priv->cfg.read_only = false;
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+ priv->cfg.size = cfg->size;
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+ priv->cfg.reg_read = stm32_bsec_read;
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+ priv->cfg.reg_write = stm32_bsec_write;
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+ }
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+
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+ nvmem = nvmem_register(&priv->cfg);
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+ if (IS_ERR(nvmem))
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+ return PTR_ERR(nvmem);
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+
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+ platform_set_drvdata(pdev, nvmem);
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+
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+ return 0;
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+}
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+
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+static int stm32_romem_remove(struct platform_device *pdev)
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+{
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+ struct nvmem_device *nvmem = platform_get_drvdata(pdev);
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+
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+ return nvmem_unregister(nvmem);
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+}
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+
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+static const struct stm32_romem_cfg stm32mp15_bsec_cfg = {
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+ .size = 384, /* 96 x 32-bits data words */
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+};
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+
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+static const struct of_device_id stm32_romem_of_match[] = {
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+ { .compatible = "st,stm32-romem", }, {
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+ .compatible = "st,stm32mp15-bsec",
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+ .data = (void *)&stm32mp15_bsec_cfg,
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+ }, {
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+ },
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+};
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+MODULE_DEVICE_TABLE(of, stm32_romem_of_match);
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+
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+static struct platform_driver stm32_romem_driver = {
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+ .probe = stm32_romem_probe,
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+ .remove = stm32_romem_remove,
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+ .driver = {
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+ .name = "stm32-romem",
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+ .of_match_table = of_match_ptr(stm32_romem_of_match),
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+ },
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+};
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+module_platform_driver(stm32_romem_driver);
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+
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+MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
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+MODULE_DESCRIPTION("STMicroelectronics STM32 RO-MEM");
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+MODULE_ALIAS("platform:nvmem-stm32-romem");
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+MODULE_LICENSE("GPL v2");
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diff --git a/include/linux/nvmem-consumer.h b/include/linux/nvmem-consumer.h
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index 4e85447..f303008 100644
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--- a/include/linux/nvmem-consumer.h
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+++ b/include/linux/nvmem-consumer.h
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@@ -39,6 +39,7 @@ void devm_nvmem_cell_put(struct device *dev, struct nvmem_cell *cell);
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void *nvmem_cell_read(struct nvmem_cell *cell, size_t *len);
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int nvmem_cell_write(struct nvmem_cell *cell, void *buf, size_t len);
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int nvmem_cell_read_u32(struct device *dev, const char *cell_id, u32 *val);
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+int nvmem_cell_read_u16(struct device *dev, const char *cell_id, u16 *val);
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/* direct nvmem device read/write interface */
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struct nvmem_device *nvmem_device_get(struct device *dev, const char *name);
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@@ -95,6 +96,12 @@ static inline int nvmem_cell_read_u32(struct device *dev,
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return -ENOSYS;
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}
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+static inline int nvmem_cell_read_u16(struct device *dev,
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+ const char *cell_id, u16 *val)
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+{
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+ return -ENOSYS;
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+}
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+
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static inline struct nvmem_device *nvmem_device_get(struct device *dev,
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const char *name)
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{
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--
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2.7.4
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