2515 lines
56 KiB
Diff
2515 lines
56 KiB
Diff
From ee54d2cd85d8254c5e31548986b545c33c75dd04 Mon Sep 17 00:00:00 2001
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From: Christophe Priouzeau <christophe.priouzeau@st.com>
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Date: Mon, 26 Nov 2018 14:46:41 +0100
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Subject: [PATCH 30/52] ARM-stm32mp1-r0-rc2-DEVICETREE
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---
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arch/arm/boot/dts/Makefile | 4 +-
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arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 424 +++++++++++++++++-
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arch/arm/boot/dts/stm32mp157a-dk1.dts | 274 +++++++++++-
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arch/arm/boot/dts/stm32mp157c-dk2-m4-examples.dts | 156 +++++++
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arch/arm/boot/dts/stm32mp157c-dk2.dts | 112 +++++
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arch/arm/boot/dts/stm32mp157c-ed1.dts | 43 +-
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arch/arm/boot/dts/stm32mp157c-ev1-m4-examples.dts | 161 +++++++
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arch/arm/boot/dts/stm32mp157c-ev1.dts | 499 +++++++++++++++++++++-
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arch/arm/boot/dts/stm32mp157c.dtsi | 284 +++++++++++-
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9 files changed, 1910 insertions(+), 47 deletions(-)
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create mode 100644 arch/arm/boot/dts/stm32mp157c-dk2-m4-examples.dts
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create mode 100644 arch/arm/boot/dts/stm32mp157c-ev1-m4-examples.dts
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diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
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index b264fa0..fdf53f5 100644
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -924,8 +924,10 @@ dtb-$(CONFIG_ARCH_STM32) += \
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stm32h743i-disco.dtb \
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stm32mp157a-dk1.dtb \
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stm32mp157c-dk2.dtb \
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+ stm32mp157c-dk2-m4-examples.dtb \
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stm32mp157c-ed1.dtb \
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- stm32mp157c-ev1.dtb
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+ stm32mp157c-ev1.dtb \
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+ stm32mp157c-ev1-m4-examples.dtb
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dtb-$(CONFIG_MACH_SUN4I) += \
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sun4i-a10-a1000.dtb \
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sun4i-a10-ba10-tvbox.dtb \
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diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
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index 4409db2..659094e 100644
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--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
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+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
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@@ -14,6 +14,7 @@
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ranges = <0 0x50002000 0xa400>;
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interrupt-parent = <&exti>;
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st,syscfg = <&exti 0x60 0xff>;
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+ hwlocks = <&hsem 0>;
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pins-are-numbered;
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gpioa: gpio@50002000 {
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@@ -168,6 +169,27 @@
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};
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};
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+ cec_pins_sleep_a: cec-sleep-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
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+ };
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+ };
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+
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+ cec_pins_b: cec-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('B', 6, AF5)>;
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+ bias-disable;
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+ drive-open-drain;
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+ slew-rate = <0>;
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+ };
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+ };
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+
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+ cec_pins_sleep_b: cec-sleep-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
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+ };
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+ };
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+
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dac_ch1_pins_a: dac-ch1 {
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pins {
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pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
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@@ -180,6 +202,47 @@
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};
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};
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+ dcmi_pins_a: dcmi-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
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+ <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
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+ <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
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+ <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
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+ <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
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+ <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
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+ <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
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+ <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
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+ <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
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+ <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
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+ <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
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+ <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
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+ <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
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+ <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
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+ <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
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+ bias-disable;
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+ };
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+ };
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+
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+ dcmi_sleep_pins_a: dcmi-sleep-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
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+ <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
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+ <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
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+ <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
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+ <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
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+ <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
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+ <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
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+ <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
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+ <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
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+ <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
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+ <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
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+ <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
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+ <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
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+ <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
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+ <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
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+ };
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+ };
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+
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dfsdm_clkout_pins_a: dfsdm-clkout-pins-0 {
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pins {
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pinmux = <STM32_PINMUX('B', 13, AF3)>; /* DFSDM_CKOUT */
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@@ -361,6 +424,163 @@
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};
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};
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+ i2s2_pins_a: i2s2-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
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+ <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
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+ <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
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+ slew-rate = <1>;
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+ drive-push-pull;
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+ bias-disable;
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+ };
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+ };
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+
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+ i2s2_pins_sleep_a: i2s2-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
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+ <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
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+ <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
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+ };
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+ };
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+
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+ ltdc_pins_a: ltdc-a-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
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+ <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
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+ <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
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+ <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
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+ <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
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+ <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
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+ <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
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+ <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
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+ <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
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+ <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
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+ <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
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+ <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
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+ <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
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+ <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
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+ <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
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+ <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
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+ <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
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+ <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
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+ <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
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+ <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
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+ <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
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+ <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
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+ <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
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+ <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
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+ <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
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+ <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
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+ <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
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+ <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
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+ bias-disable;
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+ drive-push-pull;
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+ slew-rate = <2>;
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+ };
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+ };
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+
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+ ltdc_pins_sleep_a: ltdc-a-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
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+ <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
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+ <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
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+ <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
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+ <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
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+ <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
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+ <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
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+ <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
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+ <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
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+ <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
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+ <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
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+ <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
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+ <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
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+ <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
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+ <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
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+ <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
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+ <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
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+ <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
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+ <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
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+ <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
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+ <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
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+ <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
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+ <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
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+ <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
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+ <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
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+ <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
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+ <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
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+ <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
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+ };
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+ };
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+
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+ ltdc_pins_b: ltdc-b-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
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+ <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
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+ <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
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+ <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
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+ <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
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+ <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
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+ <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
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+ <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
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+ <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
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+ <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
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+ <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
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+ <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
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+ <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
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+ <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
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+ <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
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+ <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
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+ <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
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+ <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
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+ <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
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+ <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
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+ <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
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+ <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
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+ <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
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+ <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
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+ <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
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+ <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
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+ <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
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+ <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
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+ bias-disable;
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+ drive-push-pull;
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+ slew-rate = <2>;
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+ };
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+ };
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+
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+ ltdc_pins_sleep_b: ltdc-b-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
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+ <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
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+ <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
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+ <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
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+ <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
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+ <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
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+ <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
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+ <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
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+ <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
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+ <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
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+ <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
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+ <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
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+ <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
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+ <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
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+ <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
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+ <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
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+ <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
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+ <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
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+ <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
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+ <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
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+ <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
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+ <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
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+ <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
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+ <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
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+ <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
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+ <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
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+ <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
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+ <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
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+ };
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+ };
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+
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m_can1_pins_a: m-can1-0 {
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pins1 {
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pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
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@@ -507,21 +727,6 @@
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};
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};
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- qspi_clk_pins_a: qspi-clk-0 {
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- pins {
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- pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
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- bias-disable;
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- drive-push-pull;
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- slew-rate = <3>;
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- };
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- };
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-
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- qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
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- pins {
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- pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
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- };
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- };
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-
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qspi_bk1_pins_a: qspi-bk1-0 {
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pins1 {
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pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
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@@ -578,12 +783,110 @@
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};
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};
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+ qspi_clk_pins_a: qspi-clk-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
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+ bias-disable;
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+ drive-push-pull;
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+ slew-rate = <3>;
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+ };
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+ };
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+
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+ qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
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+ };
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+ };
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+
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rtc_out2_rmp_pins_a: rtc-out2-rmp-pins@0 {
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pins {
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pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */
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};
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};
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+ sai2a_pins_a: sai2a-0 {
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+ pins1 {
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+ pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
|
|
+ <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
|
|
+ <STM32_PINMUX('I', 7, AF10)>; /* SAI2_FS_A */
|
|
+ slew-rate = <1>;
|
|
+ drive-push-pull;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pins2 {
|
|
+ pinmux = <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
|
|
+ slew-rate = <2>;
|
|
+ drive-push-pull;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai2a_sleep_pins_a: sai2a-1 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
|
|
+ <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
|
|
+ <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
|
|
+ <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai2b_pins_a: sai2b-0 {
|
|
+ pins1 {
|
|
+ pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
|
|
+ <STM32_PINMUX('E', 13, AF10)>; /* SAI2_FS_B */
|
|
+ slew-rate = <1>;
|
|
+ drive-push-pull;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pins2 {
|
|
+ pinmux = <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
|
|
+ slew-rate = <2>;
|
|
+ drive-push-pull;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pins3 {
|
|
+ pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai2b_sleep_pins_a: sai2b-1 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
|
|
+ <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
|
|
+ <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
|
|
+ <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai2b_pins_b: sai2b-2 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai2b_sleep_pins_b: sai2b-3 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai4a_pins_a: sai4a-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
|
|
+ slew-rate = <1>;
|
|
+ drive-push-pull;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai4a_sleep_pins_a: sai4a-1 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
|
|
+ };
|
|
+ };
|
|
+
|
|
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
|
|
@@ -742,6 +1045,65 @@
|
|
};
|
|
};
|
|
|
|
+ spdifrx_pins_a: spdifrx-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spdifrx_sleep_pins_a: spdifrx-1 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi4_pins_a: spi4-0 {
|
|
+ pins1 {
|
|
+ pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
|
|
+ <STM32_PINMUX('E', 14, AF5)>; /* SPI4_MOSI */
|
|
+ bias-disable;
|
|
+ drive-push-pull;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ pins2 {
|
|
+ pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi4_sleep_pins_a: spi4-sleep-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('E', 12, ANALOG)>, /* SPI4_SCK */
|
|
+ <STM32_PINMUX('E', 13, ANALOG)>, /* SPI4_MISO */
|
|
+ <STM32_PINMUX('E', 14, ANALOG)>; /* SPI4_MOSI */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi5_pins_a: spi5-0 {
|
|
+ pins1 {
|
|
+ pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
|
|
+ <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */
|
|
+ bias-disable;
|
|
+ drive-push-pull;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ pins2 {
|
|
+ pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi5_sleep_pins_a: spi5-sleep-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* SPI5_SCK */
|
|
+ <STM32_PINMUX('F', 8, ANALOG)>, /* SPI5_MISO */
|
|
+ <STM32_PINMUX('F', 9, ANALOG)>; /* SPI5_MOSI */
|
|
+ };
|
|
+ };
|
|
+
|
|
uart4_pins_a: uart4-0 {
|
|
pins1 {
|
|
pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
|
|
@@ -879,6 +1241,19 @@
|
|
<STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
|
|
};
|
|
};
|
|
+
|
|
+ usbotg_hs_pins_a: usbotg_hs-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
|
|
+ <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
pinctrl_z: pin-controller-z@54004000 {
|
|
@@ -889,6 +1264,7 @@
|
|
pins-are-numbered;
|
|
interrupt-parent = <&exti>;
|
|
st,syscfg = <&exti 0x60 0xff>;
|
|
+ hwlocks = <&hsem 1>;
|
|
|
|
gpioz: gpio@54004000 {
|
|
gpio-controller;
|
|
@@ -902,6 +1278,16 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ btreg: bt_reg_on-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('Z', 6, GPIO)>;
|
|
+ drive-push-pull;
|
|
+ bias-pull-up;
|
|
+ output-high;
|
|
+ slew-rate = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
i2c4_pins_a: i2c4-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
|
|
@@ -933,6 +1319,14 @@
|
|
bias-disable;
|
|
};
|
|
};
|
|
+
|
|
+ spi1_sleep_pins_a: spi1-sleep-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI1_SCK */
|
|
+ <STM32_PINMUX('Z', 1, ANALOG)>, /* SPI1_MISO */
|
|
+ <STM32_PINMUX('Z', 2, ANALOG)>; /* SPI1_MOSI */
|
|
+ };
|
|
+ };
|
|
};
|
|
};
|
|
};
|
|
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts
|
|
index 866eed7..2f01e97 100644
|
|
--- a/arch/arm/boot/dts/stm32mp157a-dk1.dts
|
|
+++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts
|
|
@@ -17,6 +17,11 @@
|
|
model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
|
|
compatible = "st,stm32mp157a-dk1", "st,stm32mp157";
|
|
|
|
+ aliases {
|
|
+ ethernet0 = ðernet0;
|
|
+ serial0 = &uart4;
|
|
+ };
|
|
+
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
@@ -35,10 +40,11 @@
|
|
reg = <0x10040000 0x10000>;
|
|
no-map;
|
|
};
|
|
- };
|
|
|
|
- aliases {
|
|
- serial0 = &uart4;
|
|
+ gpu_reserved: gpu@dc000000 {
|
|
+ reg = <0xdc000000 0x4000000>;
|
|
+ no-map;
|
|
+ };
|
|
};
|
|
|
|
iio-hwmon {
|
|
@@ -68,11 +74,34 @@
|
|
default-state = "off";
|
|
};
|
|
};
|
|
+
|
|
+ sound {
|
|
+ compatible = "audio-graph-card";
|
|
+ routing =
|
|
+ "Playback" , "MCLK",
|
|
+ "Capture" , "MCLK",
|
|
+ "MICL" , "Mic Bias";
|
|
+ dais = <&sai2a_port &sai2b_port &i2s2_port>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ usb_phy_tuning: usb-phy-tuning {
|
|
+ st,hs-dc-level = <2>;
|
|
+ st,fs-rftime-tuning;
|
|
+ st,hs-rftime-reduction;
|
|
+ st,hs-current-trim = <15>;
|
|
+ st,hs-impedance-trim = <1>;
|
|
+ st,squelch-level = <3>;
|
|
+ st,hs-rx-offset = <2>;
|
|
+ st,no-lsfs-sc;
|
|
+ };
|
|
};
|
|
|
|
&adc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&adc12_usb_pwr_pins_a>;
|
|
+ vdd-supply = <&vdd>;
|
|
+ vdda-supply = <&vdd>;
|
|
vref-supply = <&vrefbuf>;
|
|
status = "okay";
|
|
adc1: adc@0 {
|
|
@@ -99,6 +128,13 @@
|
|
};
|
|
};
|
|
|
|
+&cec {
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&cec_pins_b>;
|
|
+ pinctrl-1 = <&cec_pins_sleep_b>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&dma1 {
|
|
sram = <&dma_pool>;
|
|
};
|
|
@@ -107,6 +143,34 @@
|
|
sram = <&dma_pool>;
|
|
};
|
|
|
|
+ðernet0 {
|
|
+ status = "okay";
|
|
+ pinctrl-0 = <ðernet0_rgmii_pins_a>;
|
|
+ pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ phy-mode = "rgmii";
|
|
+ max-speed = <1000>;
|
|
+ phy-handle = <&phy0>;
|
|
+
|
|
+ mdio0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ compatible = "snps,dwmac-mdio";
|
|
+ phy0: ethernet-phy@0 {
|
|
+ reg = <0>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpu {
|
|
+ contiguous-area = <&gpu_reserved>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hsem {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&i2c1 {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&i2c1_pins_a>;
|
|
@@ -116,6 +180,75 @@
|
|
status = "okay";
|
|
/delete-property/dmas;
|
|
/delete-property/dma-names;
|
|
+
|
|
+ cs42l51: cs42l51@4a {
|
|
+ compatible = "cirrus,cs42l51";
|
|
+ reg = <0x4a>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ VL-supply = <&v3v3>;
|
|
+ VD-supply = <&v1v8_audio>;
|
|
+ VA-supply = <&v1v8_audio>;
|
|
+ VAHP-supply = <&v1v8_audio>;
|
|
+
|
|
+ reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
|
|
+
|
|
+ clocks = <&sai2a>;
|
|
+ clock-names = "MCLK";
|
|
+
|
|
+ cs42l51_port: port {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ cs42l51_tx_endpoint: endpoint@0 {
|
|
+ reg = <0>;
|
|
+ remote-endpoint = <&sai2a_endpoint>;
|
|
+ frame-master;
|
|
+ bitclock-master;
|
|
+ };
|
|
+
|
|
+ cs42l51_rx_endpoint: endpoint@1 {
|
|
+ reg = <1>;
|
|
+ remote-endpoint = <&sai2b_endpoint>;
|
|
+ frame-master;
|
|
+ bitclock-master;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ hdmi-transmitter@39 {
|
|
+ compatible = "sil,sii9022";
|
|
+ reg = <0x39>;
|
|
+ iovcc-supply = <&v3v3_hdmi>;
|
|
+ cvcc12-supply = <&v1v2_hdmi>;
|
|
+ reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
|
|
+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
|
+ interrupt-parent = <&gpiog>;
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <<dc_pins_a>;
|
|
+ pinctrl-1 = <<dc_pins_sleep_a>;
|
|
+ status = "okay";
|
|
+
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ port@0 {
|
|
+ reg = <0>;
|
|
+ sii9022_in: endpoint {
|
|
+ remote-endpoint = <<dc_ep0_out>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ reg = <1>;
|
|
+ sii9022_tx_endpoint: endpoint {
|
|
+ remote-endpoint = <&i2s2_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
&i2c4 {
|
|
@@ -131,8 +264,7 @@
|
|
pmic: stpmic@33 {
|
|
compatible = "st,stpmic1";
|
|
reg = <0x33>;
|
|
- interrupts-extended = <&pwr 0 IRQ_TYPE_EDGE_FALLING 1>,
|
|
- <&exti 55 1>;
|
|
+ interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
status = "okay";
|
|
@@ -274,6 +406,23 @@
|
|
};
|
|
};
|
|
|
|
+&i2s2 {
|
|
+ clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL4_Q>;
|
|
+ clock-names = "pclk", "i2sclk", "x8k", "x11k";
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&i2s2_pins_a>;
|
|
+ pinctrl-1 = <&i2s2_pins_sleep_a>;
|
|
+ status = "okay";
|
|
+
|
|
+ i2s2_port: port {
|
|
+ i2s2_endpoint: endpoint {
|
|
+ remote-endpoint = <&sii9022_tx_endpoint>;
|
|
+ format = "i2s";
|
|
+ mclk-fs = <256>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
&ipcc {
|
|
status = "okay";
|
|
};
|
|
@@ -283,10 +432,24 @@
|
|
status = "okay";
|
|
};
|
|
|
|
+<dc {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ltdc_ep0_out: endpoint@0 {
|
|
+ reg = <0>;
|
|
+ remote-endpoint = <&sii9022_in>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
&m4_rproc {
|
|
memory-region = <&ipc_share>;
|
|
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
|
|
- mbox-names = "vq0", "vq1", "init_shdn";
|
|
+ mbox-names = "vq0", "vq1", "shutdown";
|
|
interrupt-parent = <&exti>;
|
|
interrupts = <68 1>;
|
|
interrupt-names = "wdg";
|
|
@@ -294,6 +457,10 @@
|
|
status = "okay";
|
|
};
|
|
|
|
+&pwr {
|
|
+ pwr-supply = <&vdd>;
|
|
+};
|
|
+
|
|
&rng1 {
|
|
status = "okay";
|
|
};
|
|
@@ -302,18 +469,77 @@
|
|
status = "okay";
|
|
};
|
|
|
|
+&sai2 {
|
|
+ clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_Q>;
|
|
+ clock-names = "pclk", "x8k", "x11k";
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
|
|
+ pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
|
|
+ status = "okay";
|
|
+
|
|
+ sai2a: audio-controller@4400b004 {
|
|
+ #clock-cells = <0>;
|
|
+ dma-names = "tx";
|
|
+ clocks = <&rcc SAI2_K>;
|
|
+ clock-names = "sai_ck";
|
|
+ status = "okay";
|
|
+
|
|
+ sai2a_port: port {
|
|
+ sai2a_endpoint: endpoint {
|
|
+ remote-endpoint = <&cs42l51_tx_endpoint>;
|
|
+ format = "i2s";
|
|
+ mclk-fs = <256>;
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai2b: audio-controller@4400b024 {
|
|
+ dma-names = "rx";
|
|
+ st,sync = <&sai2a 2>;
|
|
+ status = "okay";
|
|
+ clocks = <&rcc SAI2_K>, <&sai2a>;
|
|
+ clock-names = "sai_ck", "MCLK";
|
|
+
|
|
+ sai2b_port: port {
|
|
+ sai2b_endpoint: endpoint {
|
|
+ remote-endpoint = <&cs42l51_rx_endpoint>;
|
|
+ format = "i2s";
|
|
+ mclk-fs = <256>;
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
&sdmmc1 {
|
|
pinctrl-names = "default", "opendrain", "sleep";
|
|
pinctrl-0 = <&sdmmc1_b4_pins_a>;
|
|
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
|
|
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
|
|
broken-cd;
|
|
- st,negedge;
|
|
+ st,neg-edge;
|
|
bus-width = <4>;
|
|
vmmc-supply = <&v3v3>;
|
|
status = "okay";
|
|
};
|
|
|
|
+&spi4 {
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&spi4_pins_a>;
|
|
+ pinctrl-1 = <&spi4_sleep_pins_a>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&spi5 {
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&spi5_pins_a>;
|
|
+ pinctrl-1 = <&spi5_sleep_pins_a>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
&timers1 {
|
|
/* spare dmas for other usage */
|
|
/delete-property/dmas;
|
|
@@ -404,6 +630,40 @@
|
|
status = "okay";
|
|
};
|
|
|
|
+&usart3 {
|
|
+ pinctrl-names = "default", "sleep", "idle";
|
|
+ pinctrl-0 = <&usart3_pins_b>;
|
|
+ pinctrl-1 = <&usart3_sleep_pins_b>;
|
|
+ pinctrl-2 = <&usart3_idle_pins_b>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&usbh_ehci {
|
|
+ phys = <&usbphyc_port0>;
|
|
+ phy-names = "usb";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbotg_hs {
|
|
+ dr_mode = "peripheral";
|
|
+ phys = <&usbphyc_port1 0>;
|
|
+ phy-names = "usb2-phy";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbphyc {
|
|
+ vdd3v3-supply = <&vdd_usb>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbphyc_port0 {
|
|
+ st,phy-tuning = <&usb_phy_tuning>;
|
|
+};
|
|
+
|
|
+&usbphyc_port1 {
|
|
+ st,phy-tuning = <&usb_phy_tuning>;
|
|
+};
|
|
+
|
|
&vrefbuf {
|
|
regulator-min-microvolt = <2500000>;
|
|
regulator-max-microvolt = <2500000>;
|
|
diff --git a/arch/arm/boot/dts/stm32mp157c-dk2-m4-examples.dts b/arch/arm/boot/dts/stm32mp157c-dk2-m4-examples.dts
|
|
new file mode 100644
|
|
index 0000000..8956b06
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/stm32mp157c-dk2-m4-examples.dts
|
|
@@ -0,0 +1,156 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
|
+/*
|
|
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
|
|
+ * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "stm32mp157c-dk2.dts"
|
|
+
|
|
+/ {
|
|
+ model = "STMicroelectronics STM32MP157C-DK2 configured to run M4 examples";
|
|
+ compatible = "st,stm32mp157c-dk2-m4-examples", "st,stm32mp157c-dk2", "st,stm32mp157";
|
|
+};
|
|
+
|
|
+&adc {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dac {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dma2 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dmamux1 {
|
|
+ dma-masters = <&dma1>;
|
|
+ dma-channels = <8>;
|
|
+};
|
|
+
|
|
+&m4_adc {
|
|
+ vref-supply = <&vrefbuf>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_dac {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_dma2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_crc2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_cryp2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_hash2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_i2c5 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&i2c5_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_rng2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_rproc {
|
|
+ m4_system_resources {
|
|
+ status = "okay";
|
|
+
|
|
+ button {
|
|
+ compatible = "rproc-srm-dev";
|
|
+ interrupt-parent = <&gpioa>;
|
|
+ interrupts = <14 2>;
|
|
+ interrupt-names = "irq";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ m4_led: m4_led {
|
|
+ compatible = "rproc-srm-dev";
|
|
+ pinctrl-names = "rproc_default", "rproc_sleep";
|
|
+ pinctrl-0 = <&leds_orange_pins>;
|
|
+ pinctrl-1 = <&leds_orange_sleep_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&m4_spi4 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&spi4_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+
|
|
+&m4_timers2 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_timers1 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&timer1_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_uart7 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&uart7_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ uart7_pins: uart7-test-0 {
|
|
+ pins1 {
|
|
+ pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
|
|
+ bias-disable;
|
|
+ drive-push-pull;
|
|
+ slew-rate = <0>;
|
|
+ };
|
|
+ pins2 {
|
|
+ pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ timer1_pins: pwm1-test-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
|
|
+ bias-pull-down;
|
|
+ drive-push-pull;
|
|
+ slew-rate = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds_orange_pins: leds_orange_test-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('H', 7, GPIO)>;
|
|
+ bias-pull-up;
|
|
+ drive-push-pull;
|
|
+ output-low;
|
|
+ slew-rate = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds_orange_sleep_pins: leds_orange_sleep_test-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('H', 7, ANALOG)>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&timers1 {
|
|
+ status = "disabled";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts b/arch/arm/boot/dts/stm32mp157c-dk2.dts
|
|
index 4175b65..fd00386 100644
|
|
--- a/arch/arm/boot/dts/stm32mp157c-dk2.dts
|
|
+++ b/arch/arm/boot/dts/stm32mp157c-dk2.dts
|
|
@@ -12,6 +12,80 @@
|
|
/ {
|
|
model = "STMicroelectronics STM32MP157C-DK2 Discovery Board";
|
|
compatible = "st,stm32mp157c-dk2", "st,stm32mp157";
|
|
+
|
|
+ aliases {
|
|
+ serial1 = &usart2;
|
|
+ };
|
|
+
|
|
+ wifi_pwrseq: wifi-pwrseq {
|
|
+ compatible = "mmc-pwrseq-simple";
|
|
+ reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&dsi {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ port@0 {
|
|
+ reg = <0>;
|
|
+ dsi_in: endpoint {
|
|
+ remote-endpoint = <<dc_ep1_out>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ reg = <1>;
|
|
+ dsi_out: endpoint {
|
|
+ remote-endpoint = <&panel_in>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ panel@0 {
|
|
+ compatible = "orisetech,otm8009a";
|
|
+ reg = <0>;
|
|
+ reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ panel_in: endpoint {
|
|
+ remote-endpoint = <&dsi_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ touchscreen@2a {
|
|
+ compatible = "focaltech,ft6236";
|
|
+ reg = <0x2a>;
|
|
+ interrupts = <2 2>;
|
|
+ interrupt-parent = <&gpiof>;
|
|
+ interrupt-controller;
|
|
+ touchscreen-size-x = <480>;
|
|
+ touchscreen-size-y = <800>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+<dc {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ltdc_ep1_out: endpoint@1 {
|
|
+ reg = <1>;
|
|
+ remote-endpoint = <&dsi_in>;
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
&rtc {
|
|
@@ -20,3 +94,41 @@
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
+/* Wifi */
|
|
+&sdmmc2 {
|
|
+ pinctrl-names = "default", "opendrain", "sleep";
|
|
+ pinctrl-0 = <&sdmmc2_b4_pins_a>;
|
|
+ pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
|
|
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
|
|
+ non-removable;
|
|
+ st,neg-edge;
|
|
+ bus-width = <4>;
|
|
+ vmmc-supply = <&v3v3>;
|
|
+ mmc-pwrseq = <&wifi_pwrseq>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ keep-power-in-suspend;
|
|
+ status = "okay";
|
|
+
|
|
+ brcmf: bcrmf@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "brcm,bcm4329-fmac";
|
|
+ };
|
|
+};
|
|
+
|
|
+/* Bluetooth */
|
|
+&usart2 {
|
|
+ pinctrl-names = "default", "sleep", "idle";
|
|
+ pinctrl-0 = <&usart2_pins_a>;
|
|
+ pinctrl-1 = <&usart2_sleep_pins_a>;
|
|
+ pinctrl-2 = <&usart2_idle_pins_a>;
|
|
+ st,hw-flow-ctrl;
|
|
+ status = "okay";
|
|
+
|
|
+ bluetooth {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&btreg>;
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <3000000>;
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts
|
|
index 1b074e9..4f46b41 100644
|
|
--- a/arch/arm/boot/dts/stm32mp157c-ed1.dts
|
|
+++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts
|
|
@@ -33,6 +33,11 @@
|
|
reg = <0x10040000 0x10000>;
|
|
no-map;
|
|
};
|
|
+
|
|
+ gpu_reserved: gpu@f8000000 {
|
|
+ reg = <0xf8000000 0x8000000>;
|
|
+ no-map;
|
|
+ };
|
|
};
|
|
|
|
aliases {
|
|
@@ -70,6 +75,8 @@
|
|
|
|
&adc {
|
|
/* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
|
|
+ vdd-supply = <&vdd>;
|
|
+ vdda-supply = <&vdda>;
|
|
vref-supply = <&vdda>;
|
|
status = "okay";
|
|
adc1: adc@0 {
|
|
@@ -114,6 +121,15 @@
|
|
sram = <&dma_pool>;
|
|
};
|
|
|
|
+&gpu {
|
|
+ contiguous-area = <&gpu_reserved>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hsem {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&i2c4 {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&i2c4_pins_a>;
|
|
@@ -127,8 +143,7 @@
|
|
pmic: stpmic@33 {
|
|
compatible = "st,stpmic1";
|
|
reg = <0x33>;
|
|
- interrupts-extended = <&pwr 0 IRQ_TYPE_EDGE_FALLING 1>,
|
|
- <&exti 55 1>;
|
|
+ interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
status = "okay";
|
|
@@ -235,10 +250,10 @@
|
|
regulator-over-current-protection;
|
|
};
|
|
|
|
- bst_out: boost {
|
|
+ bst_out: boost {
|
|
regulator-name = "bst_out";
|
|
interrupts = <IT_OCP_BOOST 0>;
|
|
- };
|
|
+ };
|
|
|
|
vbus_otg: pwr_sw1 {
|
|
regulator-name = "vbus_otg";
|
|
@@ -278,7 +293,7 @@
|
|
&m4_rproc {
|
|
memory-region = <&ipc_share>;
|
|
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
|
|
- mbox-names = "vq0", "vq1", "init_shdn";
|
|
+ mbox-names = "vq0", "vq1", "shutdown";
|
|
interrupt-parent = <&exti>;
|
|
interrupts = <68 1>;
|
|
interrupt-names = "wdg";
|
|
@@ -286,6 +301,10 @@
|
|
status = "okay";
|
|
};
|
|
|
|
+&pwr {
|
|
+ pwr-supply = <&vdd>;
|
|
+};
|
|
+
|
|
&rng1 {
|
|
status = "okay";
|
|
};
|
|
@@ -316,7 +335,7 @@
|
|
non-removable;
|
|
no-sd;
|
|
no-sdio;
|
|
- st,negedge;
|
|
+ st,neg-edge;
|
|
bus-width = <8>;
|
|
vmmc-supply = <&v3v3>;
|
|
vqmmc-supply = <&v3v3>;
|
|
@@ -342,14 +361,10 @@
|
|
status = "okay";
|
|
};
|
|
|
|
-&usbphyc_port0 {
|
|
- phy-supply = <&vdd_usb>;
|
|
- vdda1v1-supply = <®11>;
|
|
- vdda1v8-supply = <®18>;
|
|
+&usbotg_hs {
|
|
+ vbus-supply = <&vbus_otg>;
|
|
};
|
|
|
|
-&usbphyc_port1 {
|
|
- phy-supply = <&vdd_usb>;
|
|
- vdda1v1-supply = <®11>;
|
|
- vdda1v8-supply = <®18>;
|
|
+&usbphyc {
|
|
+ vdd3v3-supply = <&vdd_usb>;
|
|
};
|
|
diff --git a/arch/arm/boot/dts/stm32mp157c-ev1-m4-examples.dts b/arch/arm/boot/dts/stm32mp157c-ev1-m4-examples.dts
|
|
new file mode 100644
|
|
index 0000000..ef2938d
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/stm32mp157c-ev1-m4-examples.dts
|
|
@@ -0,0 +1,161 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
|
+/*
|
|
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
|
|
+ * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "stm32mp157c-ev1.dts"
|
|
+
|
|
+/ {
|
|
+ model = "STMicroelectronics STM32MP157C-EV1 configured to run M4 examples";
|
|
+ compatible = "st,stm32mp157c-ev1-m4-examples", "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
|
|
+};
|
|
+
|
|
+&adc {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dac {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dcmi {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dma2 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dmamux1 {
|
|
+ dma-masters = <&dma1>;
|
|
+ dma-channels = <8>;
|
|
+};
|
|
+
|
|
+&fmc {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&i2c5 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&m4_adc {
|
|
+ vref-supply = <&vdda>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_crc2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_cryp2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_dac {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_dma2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_hash2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_i2c5 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&i2c5_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_qspi {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_rproc {
|
|
+ m4_system_resources {
|
|
+ status = "okay";
|
|
+
|
|
+ button {
|
|
+ compatible = "rproc-srm-dev";
|
|
+ interrupt-parent = <&gpioa>;
|
|
+ interrupts = <14 2>;
|
|
+ interrupt-names = "irq";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ m4_led: m4_led {
|
|
+ compatible = "rproc-srm-dev";
|
|
+ pinctrl-names = "rproc_default", "rproc_sleep";
|
|
+ pinctrl-0 = <&leds_orange_pins>;
|
|
+ pinctrl-1 = <&leds_orange_sleep_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&m4_rng2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_spi1 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&spi1_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+
|
|
+&m4_timers2 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&pwm2_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_timers1 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&pwm1_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&m4_usart3 {
|
|
+ pinctrl-names = "rproc_default";
|
|
+ pinctrl-0 = <&usart3_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ leds_orange_pins: leds_orange_test-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('D', 8, GPIO)>;
|
|
+ bias-pull-up;
|
|
+ drive-push-pull;
|
|
+ output-low;
|
|
+ slew-rate = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds_orange_sleep_pins: leds_orange_sleep_test-0 {
|
|
+ pins {
|
|
+ pinmux = <STM32_PINMUX('D', 8, ANALOG)>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&qspi {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&sai2b {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&timers2 {
|
|
+ status = "disabled";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts
|
|
index fe59c6d..b60bffc 100644
|
|
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
|
|
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
|
|
@@ -7,6 +7,7 @@
|
|
|
|
#include "stm32mp157c-ed1.dts"
|
|
#include <dt-bindings/input/input.h>
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
|
|
@@ -21,6 +22,14 @@
|
|
ethernet0 = ðernet0;
|
|
};
|
|
|
|
+ clocks {
|
|
+ clk_ext_camera: clk-ext-camera {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <24000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
joystick {
|
|
compatible = "gpio-keys";
|
|
#size-cells = <0>;
|
|
@@ -57,6 +66,284 @@
|
|
interrupts = <4 IRQ_TYPE_EDGE_RISING>;
|
|
};
|
|
};
|
|
+
|
|
+ panel_backlight: panel-backlight {
|
|
+ compatible = "gpio-backlight";
|
|
+ gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
|
|
+ default-on;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spdif_out: spdif-out {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "linux,spdif-dit";
|
|
+ status = "okay";
|
|
+
|
|
+ spdif_out_port: port {
|
|
+ spdif_out_endpoint: endpoint {
|
|
+ remote-endpoint = <&sai4a_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spdif_in: spdif-in {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "linux,spdif-dir";
|
|
+ status = "okay";
|
|
+
|
|
+ spdif_in_port: port {
|
|
+ spdif_in_endpoint: endpoint {
|
|
+ remote-endpoint = <&spdifrx_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sound {
|
|
+ compatible = "audio-graph-card";
|
|
+ routing =
|
|
+ "AIF1CLK" , "MCLK1",
|
|
+ "AIF2CLK" , "MCLK1",
|
|
+ "IN1LN" , "MICBIAS2",
|
|
+ "DMIC2DAT" , "MICBIAS1",
|
|
+ "DMIC1DAT" , "MICBIAS1";
|
|
+ dais = <&sai2a_port &sai2b_port &sai4a_port &spdifrx_port>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ dmics {
|
|
+ compatible = "audio-graph-card";
|
|
+ dais = <&cpu_port0 &cpu_port1 &cpu_port2 &cpu_port3>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ dmic0: dmic-0 {
|
|
+ compatible = "dmic-codec";
|
|
+ #sound-dai-cells = <1>;
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ dmic0_endpoint: endpoint {
|
|
+ remote-endpoint = <&dfsdm_endpoint0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ dmic1: dmic-1 {
|
|
+ compatible = "dmic-codec";
|
|
+ #sound-dai-cells = <1>;
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ dmic1_endpoint: endpoint {
|
|
+ remote-endpoint = <&dfsdm_endpoint1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ dmic2: dmic-2 {
|
|
+ compatible = "dmic-codec";
|
|
+ #sound-dai-cells = <1>;
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ dmic2_endpoint: endpoint {
|
|
+ remote-endpoint = <&dfsdm_endpoint2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ dmic3: dmic-3 {
|
|
+ compatible = "dmic-codec";
|
|
+ #sound-dai-cells = <1>;
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ dmic3_endpoint: endpoint {
|
|
+ remote-endpoint = <&dfsdm_endpoint3>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb_phy_tuning: usb-phy-tuning {
|
|
+ st,hs-dc-level = <2>;
|
|
+ st,fs-rftime-tuning;
|
|
+ st,hs-rftime-reduction;
|
|
+ st,hs-current-trim = <15>;
|
|
+ st,hs-impedance-trim = <1>;
|
|
+ st,squelch-level = <3>;
|
|
+ st,hs-rx-offset = <2>;
|
|
+ st,no-lsfs-sc;
|
|
+ };
|
|
+};
|
|
+
|
|
+&cec {
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&cec_pins_a>;
|
|
+ pinctrl-1 = <&cec_pins_sleep_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&dcmi {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&dcmi_pins_a>;
|
|
+ pinctrl-1 = <&dcmi_sleep_pins_a>;
|
|
+
|
|
+ port {
|
|
+ dcmi_0: endpoint {
|
|
+ remote-endpoint = <&ov5640_0>;
|
|
+ bus-width = <8>;
|
|
+ hsync-active = <0>;
|
|
+ vsync-active = <0>;
|
|
+ pclk-sample = <1>;
|
|
+ pclk-max-frequency = <77000000>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&dfsdm {
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&dfsdm_clkout_pins_a
|
|
+ &dfsdm_data1_pins_a &dfsdm_data3_pins_a>;
|
|
+ pinctrl-1 = <&dfsdm_clkout_sleep_pins_a
|
|
+ &dfsdm_data1_sleep_pins_a &dfsdm_data3_sleep_pins_a>;
|
|
+ spi-max-frequency = <2048000>;
|
|
+
|
|
+ clocks = <&rcc DFSDM_K>, <&rcc ADFSDM_K>;
|
|
+ clock-names = "dfsdm", "audio";
|
|
+ status = "okay";
|
|
+
|
|
+ dfsdm0: filter@0 {
|
|
+ compatible = "st,stm32-dfsdm-dmic";
|
|
+ st,adc-channels = <3>;
|
|
+ st,adc-channel-names = "dmic_u1";
|
|
+ st,adc-channel-types = "SPI_R";
|
|
+ st,adc-channel-clk-src = "CLKOUT";
|
|
+ st,filter-order = <3>;
|
|
+ status = "okay";
|
|
+
|
|
+ asoc_pdm0: dfsdm-dai {
|
|
+ compatible = "st,stm32h7-dfsdm-dai";
|
|
+ #sound-dai-cells = <0>;
|
|
+ io-channels = <&dfsdm0 0>;
|
|
+ status = "okay";
|
|
+
|
|
+ cpu_port0: port {
|
|
+ dfsdm_endpoint0: endpoint {
|
|
+ remote-endpoint = <&dmic0_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ dfsdm1: filter@1 {
|
|
+ compatible = "st,stm32-dfsdm-dmic";
|
|
+ st,adc-channels = <1>;
|
|
+ st,adc-channel-names = "dmic_u2";
|
|
+ st,adc-channel-types = "SPI_F";
|
|
+ st,adc-channel-clk-src = "CLKOUT";
|
|
+ st,filter-order = <3>;
|
|
+ status = "okay";
|
|
+
|
|
+ asoc_pdm1: dfsdm-dai {
|
|
+ compatible = "st,stm32h7-dfsdm-dai";
|
|
+ #sound-dai-cells = <0>;
|
|
+ io-channels = <&dfsdm1 0>;
|
|
+ status = "okay";
|
|
+
|
|
+ cpu_port1: port {
|
|
+ dfsdm_endpoint1: endpoint {
|
|
+ remote-endpoint = <&dmic1_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ dfsdm2: filter@2 {
|
|
+ compatible = "st,stm32-dfsdm-dmic";
|
|
+ st,adc-channels = <3>;
|
|
+ st,adc-channel-names = "dmic_u3";
|
|
+ st,adc-channel-types = "SPI_F";
|
|
+ st,adc-channel-clk-src = "CLKOUT";
|
|
+ st,filter-order = <3>;
|
|
+ status = "okay";
|
|
+
|
|
+ asoc_pdm2: dfsdm-dai {
|
|
+ compatible = "st,stm32h7-dfsdm-dai";
|
|
+ #sound-dai-cells = <0>;
|
|
+ io-channels = <&dfsdm2 0>;
|
|
+ status = "okay";
|
|
+
|
|
+ cpu_port2: port {
|
|
+ dfsdm_endpoint2: endpoint {
|
|
+ remote-endpoint = <&dmic2_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ dfsdm3: filter@3 {
|
|
+ compatible = "st,stm32-dfsdm-dmic";
|
|
+ st,adc-channels = <1>;
|
|
+ st,adc-channel-names = "dmic_u4";
|
|
+ st,adc-channel-types = "SPI_R";
|
|
+ st,adc-channel-clk-src = "CLKOUT";
|
|
+ st,filter-order = <3>;
|
|
+ status = "okay";
|
|
+
|
|
+ asoc_pdm3: dfsdm-dai {
|
|
+ compatible = "st,stm32h7-dfsdm-dai";
|
|
+ #sound-dai-cells = <0>;
|
|
+ io-channels = <&dfsdm3 0>;
|
|
+ status = "okay";
|
|
+
|
|
+ cpu_port3: port {
|
|
+ dfsdm_endpoint3: endpoint {
|
|
+ remote-endpoint = <&dmic3_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&dsi {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ port@0 {
|
|
+ reg = <0>;
|
|
+ dsi_in: endpoint {
|
|
+ remote-endpoint = <<dc_ep0_out>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ reg = <1>;
|
|
+ dsi_out: endpoint {
|
|
+ remote-endpoint = <&dsi_panel_in>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ panel-dsi@0 {
|
|
+ compatible = "raydium,rm68200";
|
|
+ reg = <0>;
|
|
+ reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>;
|
|
+ power-supply = <&v1v8>;
|
|
+ backlight = <&panel_backlight>;
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ dsi_panel_in: endpoint {
|
|
+ remote-endpoint = <&dsi_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
ðernet0 {
|
|
@@ -78,12 +365,6 @@
|
|
};
|
|
};
|
|
|
|
-&cec {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&cec_pins_a>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
&fmc {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&fmc_pins_a>;
|
|
@@ -110,6 +391,74 @@
|
|
/delete-property/dmas;
|
|
/delete-property/dma-names;
|
|
|
|
+ wm8994: wm8994@1b {
|
|
+ compatible = "wlf,wm8994";
|
|
+ #sound-dai-cells = <0>;
|
|
+ reg = <0x1b>;
|
|
+ status = "okay";
|
|
+
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+
|
|
+ DBVDD-supply = <&vdd>;
|
|
+ SPKVDD1-supply = <&vdd>;
|
|
+ SPKVDD2-supply = <&vdd>;
|
|
+ AVDD2-supply = <&v1v8>;
|
|
+ CPVDD-supply = <&v1v8>;
|
|
+
|
|
+ wlf,ldoena-always-driven;
|
|
+
|
|
+ clocks = <&sai2a>;
|
|
+ clock-names = "MCLK1";
|
|
+
|
|
+ wlf,gpio-cfg = <0x8101 0xa100 0xa100 0xa100 0xa101 0xa101 0xa100 0xa101 0xa101 0xa101 0xa101>;
|
|
+
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ wm8994_tx_port: port@0 {
|
|
+ reg = <0>;
|
|
+ wm8994_tx_endpoint: endpoint {
|
|
+ remote-endpoint = <&sai2a_endpoint>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ wm8994_rx_port: port@1 {
|
|
+ reg = <1>;
|
|
+ wm8994_rx_endpoint: endpoint {
|
|
+ remote-endpoint = <&sai2b_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ ov5640: camera@3c {
|
|
+ compatible = "ovti,ov5640";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ov5640_pins>;
|
|
+ reg = <0x3c>;
|
|
+ clocks = <&clk_ext_camera>;
|
|
+ clock-names = "xclk";
|
|
+ DOVDD-supply = <&v2v8>;
|
|
+ powerdown-gpios = <&stmfx_pinctrl 18 GPIO_ACTIVE_HIGH>;
|
|
+ reset-gpios = <&stmfx_pinctrl 19 GPIO_ACTIVE_LOW>;
|
|
+ rotation = <180>;
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ ov5640_0: endpoint {
|
|
+ remote-endpoint = <&dcmi_0>;
|
|
+ bus-width = <8>;
|
|
+ data-shift = <2>; /* lines 9:2 are used */
|
|
+ hsync-active = <0>;
|
|
+ vsync-active = <0>;
|
|
+ pclk-sample = <1>;
|
|
+ pclk-max-frequency = <77000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
stmfx: stmfx@42 {
|
|
compatible = "st,stmfx-0300";
|
|
reg = <0x42>;
|
|
@@ -124,12 +473,45 @@
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
gpio-ranges = <&stmfx_pinctrl 0 0 24>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&hog_pins>;
|
|
+
|
|
+ hog_pins: hog {
|
|
+ pins = "gpio14";
|
|
+ drive-push-pull;
|
|
+ bias-pull-down;
|
|
+ };
|
|
|
|
joystick_pins: joystick {
|
|
pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
|
|
drive-push-pull;
|
|
bias-pull-down;
|
|
};
|
|
+
|
|
+ ov5640_pins: camera {
|
|
+ pins = "agpio2", "agpio3"; /* stmfx pins 18 & 19 */
|
|
+ drive-push-pull;
|
|
+ output-low;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gt9147: goodix_ts@5d {
|
|
+ compatible = "goodix,gt9147";
|
|
+ reg = <0x5d>;
|
|
+ status = "okay";
|
|
+
|
|
+ irq-gpios = <&stmfx_pinctrl 14 GPIO_ACTIVE_HIGH>;
|
|
+ irq-flags = <IRQ_TYPE_EDGE_RISING>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c4 {
|
|
+ pmic: stpmic@33 {
|
|
+ regulators {
|
|
+ v1v8: ldo6 {
|
|
+ regulator-enable-ramp-delay = <300000>;
|
|
+ };
|
|
};
|
|
};
|
|
};
|
|
@@ -145,6 +527,20 @@
|
|
/delete-property/dma-names;
|
|
};
|
|
|
|
+<dc {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ltdc_ep0_out: endpoint@0 {
|
|
+ reg = <0>;
|
|
+ remote-endpoint = <&dsi_in>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
&m_can1 {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&m_can1_pins_a>;
|
|
@@ -180,9 +576,86 @@
|
|
};
|
|
};
|
|
|
|
+&sai2 {
|
|
+ clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL4_Q>;
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_a>;
|
|
+ pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_a>;
|
|
+ clock-names = "pclk", "x8k", "x11k";
|
|
+ status = "okay";
|
|
+
|
|
+ sai2a: audio-controller@4400b004 {
|
|
+ #clock-cells = <0>;
|
|
+ dma-names = "tx";
|
|
+ clocks = <&rcc SAI2_K>;
|
|
+ clock-names = "sai_ck";
|
|
+ status = "okay";
|
|
+
|
|
+ sai2a_port: port {
|
|
+ sai2a_endpoint: endpoint {
|
|
+ remote-endpoint = <&wm8994_tx_endpoint>;
|
|
+ format = "i2s";
|
|
+ mclk-fs = <256>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai2b: audio-controller@4400b024 {
|
|
+ dma-names = "rx";
|
|
+ clocks = <&rcc SAI2_K>, <&sai2a>;
|
|
+ clock-names = "sai_ck", "MCLK";
|
|
+ status = "okay";
|
|
+
|
|
+ sai2b_port: port {
|
|
+ sai2b_endpoint: endpoint {
|
|
+ remote-endpoint = <&wm8994_rx_endpoint>;
|
|
+ format = "i2s";
|
|
+ mclk-fs = <256>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&sai4 {
|
|
+ clocks = <&rcc SAI4>, <&rcc PLL3_Q>, <&rcc PLL4_Q>;
|
|
+ clock-names = "pclk", "x8k", "x11k";
|
|
+ status = "okay";
|
|
+
|
|
+ sai4a: audio-controller@50027004 {
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&sai4a_pins_a>;
|
|
+ pinctrl-1 = <&sai4a_sleep_pins_a>;
|
|
+ dma-names = "tx";
|
|
+ clocks = <&rcc SAI4_K>;
|
|
+ clock-names = "sai_ck";
|
|
+ st,iec60958;
|
|
+ status = "okay";
|
|
+
|
|
+ sai4a_port: port {
|
|
+ sai4a_endpoint: endpoint {
|
|
+ remote-endpoint = <&spdif_out_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&spdifrx {
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&spdifrx_pins_a>;
|
|
+ pinctrl-1 = <&spdifrx_sleep_pins_a>;
|
|
+ status = "okay";
|
|
+
|
|
+ spdifrx_port: port {
|
|
+ spdifrx_endpoint: endpoint {
|
|
+ remote-endpoint = <&spdif_in_endpoint>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
&spi1 {
|
|
- pinctrl-names = "default";
|
|
+ pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&spi1_pins_a>;
|
|
+ pinctrl-1 = <&spi1_sleep_pins_a>;
|
|
status = "disabled";
|
|
};
|
|
|
|
@@ -243,11 +716,13 @@
|
|
&usbh_ehci {
|
|
phys = <&usbphyc_port0>;
|
|
phy-names = "usb";
|
|
+ vbus-supply = <&vbus_sw>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg_hs {
|
|
- dr_mode = "peripheral";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&usbotg_hs_pins_a>;
|
|
phys = <&usbphyc_port1 0>;
|
|
phy-names = "usb2-phy";
|
|
status = "okay";
|
|
@@ -256,3 +731,11 @@
|
|
&usbphyc {
|
|
status = "okay";
|
|
};
|
|
+
|
|
+&usbphyc_port0 {
|
|
+ st,phy-tuning = <&usb_phy_tuning>;
|
|
+};
|
|
+
|
|
+&usbphyc_port1 {
|
|
+ st,phy-tuning = <&usb_phy_tuning>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
|
|
index b4bae4d..cef7b3e 100644
|
|
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
|
|
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
|
|
@@ -19,15 +19,25 @@
|
|
compatible = "arm,cortex-a7";
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
+ clock-frequency = <650000000>;
|
|
};
|
|
|
|
cpu1: cpu@1 {
|
|
compatible = "arm,cortex-a7";
|
|
device_type = "cpu";
|
|
reg = <1>;
|
|
+ clock-frequency = <650000000>;
|
|
};
|
|
};
|
|
|
|
+ arm-pmu {
|
|
+ compatible = "arm,cortex-a7-pmu";
|
|
+ interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-affinity = <&cpu0>, <&cpu1>;
|
|
+ interrupt-parent = <&intc>;
|
|
+ };
|
|
+
|
|
psci {
|
|
compatible = "arm,psci-1.0";
|
|
method = "smc";
|
|
@@ -80,6 +90,18 @@
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <4000000>;
|
|
};
|
|
+
|
|
+ clk_i2s_ckin: i2s_ckin {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <0>;
|
|
+ };
|
|
+
|
|
+ clk_dsi_phy: ck_dsi_phy {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <0>;
|
|
+ };
|
|
};
|
|
|
|
pm_domain {
|
|
@@ -102,6 +124,38 @@
|
|
};
|
|
};
|
|
|
|
+ thermal-zones {
|
|
+ cpu_thermal: cpu-thermal {
|
|
+ polling-delay-passive = <0>;
|
|
+ polling-delay = <0>;
|
|
+ thermal-sensors = <&dts>;
|
|
+
|
|
+ trips {
|
|
+ cpu_alert1: cpu-alert1 {
|
|
+ temperature = <85000>;
|
|
+ hysteresis = <0>;
|
|
+ type = "passive";
|
|
+ };
|
|
+
|
|
+ cpu-crit {
|
|
+ temperature = <120000>;
|
|
+ hysteresis = <0>;
|
|
+ type = "critical";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cooling-maps {
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ reboot {
|
|
+ compatible = "syscon-reboot";
|
|
+ regmap = <&rcc>;
|
|
+ offset = <0x404>;
|
|
+ mask = <0x1>;
|
|
+ };
|
|
+
|
|
soc {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
@@ -360,6 +414,17 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ i2s2: audio-controller@4000b000 {
|
|
+ compatible = "st,stm32h7-i2s";
|
|
+ #sound-dai-cells = <0>;
|
|
+ reg = <0x4000b000 0x400>;
|
|
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ dmas = <&dmamux1 39 0x400 0x01>,
|
|
+ <&dmamux1 40 0x400 0x01>;
|
|
+ dma-names = "rx", "tx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
spi3: spi@4000c000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
@@ -375,6 +440,30 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ i2s3: audio-controller@4000c000 {
|
|
+ compatible = "st,stm32h7-i2s";
|
|
+ #sound-dai-cells = <0>;
|
|
+ reg = <0x4000c000 0x400>;
|
|
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ dmas = <&dmamux1 61 0x400 0x01>,
|
|
+ <&dmamux1 62 0x400 0x01>;
|
|
+ dma-names = "rx", "tx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spdifrx: audio-controller@4000d000 {
|
|
+ compatible = "st,stm32h7-spdifrx";
|
|
+ #sound-dai-cells = <0>;
|
|
+ reg = <0x4000d000 0x400>;
|
|
+ clocks = <&rcc SPDIF_K>;
|
|
+ clock-names = "kclk";
|
|
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ dmas = <&dmamux1 93 0x400 0x01>,
|
|
+ <&dmamux1 94 0x400 0x01>;
|
|
+ dma-names = "rx", "rx-ctrl";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
usart2: serial@4000e000 {
|
|
compatible = "st,stm32h7-uart";
|
|
reg = <0x4000e000 0x400>;
|
|
@@ -644,6 +733,17 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ i2s1: audio-controller@44004000 {
|
|
+ compatible = "st,stm32h7-i2s";
|
|
+ #sound-dai-cells = <0>;
|
|
+ reg = <0x44004000 0x400>;
|
|
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ dmas = <&dmamux1 37 0x400 0x01>,
|
|
+ <&dmamux1 38 0x400 0x01>;
|
|
+ dma-names = "rx", "tx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
spi4: spi@44005000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
@@ -747,6 +847,88 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ sai1: sai@4400a000 {
|
|
+ compatible = "st,stm32h7-sai";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges = <0 0x4400a000 0x400>;
|
|
+ reg = <0x4400a000 0x4>;
|
|
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ resets = <&rcc SAI1_R>;
|
|
+ status = "disabled";
|
|
+
|
|
+ sai1a: audio-controller@4400a004 {
|
|
+ #sound-dai-cells = <0>;
|
|
+
|
|
+ compatible = "st,stm32-sai-sub-a";
|
|
+ reg = <0x4 0x1c>;
|
|
+ dmas = <&dmamux1 87 0x400 0x01>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ sai1b: audio-controller@4400a024 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "st,stm32-sai-sub-b";
|
|
+ reg = <0x24 0x1c>;
|
|
+ dmas = <&dmamux1 88 0x400 0x01>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai2: sai@4400b000 {
|
|
+ compatible = "st,stm32h7-sai";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges = <0 0x4400b000 0x400>;
|
|
+ reg = <0x4400b000 0x4>;
|
|
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ resets = <&rcc SAI2_R>;
|
|
+ status = "disabled";
|
|
+
|
|
+ sai2a: audio-controller@4400b004 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "st,stm32-sai-sub-a";
|
|
+ reg = <0x4 0x1c>;
|
|
+ dmas = <&dmamux1 89 0x400 0x01>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ sai2b: audio-controller@4400b024 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "st,stm32-sai-sub-b";
|
|
+ reg = <0x24 0x1c>;
|
|
+ dmas = <&dmamux1 90 0x400 0x01>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sai3: sai@4400c000 {
|
|
+ compatible = "st,stm32h7-sai";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges = <0 0x4400c000 0x400>;
|
|
+ reg = <0x4400c000 0x4>;
|
|
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ resets = <&rcc SAI3_R>;
|
|
+ status = "disabled";
|
|
+
|
|
+ sai3a: audio-controller@4400c004 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "st,stm32-sai-sub-a";
|
|
+ reg = <0x04 0x1c>;
|
|
+ dmas = <&dmamux1 113 0x400 0x01>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ sai3b: audio-controller@4400c024 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "st,stm32-sai-sub-b";
|
|
+ reg = <0x24 0x1c>;
|
|
+ dmas = <&dmamux1 114 0x400 0x01>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
dfsdm: dfsdm@4400d000 {
|
|
compatible = "st,stm32mp1-dfsdm";
|
|
reg = <0x4400d000 0x800>;
|
|
@@ -913,6 +1095,10 @@
|
|
clocks = <&rcc ADC12>, <&rcc ADC12_K>;
|
|
clock-names = "bus", "adc";
|
|
interrupt-controller;
|
|
+ st,syscfg-vbooster = <&syscfg 0x4 0x100>;
|
|
+ st,syscfg-vbooster-clr = <&syscfg 0x44 0x100>;
|
|
+ st,syscfg-anaswvdd = <&syscfg 0x4 0x200>;
|
|
+ st,syscfg-anaswvdd-clr = <&syscfg 0x44 0x200>;
|
|
#interrupt-cells = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
@@ -993,7 +1179,7 @@
|
|
};
|
|
|
|
usbotg_hs: usb-otg@49000000 {
|
|
- compatible = "snps,dwc2";
|
|
+ compatible = "st,stm32mp1-hsotg", "snps,dwc2";
|
|
reg = <0x49000000 0x10000>;
|
|
clocks = <&rcc USBO_K>;
|
|
clock-names = "otg";
|
|
@@ -1004,10 +1190,20 @@
|
|
g-np-tx-fifo-size = <32>;
|
|
g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
|
|
dr_mode = "otg";
|
|
+ usb33d-supply = <&usb33>;
|
|
power-domains = <&pd_core>;
|
|
status = "disabled";
|
|
};
|
|
|
|
+ hsem: hwspinlock@4c000000 {
|
|
+ compatible = "st,stm32-hwspinlock";
|
|
+ #hwlock-cells = <1>;
|
|
+ reg = <0x4c000000 0x400>;
|
|
+ clocks = <&rcc HSEM>;
|
|
+ clock-names = "hsem";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
ipcc: mailbox@4c001000 {
|
|
compatible = "st,stm32mp1-ipcc";
|
|
#mbox-cells = <1>;
|
|
@@ -1024,13 +1220,24 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ dcmi: dcmi@4c006000 {
|
|
+ compatible = "st,stm32-dcmi";
|
|
+ reg = <0x4c006000 0x400>;
|
|
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ resets = <&rcc CAMITF_R>;
|
|
+ clocks = <&rcc DCMI>;
|
|
+ clock-names = "mclk";
|
|
+ dmas = <&dmamux1 75 0x400 0xd>;
|
|
+ dma-names = "tx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
rcc: rcc@50000000 {
|
|
compatible = "st,stm32mp1-rcc", "syscon";
|
|
reg = <0x50000000 0x1000>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
|
|
- st,pwr = <&pwr>;
|
|
};
|
|
|
|
pwr: pwr@50001000 {
|
|
@@ -1071,11 +1278,24 @@
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x5000d000 0x400>;
|
|
+ hwlocks = <&hsem 2>;
|
|
+
|
|
+ /* exti_pwr is an extra interrupt controller used for
|
|
+ * EXTI 55 to 60. It's mapped on pwr interrupt
|
|
+ * controller.
|
|
+ */
|
|
+ exti_pwr: exti-pwr {
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupt-parent = <&pwr>;
|
|
+ st,irq-number = <6>;
|
|
+ };
|
|
};
|
|
|
|
syscfg: syscon@50020000 {
|
|
compatible = "st,stm32mp157-syscfg", "syscon";
|
|
reg = <0x50020000 0x400>;
|
|
+ clocks = <&rcc SYSCFG>;
|
|
};
|
|
|
|
lptimer2: timer@50021000 {
|
|
@@ -1168,6 +1388,45 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ sai4: sai@50027000 {
|
|
+ compatible = "st,stm32h7-sai";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges = <0 0x50027000 0x400>;
|
|
+ reg = <0x50027000 0x4>;
|
|
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ resets = <&rcc SAI4_R>;
|
|
+ status = "disabled";
|
|
+
|
|
+ sai4a: audio-controller@50027004 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "st,stm32-sai-sub-a";
|
|
+ reg = <0x04 0x1c>;
|
|
+ clocks = <&rcc SAI4_K>;
|
|
+ clock-names = "sai_ck";
|
|
+ dmas = <&dmamux1 99 0x400 0x01>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ sai4b: audio-controller@50027024 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "st,stm32-sai-sub-b";
|
|
+ reg = <0x24 0x1c>;
|
|
+ dmas = <&dmamux1 100 0x400 0x01>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ dts: thermal@50028000 {
|
|
+ compatible = "st,stm32-thermal";
|
|
+ reg = <0x50028000 0x100>;
|
|
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rcc TMPSENS>;
|
|
+ clock-names = "pclk";
|
|
+ #thermal-sensor-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
cryp1: cryp@54001000 {
|
|
compatible = "st,stm32mp1-cryp";
|
|
reg = <0x54001000 0x400>;
|
|
@@ -1327,6 +1586,16 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ gpu: gpu@59000000 {
|
|
+ compatible = "vivante,gc";
|
|
+ reg = <0x59000000 0x800>;
|
|
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rcc GPU>, <&rcc GPU_K>;
|
|
+ clock-names = "bus" ,"core";
|
|
+ resets = <&rcc GPU_R>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
dsi: dsi@5a000000 {
|
|
compatible = "st,stm32-dsi";
|
|
reg = <0x5a000000 0x800>;
|
|
@@ -1334,6 +1603,7 @@
|
|
clock-names = "pclk", "ref", "px_clk";
|
|
resets = <&rcc DSI_R>;
|
|
reset-names = "apb";
|
|
+ phy-dsi-supply = <®18>;
|
|
status = "disabled";
|
|
};
|
|
|
|
@@ -1359,10 +1629,13 @@
|
|
usbphyc: usbphyc@5a006000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
+ #clock-cells = <0>;
|
|
compatible = "st,stm32mp1-usbphyc";
|
|
reg = <0x5a006000 0x1000>;
|
|
clocks = <&rcc USBPHY_K>;
|
|
resets = <&rcc USBPHY_R>;
|
|
+ vdda1v1-supply = <®11>;
|
|
+ vdda1v8-supply = <®18>;
|
|
status = "disabled";
|
|
|
|
usbphyc_port0: usb-phy@0 {
|
|
@@ -1500,4 +1773,11 @@
|
|
status = "disabled";
|
|
};
|
|
};
|
|
+
|
|
+ firmware {
|
|
+ optee {
|
|
+ compatible = "linaro,optee-tz";
|
|
+ method = "smc";
|
|
+ };
|
|
+ };
|
|
};
|
|
--
|
|
2.7.4
|
|
|